From 281d2bf3203a7a8a9b93cee1bc735ca6c65af004 Mon Sep 17 00:00:00 2001 From: Robert Khasanov Date: Mon, 28 Jul 2014 13:46:45 +0000 Subject: [PATCH] [SKX] Enabling mask logic instructions: encoding, lowering Instructions: KAND{BWDQ}, KANDN{BWDQ}, KOR{BWDQ}, KXOR{BWDQ}, KXNOR{BWDQ} Reviewed by Elena Demikhovsky git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214081 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrAVX512.td | 31 +++++++++++-------- test/CodeGen/X86/avx512-mask-op.ll | 2 +- test/CodeGen/X86/avx512bw-mask-op.ll | 28 ++++++++++++++++- test/CodeGen/X86/avx512dq-mask-op.ll | 15 +++++++++- test/MC/X86/avx512-encodings.s | 20 +++++++++++++ test/MC/X86/x86-64-avx512bw.s | 40 +++++++++++++++++++++++++ test/MC/X86/x86-64-avx512dq.s | 24 +++++++++++++++ utils/TableGen/X86RecognizableInstr.cpp | 2 ++ 8 files changed, 147 insertions(+), 15 deletions(-) diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index 4956be5c66c..cc5dbca8b09 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -1247,31 +1247,38 @@ def : Pat<(not VK8:$src), // Mask binary operation // - KAND, KANDN, KOR, KXNOR, KXOR multiclass avx512_mask_binop opc, string OpcodeStr, - RegisterClass KRC, SDPatternOperator OpNode> { - let Predicates = [HasAVX512] in + RegisterClass KRC, SDPatternOperator OpNode, + Predicate prd> { + let Predicates = [prd] in def rr : I; } -multiclass avx512_mask_binop_w opc, string OpcodeStr, - SDPatternOperator OpNode> { - defm W : avx512_mask_binop, - VEX_4V, VEX_L, PS; +multiclass avx512_mask_binop_all opc, string OpcodeStr, + SDPatternOperator OpNode> { + defm B : avx512_mask_binop, VEX_4V, VEX_L, PD; + defm W : avx512_mask_binop, VEX_4V, VEX_L, PS; + defm D : avx512_mask_binop, VEX_4V, VEX_L, VEX_W, PD; + defm Q : avx512_mask_binop, VEX_4V, VEX_L, VEX_W, PS; } def andn : PatFrag<(ops node:$i0, node:$i1), (and (not node:$i0), node:$i1)>; def xnor : PatFrag<(ops node:$i0, node:$i1), (not (xor node:$i0, node:$i1))>; let isCommutable = 1 in { - defm KAND : avx512_mask_binop_w<0x41, "kand", and>; - let isCommutable = 0 in - defm KANDN : avx512_mask_binop_w<0x42, "kandn", andn>; - defm KOR : avx512_mask_binop_w<0x45, "kor", or>; - defm KXNOR : avx512_mask_binop_w<0x46, "kxnor", xnor>; - defm KXOR : avx512_mask_binop_w<0x47, "kxor", xor>; + defm KAND : avx512_mask_binop_all<0x41, "kand", and>; + defm KOR : avx512_mask_binop_all<0x45, "kor", or>; + defm KXNOR : avx512_mask_binop_all<0x46, "kxnor", xnor>; + defm KXOR : avx512_mask_binop_all<0x47, "kxor", xor>; } +let isCommutable = 0 in + defm KANDN : avx512_mask_binop_all<0x42, "kandn", andn>; def : Pat<(xor VK1:$src1, VK1:$src2), (COPY_TO_REGCLASS (KXORWrr (COPY_TO_REGCLASS VK1:$src1, VK16), diff --git a/test/CodeGen/X86/avx512-mask-op.ll b/test/CodeGen/X86/avx512-mask-op.ll index 2400370b350..35d334813fa 100644 --- a/test/CodeGen/X86/avx512-mask-op.ll +++ b/test/CodeGen/X86/avx512-mask-op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=knl | FileCheck %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s define i16 @mask16(i16 %x) { %m0 = bitcast i16 %x to <16 x i1> diff --git a/test/CodeGen/X86/avx512bw-mask-op.ll b/test/CodeGen/X86/avx512bw-mask-op.ll index 611982d1c6c..9d7630c5d0a 100644 --- a/test/CodeGen/X86/avx512bw-mask-op.ll +++ b/test/CodeGen/X86/avx512bw-mask-op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=skx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s define i32 @mask32(i32 %x) { %m0 = bitcast i32 %x to <32 x i1> @@ -71,3 +71,29 @@ define void @mask64_mem(i64* %ptr) { ; CHECK-NEXT: kmovq %k{{[0-7]}}, ([[ARG1]]) ; CHECK_NEXT: ret } + +define i32 @mand32(i32 %x, i32 %y) { + %ma = bitcast i32 %x to <32 x i1> + %mb = bitcast i32 %y to <32 x i1> + %mc = and <32 x i1> %ma, %mb + %md = xor <32 x i1> %ma, %mb + %me = or <32 x i1> %mc, %md + %ret = bitcast <32 x i1> %me to i32 +; CHECK: kandd +; CHECK: kxord +; CHECK: kord + ret i32 %ret +} + +define i64 @mand64(i64 %x, i64 %y) { + %ma = bitcast i64 %x to <64 x i1> + %mb = bitcast i64 %y to <64 x i1> + %mc = and <64 x i1> %ma, %mb + %md = xor <64 x i1> %ma, %mb + %me = or <64 x i1> %mc, %md + %ret = bitcast <64 x i1> %me to i64 +; CHECK: kandq +; CHECK: kxorq +; CHECK: korq + ret i64 %ret +} diff --git a/test/CodeGen/X86/avx512dq-mask-op.ll b/test/CodeGen/X86/avx512dq-mask-op.ll index 19f34282f39..32a2633f8d0 100644 --- a/test/CodeGen/X86/avx512dq-mask-op.ll +++ b/test/CodeGen/X86/avx512dq-mask-op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=skx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s define i8 @mask8(i8 %x) { %m0 = bitcast i8 %x to <8 x i1> @@ -23,3 +23,16 @@ define void @mask8_mem(i8* %ptr) { ; CHECK-NEXT: kmovb %k{{[0-7]}}, ([[ARG1]]) ; CHECK: ret } + +define i8 @mand8(i8 %x, i8 %y) { + %ma = bitcast i8 %x to <8 x i1> + %mb = bitcast i8 %y to <8 x i1> + %mc = and <8 x i1> %ma, %mb + %md = xor <8 x i1> %ma, %mb + %me = or <8 x i1> %mc, %md + %ret = bitcast <8 x i1> %me to i8 +; CHECK: kandb +; CHECK: kxorb +; CHECK: korb + ret i8 %ret +} diff --git a/test/MC/X86/avx512-encodings.s b/test/MC/X86/avx512-encodings.s index 5e36a804d36..762bbcc7472 100644 --- a/test/MC/X86/avx512-encodings.s +++ b/test/MC/X86/avx512-encodings.s @@ -2489,6 +2489,26 @@ // CHECK: encoding: [0x62,0x71,0x24,0x50,0x5c,0xb2,0xfc,0xfd,0xff,0xff] vsubps -516(%rdx){1to16}, %zmm27, %zmm14 +// CHECK: kandw %k6, %k5, %k2 +// CHECK: encoding: [0xc5,0xd4,0x41,0xd6] + kandw %k6, %k5, %k2 + +// CHECK: kandnw %k7, %k6, %k4 +// CHECK: encoding: [0xc5,0xcc,0x42,0xe7] + kandnw %k7, %k6, %k4 + +// CHECK: korw %k7, %k6, %k4 +// CHECK: encoding: [0xc5,0xcc,0x45,0xe7] + korw %k7, %k6, %k4 + +// CHECK: kxnorw %k5, %k5, %k3 +// CHECK: encoding: [0xc5,0xd4,0x46,0xdd] + kxnorw %k5, %k5, %k3 + +// CHECK: kxorw %k7, %k6, %k2 +// CHECK: encoding: [0xc5,0xcc,0x47,0xd7] + kxorw %k7, %k6, %k2 + // CHECK: knotw %k6, %k3 // CHECK: encoding: [0xc5,0xf8,0x44,0xde] knotw %k6, %k3 diff --git a/test/MC/X86/x86-64-avx512bw.s b/test/MC/X86/x86-64-avx512bw.s index 8e7c6091e9b..1a2215ef814 100644 --- a/test/MC/X86/x86-64-avx512bw.s +++ b/test/MC/X86/x86-64-avx512bw.s @@ -1,5 +1,45 @@ // RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=skx --show-encoding %s | FileCheck %s +// CHECK: kandq %k7, %k5, %k5 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x41,0xef] + kandq %k7, %k5, %k5 + +// CHECK: kandd %k4, %k5, %k5 +// CHECK: encoding: [0xc4,0xe1,0xd5,0x41,0xec] + kandd %k4, %k5, %k5 + +// CHECK: kandnq %k4, %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x42,0xd4] + kandnq %k4, %k5, %k2 + +// CHECK: kandnd %k6, %k6, %k3 +// CHECK: encoding: [0xc4,0xe1,0xcd,0x42,0xde] + kandnd %k6, %k6, %k3 + +// CHECK: korq %k4, %k5, %k4 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x45,0xe4] + korq %k4, %k5, %k4 + +// CHECK: kord %k6, %k6, %k5 +// CHECK: encoding: [0xc4,0xe1,0xcd,0x45,0xee] + kord %k6, %k6, %k5 + +// CHECK: kxnorq %k6, %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x46,0xd6] + kxnorq %k6, %k5, %k2 + +// CHECK: kxnord %k5, %k3, %k5 +// CHECK: encoding: [0xc4,0xe1,0xe5,0x46,0xed] + kxnord %k5, %k3, %k5 + +// CHECK: kxorq %k4, %k3, %k2 +// CHECK: encoding: [0xc4,0xe1,0xe4,0x47,0xd4] + kxorq %k4, %k3, %k2 + +// CHECK: kxord %k6, %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xd5,0x47,0xd6] + kxord %k6, %k5, %k2 + // CHECK: knotq %k6, %k3 // CHECK: encoding: [0xc4,0xe1,0xf8,0x44,0xde] knotq %k6, %k3 diff --git a/test/MC/X86/x86-64-avx512dq.s b/test/MC/X86/x86-64-avx512dq.s index 7724a67f5f4..23fa66c922f 100644 --- a/test/MC/X86/x86-64-avx512dq.s +++ b/test/MC/X86/x86-64-avx512dq.s @@ -1,5 +1,29 @@ // RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=skx --show-encoding %s | FileCheck %s +// CHECK: kandb %k6, %k5, %k2 +// CHECK: encoding: [0xc5,0xd5,0x41,0xd6] + kandb %k6, %k5, %k2 + +// CHECK: kandnb %k4, %k6, %k5 +// CHECK: encoding: [0xc5,0xcd,0x42,0xec] + kandnb %k4, %k6, %k5 + +// CHECK: korb %k5, %k4, %k4 +// CHECK: encoding: [0xc5,0xdd,0x45,0xe5] + korb %k5, %k4, %k4 + +// CHECK: kxnorb %k7, %k6, %k4 +// CHECK: encoding: [0xc5,0xcd,0x46,0xe7] + kxnorb %k7, %k6, %k4 + +// CHECK: kxorb %k5, %k6, %k4 +// CHECK: encoding: [0xc5,0xcd,0x47,0xe5] + kxorb %k5, %k6, %k4 + +// CHECK: knotb %k4, %k5 +// CHECK: encoding: [0xc5,0xf9,0x44,0xec] + knotb %k4, %k5 + // CHECK: knotb %k3, %k3 // CHECK: encoding: [0xc5,0xf9,0x44,0xdb] knotb %k3, %k3 diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 2261dc877a9..4068b8deeea 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -1117,6 +1117,8 @@ RecognizableInstr::vvvvRegisterEncodingFromString(const std::string &s, ENCODING("VK4", ENCODING_VVVV) ENCODING("VK8", ENCODING_VVVV) ENCODING("VK16", ENCODING_VVVV) + ENCODING("VK32", ENCODING_VVVV) + ENCODING("VK64", ENCODING_VVVV) errs() << "Unhandled VEX.vvvv register encoding " << s << "\n"; llvm_unreachable("Unhandled VEX.vvvv register encoding"); } -- 2.34.1