From 29466f86ce79292513b5cad235a88358b7452dd7 Mon Sep 17 00:00:00 2001 From: xbw Date: Mon, 17 Mar 2014 17:30:43 +0800 Subject: [PATCH] SDMMC: to support rk3288 --- arch/arm/boot/dts/rk3288-tb.dts | 34 +++++++ arch/arm/boot/dts/rk3288.dtsi | 154 ++++++++++++++++---------------- 2 files changed, 109 insertions(+), 79 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-tb.dts b/arch/arm/boot/dts/rk3288-tb.dts index 9d9a40286421..f04653b0931b 100755 --- a/arch/arm/boot/dts/rk3288-tb.dts +++ b/arch/arm/boot/dts/rk3288-tb.dts @@ -49,6 +49,40 @@ }; }; +&emmc { + clock-frequency = <50000000>; + clock-freq-min-max = <400000 50000000>; + + supports-highspeed; + supports-emmc; + bootpart-no-access; + + status = "okay"; +}; + +&sdmmc { + clock-frequency = <50000000>; + lock-freq-min-max = <400000 50000000>; + + supports-highspeed; + supports-sd; + broken-cd; + card-detect-delay = <200>; + + pwr-gpios = <&gpio3 GPIO_A1 GPIO_ACTIVE_LOW>; /*pwr_en = GPIO3_A1*/ + + status = "okay"; +}; + +&sdio { + clock-frequency = <50000000>; + clock-freq-min-max = <200000 50000000>; + + supports-highspeed; + supports-sdio; + + status = "diabled"; +}; &i2c0 { status = "okay"; rk808: rk808@1b { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 0639fb039251..7a1c4ecc5659 100755 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -13,6 +13,10 @@ interrupt-parent = <&gic>; aliases { + emmc = &emmc; + sdmmc= &sdmmc; + sdio = &sdio; + sdio1= &sdio1 serial2 = &uart_dbg; i2c0 = &i2c0; i2c1 = &i2c1; @@ -190,6 +194,77 @@ rockchip,count-up = <1>; }; + + emmc: rksdmmc@ff0f0000 { + compatible = "rockchip,rk_mmc"; + reg = <0xff0f0000 0x4000>; + interrupts = ;/*irq=67*/ + #address-cells = <1>; + #size-cells = <0>; + //pinctrl-names = "default",,"suspend"; + //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>; + + /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_3 --clk_emmc_src_gate_en*/ + //clocks = <&clk_gates8 0>, <&clk_gates8 0>; + num-slots = <1>; + fifo-depth = <0x80>; + bus-width = <4>; + }; + + sdmmc: rksdmmc@ff0c0000 { + compatible = "rockchip,rk_mmc"; + reg = <0xff0c0000 0x4000>; + interrupts = ; /*irq=64*/ + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "default","suspend"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>; + pinctrl-1 = <&sd0_cd_gpio>; //for int gpio? + + /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_0 --clk_mmc0_src_gate_en*/ + //clocks = <&clk_gates8 0>, <&clk_gates13 0>; + num-slots = <1>; + fifo-depth = <0x100>; + bus-width = <4>; + + }; + + sdio: rksdmmc@ff0d0000 { + compatible = "rockchip,rk_mmc"; + reg = ; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default","suspend"; + pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; + + /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_1 --clk_sdio0_src_gate_en*/ + //clocks = <&clk_gates8 0>, <&clk_gates13 1>; + num-slots = <1>; + + fifo-depth = <0x100>; + bus-width = <4>; + }; + + sdio1: rksdmmc@ff0e0000 { + compatible = "rockchip,rk_mmc"; + reg = ; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default","suspend"; + pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; + + /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_2 --clk_sdio1_src_gate_en*/ + //clocks = <&clk_gates8 0>, <&clk_gates13 2>; + num-slots = <1>; + + fifo-depth = <0x100>; + bus-width = <4>; + }; + + uart_dbg: serial@ff690000 { compatible = "rockchip,serial"; reg = <0xff690000 0x100>; @@ -455,85 +530,6 @@ }; }; - mmc: mshc@ff0c0000 { - compatible = "rockchip,rk_mmc"; - reg = <0xff0c0000 0x4000>; - interrupts = ; /*irq=64*/ - #address-cells = <1>; - #size-cells = <0>; - //pinctrl-names = "default","suspend"; - //pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_cd &sdmmc0_wp &sdmmc0_pwr &sdmmc0_bus1 &sdmmc0_bus4>; - //pinctrl-1 = <&sd0_cd_gpio>; //for int gpio? - //clocks = <&clk_gatesX XX> , <&clk_gatesY YY>; - //clock-names = "hclk_mmc","mmc"; - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - num-slots = <1>; - supports-highspeed; - broken-cd; - card-detect-delay = <200>; - pwr-gpios = <&gpio3 GPIO_A1 GPIO_ACTIVE_LOW>; /*pwr_en = GPIO3_A1*/ - fifo-depth = <0x100>; - emmc-compatible = <0>; - status = "okay"; - }; - - sdio0: mshc@ff0d0000 { - compatible = "rockchip,rk_mmc"; - reg = <0xff0d0000 0x4000>; - interrupts = ; /*irq=65*/ - #address-cells = <1>; - #size-cells = <0>; - //pinctrl-names = "default"; - //pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; - //clocks = <&clk_gatesX XX> , <&clk_gatesY YY>; - //clock-names = "hclk_sdio0","sdio0"; - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - num-slots = <1>; - supports-highspeed; - fifo-depth = <0x100>; - emmc-compatible = <0>; - status = "disabled"; - }; - - sdio1: mshc@ff0e0000 { - compatible = "rockchip,rk_mmc"; - reg = <0xff0e0000 0x4000>; - interrupts = ; /*irq=66*/ - #address-cells = <1>; - #size-cells = <0>; - //pinctrl-names = "default"; - //pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; - //clocks = <&clk_gatesX XX> , <&clk_gatesY YY>; - //clock-names = "hclk_sdio1","sdio1"; - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - num-slots = <1>; - supports-highspeed; - fifo-depth = <0x100>; - emmc-compatible = <0>; - status = "disabled"; - }; - - emmc: mshc@ff0f0000 { - compatible = "rockchip,rk_mmc"; - reg = <0xff0f0000 0x4000>; - interrupts = ; /*irq=67*/ - #address-cells = <1>; - #size-cells = <0>; - //pinctrl-names = "default"; - //pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; - //clocks = <&clk_gatesX XX> , <&clk_gatesY YY>; - //clock-names = "hclk_sdio1","sdio1"; - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - num-slots = <1>; - supports-highspeed; - fifo-depth = <0x100>; - emmc-compatible = <1>; - status = "disabled"; - }; vpu: vpu_service@ff9a0000 { compatible = "vpu_service"; -- 2.34.1