From 29cf32156dbdbb36d89edffbbe1bbda44760f7ac Mon Sep 17 00:00:00 2001 From: Erik Gilling Date: Wed, 2 Feb 2011 12:12:31 -0800 Subject: [PATCH] video: tegra: support v/h sync polarity Change-Id: Ida82a70efaeadc9d5b11d8703e688063680b72a8 Signed-off-by: Erik Gilling --- arch/arm/mach-tegra/include/mach/dc.h | 4 ++++ drivers/video/tegra/dc/dc.c | 12 ++++++++++++ drivers/video/tegra/dc/dc_reg.h | 4 ++++ drivers/video/tegra/fb.c | 8 ++++++++ 4 files changed, 28 insertions(+) diff --git a/arch/arm/mach-tegra/include/mach/dc.h b/arch/arm/mach-tegra/include/mach/dc.h index 43a9ec1e141d..9fe8d6a7e71b 100644 --- a/arch/arm/mach-tegra/include/mach/dc.h +++ b/arch/arm/mach-tegra/include/mach/dc.h @@ -37,8 +37,12 @@ struct tegra_dc_mode { int v_active; int h_front_porch; int v_front_porch; + u32 flags; }; +#define TEGRA_DC_MODE_FLAG_NEG_V_SYNC (1 << 0) +#define TEGRA_DC_MODE_FLAG_NEG_H_SYNC (1 << 1) + enum { TEGRA_DC_OUT_RGB, TEGRA_DC_OUT_HDMI, diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index c57a8f9ded4f..d316fde01662 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -736,6 +736,18 @@ static int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode tegra_dc_writel(dc, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL, DC_DISP_DATA_ENABLE_OPTIONS); + val = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY1); + if (mode->flags & TEGRA_DC_MODE_FLAG_NEG_V_SYNC) + val |= PIN1_LVS_OUTPUT; + else + val &= ~PIN1_LVS_OUTPUT; + + if (mode->flags & TEGRA_DC_MODE_FLAG_NEG_H_SYNC) + val |= PIN1_LHS_OUTPUT; + else + val &= ~PIN1_LHS_OUTPUT; + tegra_dc_writel(dc, val, DC_COM_PIN_OUTPUT_POLARITY1); + /* TODO: MIPI/CRT/HDMI clock cals */ val = DISP_DATA_FORMAT_DF1P1C; diff --git a/drivers/video/tegra/dc/dc_reg.h b/drivers/video/tegra/dc/dc_reg.h index bd1750b78e44..ab21c6eba0e1 100644 --- a/drivers/video/tegra/dc/dc_reg.h +++ b/drivers/video/tegra/dc/dc_reg.h @@ -128,6 +128,10 @@ #define DC_COM_PIN_OUTPUT_SELECT4 0x318 #define DC_COM_PIN_OUTPUT_SELECT5 0x319 #define DC_COM_PIN_OUTPUT_SELECT6 0x31a + +#define PIN1_LHS_OUTPUT (1 << 30) +#define PIN1_LVS_OUTPUT (1 << 28) + #define DC_COM_PIN_MISC_CONTROL 0x31b #define DC_COM_PM0_CONTROL 0x31c #define DC_COM_PM0_DUTY_CYCLE 0x31d diff --git a/drivers/video/tegra/fb.c b/drivers/video/tegra/fb.c index 5d6a11a4ba55..4f8a5c0270f7 100644 --- a/drivers/video/tegra/fb.c +++ b/drivers/video/tegra/fb.c @@ -194,6 +194,14 @@ static int tegra_fb_set_par(struct fb_info *info) mode.h_front_porch = info->mode->right_margin; mode.v_front_porch = info->mode->lower_margin; + mode.flags = 0; + + if (!(info->mode->sync & FB_SYNC_HOR_HIGH_ACT)) + mode.flags |= TEGRA_DC_MODE_FLAG_NEG_H_SYNC; + + if (!(info->mode->sync & FB_SYNC_VERT_HIGH_ACT)) + mode.flags |= TEGRA_DC_MODE_FLAG_NEG_V_SYNC; + tegra_dc_set_mode(tegra_fb->win->dc, &mode); tegra_fb->win->w = info->mode->xres; -- 2.34.1