From 2a9bdd74f2fc91186d0d789827a8382e1a20b631 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 25 Feb 2007 09:12:39 +0000 Subject: [PATCH] move LowerRET into the 'Return Value Calling Convention Implementation' section of the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34589 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 152 +++++++++++++++-------------- 1 file changed, 77 insertions(+), 75 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index a9644ce2056..ba6f450de97 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -467,6 +467,83 @@ static void GetRetValueLocs(const MVT::ValueType *VTs, unsigned NumVTs, ResultRegs[0] = Reg; } +/// LowerRET - Lower an ISD::RET node. +SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { + assert((Op.getNumOperands() & 1) == 1 && "ISD::RET should have odd # args"); + + // Support up returning up to two registers. + MVT::ValueType VTs[2]; + unsigned DestRegs[2]; + unsigned NumRegs = Op.getNumOperands() / 2; + assert(NumRegs <= 2 && "Can only return up to two regs!"); + + for (unsigned i = 0; i != NumRegs; ++i) + VTs[i] = Op.getOperand(i*2+1).getValueType(); + + // Determine which register each value should be copied into. + GetRetValueLocs(VTs, NumRegs, DestRegs, Subtarget, + DAG.getMachineFunction().getFunction()->getCallingConv()); + + // If this is the first return lowered for this function, add the regs to the + // liveout set for the function. + if (DAG.getMachineFunction().liveout_empty()) { + for (unsigned i = 0; i != NumRegs; ++i) + DAG.getMachineFunction().addLiveOut(DestRegs[i]); + } + + SDOperand Chain = Op.getOperand(0); + SDOperand Flag; + + // Copy the result values into the output registers. + if (NumRegs != 1 || DestRegs[0] != X86::ST0) { + for (unsigned i = 0; i != NumRegs; ++i) { + Chain = DAG.getCopyToReg(Chain, DestRegs[i], Op.getOperand(i*2+1), Flag); + Flag = Chain.getValue(1); + } + } else { + // We need to handle a destination of ST0 specially, because it isn't really + // a register. + SDOperand Value = Op.getOperand(1); + + // If this is an FP return with ScalarSSE, we need to move the value from + // an XMM register onto the fp-stack. + if (X86ScalarSSE) { + SDOperand MemLoc; + + // If this is a load into a scalarsse value, don't store the loaded value + // back to the stack, only to reload it: just replace the scalar-sse load. + if (ISD::isNON_EXTLoad(Value.Val) && + (Chain == Value.getValue(1) || Chain == Value.getOperand(0))) { + Chain = Value.getOperand(0); + MemLoc = Value.getOperand(1); + } else { + // Spill the value to memory and reload it into top of stack. + unsigned Size = MVT::getSizeInBits(VTs[0])/8; + MachineFunction &MF = DAG.getMachineFunction(); + int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); + MemLoc = DAG.getFrameIndex(SSFI, getPointerTy()); + Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc, NULL, 0); + } + SDVTList Tys = DAG.getVTList(MVT::f64, MVT::Other); + SDOperand Ops[] = { Chain, MemLoc, DAG.getValueType(VTs[0]) }; + Value = DAG.getNode(X86ISD::FLD, Tys, Ops, 3); + Chain = Value.getValue(1); + } + + SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); + SDOperand Ops[] = { Chain, Value }; + Chain = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops, 2); + Flag = Chain.getValue(1); + } + + SDOperand BytesToPop = DAG.getConstant(getBytesToPopOnReturn(), MVT::i16); + if (Flag.Val) + return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop, Flag); + else + return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop); +} + + /// LowerCallResult - Lower the result values of an ISD::CALL into the /// appropriate copies out of appropriate physical registers. This assumes that /// Chain/InFlag are the input chain/flag to use, and that TheCall is the call @@ -3808,81 +3885,6 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { } } -SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { - assert((Op.getNumOperands() & 1) == 1 && "ISD::RET should have odd # args"); - - // Support up returning up to two registers. - MVT::ValueType VTs[2]; - unsigned DestRegs[2]; - unsigned NumRegs = Op.getNumOperands() / 2; - assert(NumRegs <= 2 && "Can only return up to two regs!"); - - for (unsigned i = 0; i != NumRegs; ++i) - VTs[i] = Op.getOperand(i*2+1).getValueType(); - - // Determine which register each value should be copied into. - GetRetValueLocs(VTs, NumRegs, DestRegs, Subtarget, - DAG.getMachineFunction().getFunction()->getCallingConv()); - - // If this is the first return lowered for this function, add the regs to the - // liveout set for the function. - if (DAG.getMachineFunction().liveout_empty()) { - for (unsigned i = 0; i != NumRegs; ++i) - DAG.getMachineFunction().addLiveOut(DestRegs[i]); - } - - SDOperand Chain = Op.getOperand(0); - SDOperand Flag; - - // Copy the result values into the output registers. - if (NumRegs != 1 || DestRegs[0] != X86::ST0) { - for (unsigned i = 0; i != NumRegs; ++i) { - Chain = DAG.getCopyToReg(Chain, DestRegs[i], Op.getOperand(i*2+1), Flag); - Flag = Chain.getValue(1); - } - } else { - // We need to handle a destination of ST0 specially, because it isn't really - // a register. - SDOperand Value = Op.getOperand(1); - - // If this is an FP return with ScalarSSE, we need to move the value from - // an XMM register onto the fp-stack. - if (X86ScalarSSE) { - SDOperand MemLoc; - - // If this is a load into a scalarsse value, don't store the loaded value - // back to the stack, only to reload it: just replace the scalar-sse load. - if (ISD::isNON_EXTLoad(Value.Val) && - (Chain == Value.getValue(1) || Chain == Value.getOperand(0))) { - Chain = Value.getOperand(0); - MemLoc = Value.getOperand(1); - } else { - // Spill the value to memory and reload it into top of stack. - unsigned Size = MVT::getSizeInBits(VTs[0])/8; - MachineFunction &MF = DAG.getMachineFunction(); - int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); - MemLoc = DAG.getFrameIndex(SSFI, getPointerTy()); - Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc, NULL, 0); - } - SDVTList Tys = DAG.getVTList(MVT::f64, MVT::Other); - SDOperand Ops[] = { Chain, MemLoc, DAG.getValueType(VTs[0]) }; - Value = DAG.getNode(X86ISD::FLD, Tys, Ops, 3); - Chain = Value.getValue(1); - } - - SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); - SDOperand Ops[] = { Chain, Value }; - Chain = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops, 2); - Flag = Chain.getValue(1); - } - - SDOperand BytesToPop = DAG.getConstant(getBytesToPopOnReturn(), MVT::i16); - if (Flag.Val) - return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop, Flag); - else - return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop); -} - SDOperand X86TargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) { MachineFunction &MF = DAG.getMachineFunction(); -- 2.34.1