From 2beb136e0b7032db586e0ac52bcea742e5209dde Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 5 Dec 2006 18:25:10 +0000 Subject: [PATCH] Add a perf optzn corresponding to PR1033. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32229 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/README-SSE.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lib/Target/X86/README-SSE.txt b/lib/Target/X86/README-SSE.txt index 2685956dc1a..b80661a5b79 100644 --- a/lib/Target/X86/README-SSE.txt +++ b/lib/Target/X86/README-SSE.txt @@ -18,6 +18,11 @@ Think about doing i64 math in SSE regs. //===---------------------------------------------------------------------===// +Bitcast to<->from SSE registers should use movd/movq instead of going through +the stack. Testcase here: CodeGen/X86/bitcast.ll + +//===---------------------------------------------------------------------===// + This testcase should have no SSE instructions in it, and only one load from a constant pool: -- 2.34.1