From 2c8bb1f531ad00e31fac23ed95269e30b5479ee0 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Sat, 25 Mar 2006 06:05:45 +0000 Subject: [PATCH] X86 SSE1 cacheability support ops intrinsics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27104 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Intrinsics.td | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index a7fa1a97c4b..119e77135b4 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -626,7 +626,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". } // SIMD load ops - let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_loadhps : GCCBuiltin<"__builtin_ia32_loadhps">, Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>; @@ -643,7 +642,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". } // SIMD store ops - let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_storehps : GCCBuiltin<"__builtin_ia32_storehps">, Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>; @@ -659,6 +657,27 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>; } +// Cacheability support ops +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">, + Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>; +} + +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">, + Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>; +} + +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">, + Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>; +} + +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">, + Intrinsic<[llvm_void_ty], [IntrWriteMem]>; +} + let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_movmskps : GCCBuiltin<"__builtin_ia32_movmskps">, Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>; -- 2.34.1