From 2fd5a021071ef54c503ab8d9894acae3eccf4f92 Mon Sep 17 00:00:00 2001 From: Rafael Ignacio Zurita Date: Mon, 14 Sep 2009 03:01:58 +0000 Subject: [PATCH] sh: clkfwk: remove bogus set_bus_parent() from SH7709. This fixes up broken clock re-parenting undertaken by the SH7709 clock framework code, which is currently in conflict with the legacy CPG framework. With this change in place, the legacy CPG ancestry is used, and we manage to avoid contending on the clock_list_sem mutex, which is already held under the legacy registration path, resulting in livelock. In order for SH7709 to fully support the varying clock modes, it needs to implement a more complete clock framework. After this change it is in sync with legacy CPG mode, which ends up being the default configuration for this CPU anyways. Signed-off-by: Rafael Ignacio Zurita Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh3/clock-sh7709.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c index fa30b6017730..e8749505bd2a 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c @@ -22,13 +22,6 @@ static int stc_multipliers[] = { 1, 2, 4, 8, 3, 6, 1, 1 }; static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 }; static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; -static void set_bus_parent(struct clk *clk) -{ - struct clk *bus_clk = clk_get(NULL, "bus_clk"); - clk->parent = bus_clk; - clk_put(bus_clk); -} - static void master_clk_init(struct clk *clk) { int frqcr = ctrl_inw(FRQCR); @@ -50,9 +43,6 @@ static unsigned long module_clk_recalc(struct clk *clk) } static struct clk_ops sh7709_module_clk_ops = { -#ifdef CLOCK_MODE_0_1_2_7 - .init = set_bus_parent, -#endif .recalc = module_clk_recalc, }; @@ -78,7 +68,6 @@ static unsigned long cpu_clk_recalc(struct clk *clk) } static struct clk_ops sh7709_cpu_clk_ops = { - .init = set_bus_parent, .recalc = cpu_clk_recalc, }; -- 2.34.1