From 308249b0a24c891b729284ec620d0138a88b7561 Mon Sep 17 00:00:00 2001 From: hxy Date: Mon, 29 Oct 2012 10:35:11 +0800 Subject: [PATCH] rk3108: add rk3108 sdk top board support --- arch/arm/configs/rk3108_tb_defconfig | 435 +++++ arch/arm/mach-rk30/Makefile | 1 + arch/arm/mach-rk30/board-rk3108-tb-sdmmc.c | 465 +++++ arch/arm/mach-rk30/board-rk3108-tb.c | 1797 ++++++++++++++++++++ 4 files changed, 2698 insertions(+) create mode 100644 arch/arm/configs/rk3108_tb_defconfig create mode 100644 arch/arm/mach-rk30/board-rk3108-tb-sdmmc.c create mode 100644 arch/arm/mach-rk30/board-rk3108-tb.c diff --git a/arch/arm/configs/rk3108_tb_defconfig b/arch/arm/configs/rk3108_tb_defconfig new file mode 100644 index 000000000000..f580ecd23d9b --- /dev/null +++ b/arch/arm/configs/rk3108_tb_defconfig @@ -0,0 +1,435 @@ +CONFIG_EXPERIMENTAL=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZO=y +CONFIG_LOG_BUF_SHIFT=19 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_PANIC_TIMEOUT=1 +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_ELF_CORE is not set +CONFIG_ASHMEM=y +# CONFIG_AIO is not set +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_ARCH_RK30=y +# CONFIG_DDR_TEST is not set +CONFIG_SOC_RK3108=y +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_NR_CPUS=2 +CONFIG_PREEMPT=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_WAKELOCK=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_SUSPEND_TIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_INET_ESP=y +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_TUNNEL=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +# CONFIG_BRIDGE_NETFILTER is not set +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_TRACE=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_REJECT_SKERR=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_TARGET_LOG=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_TARGET_REJECT_SKERR=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +CONFIG_PHONET=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_INGRESS=y +CONFIG_NET_CLS_U32=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=y +CONFIG_NET_ACT_GACT=y +CONFIG_NET_ACT_MIRRED=y +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIBCM4325=y +CONFIG_BT_AUTOSLEEP=y +CONFIG_RFKILL=y +CONFIG_RFKILL_RK=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_RKNAND=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_MISC_DEVICES=y +CONFIG_UID_STAT=y +CONFIG_APANIC=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_UEVENT=y +CONFIG_NETDEVICES=y +CONFIG_PHYLIB=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN_80211=y +CONFIG_RKWIFI=y +CONFIG_USB_USBNET=y +CONFIG_PPP=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_KEYRESET=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=y +CONFIG_TABLET_USB_AIPTEK=y +CONFIG_TABLET_USB_GTCO=y +CONFIG_TABLET_USB_HANWANG=y +CONFIG_TABLET_USB_KBTAB=y +CONFIG_TABLET_USB_WACOM=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_GT8XX=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_KEYCHORD=y +CONFIG_INPUT_UINPUT=y +CONFIG_COMPASS_AK8975=y +CONFIG_GS_MMA8452=y +CONFIG_GS_LIS3DH=y +CONFIG_GYRO_L3G4200D=y +CONFIG_LS_CM3217=y +CONFIG_SENSOR_DEVICE=y +CONFIG_GSENSOR_DEVICE=y +CONFIG_GS_KXTIK=y +CONFIG_COMPASS_DEVICE=y +CONFIG_GYROSCOPE_DEVICE=y +CONFIG_LIGHT_DEVICE=y +CONFIG_LS_AL3006=y +CONFIG_LS_STK3171=y +CONFIG_PROXIMITY_DEVICE=y +CONFIG_PS_AL3006=y +CONFIG_PS_STK3171=y +# CONFIG_SERIO is not set +# CONFIG_CONSOLE_TRANSLATIONS is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_RK29=y +CONFIG_UART0_RK29=y +CONFIG_UART0_CTS_RTS_RK29=y +CONFIG_UART3_RK29=y +CONFIG_UART3_CTS_RTS_RK29=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C0_CONTROLLER_RK30=y +CONFIG_I2C1_CONTROLLER_RK30=y +CONFIG_I2C2_CONTROLLER_RK30=y +CONFIG_I2C3_CONTROLLER_RK30=y +CONFIG_I2C4_CONTROLLER_RK30=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_WM831X=y +CONFIG_EXPANDED_GPIO_NUM=0 +CONFIG_EXPANDED_GPIO_IRQ_NUM=0 +CONFIG_SPI_FPGA_GPIO_NUM=0 +CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0 +CONFIG_POWER_SUPPLY=y +CONFIG_TEST_POWER=y +# CONFIG_HWMON is not set +CONFIG_MFD_TPS65910=y +CONFIG_MFD_WM831X_I2C=y +CONFIG_MFD_TPS65090=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_TPS65910=y +CONFIG_REGULATOR_WM831X=y +CONFIG_RK30_PWM_REGULATOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_VIDEO_DEV=y +CONFIG_SOC_CAMERA=y +CONFIG_SOC_CAMERA_OV2659=y +CONFIG_SOC_CAMERA_OV5642=y +CONFIG_VIDEO_RK29=y +CONFIG_VIDEO_RK29_CAMMEM_ION=y +CONFIG_ION=y +CONFIG_ION_ROCKCHIP=y +CONFIG_FB=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_DISPLAY_SUPPORT=y +CONFIG_LCD_B101EW05=y +CONFIG_FB_ROCKCHIP=y +CONFIG_ONE_LCDC_DUAL_OUTPUT_INF=y +CONFIG_LCDC_RK3066B=y +CONFIG_RGA_RK30=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +CONFIG_SND_SOC=y +CONFIG_SND_RK29_SOC=y +CONFIG_SND_RK29_SOC_I2S_2CH=y +CONFIG_SND_I2S_DMA_EVENT_STATIC=y +CONFIG_SND_RK29_SOC_RT5631=y +CONFIG_SND_RK29_CODEC_SOC_SLAVE=y +CONFIG_HID_A4TECH=y +CONFIG_HID_ACRUX=y +CONFIG_HID_ACRUX_FF=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_DRAGONRISE=y +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EMS_FF=y +CONFIG_HID_ELECOM=y +CONFIG_HID_EZKEY=y +CONFIG_HID_KEYTOUCH=y +CONFIG_HID_KYE=y +CONFIG_HID_UCLOGIC=y +CONFIG_HID_WALTOP=y +CONFIG_HID_GYRATION=y +CONFIG_HID_TWINHAN=y +CONFIG_HID_KENSINGTON=y +CONFIG_HID_LCPOWER=y +CONFIG_HID_LOGITECH=y +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWII_FF=y +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_MULTITOUCH=y +CONFIG_HID_NTRIG=y +CONFIG_HID_ORTEK=y +CONFIG_HID_PANTHERLORD=y +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PETALYNX=y +CONFIG_HID_PICOLCD=y +CONFIG_HID_QUANTA=y +CONFIG_HID_ROCCAT_ARVO=y +CONFIG_HID_ROCCAT_KONE=y +CONFIG_HID_ROCCAT_KONEPLUS=y +CONFIG_HID_ROCCAT_KOVAPLUS=y +CONFIG_HID_ROCCAT_PYRA=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +CONFIG_HID_SUNPLUS=y +CONFIG_HID_GREENASIA=y +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=y +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TOPSEED=y +CONFIG_HID_THRUSTMASTER=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_WACOM=y +CONFIG_HID_ZEROPLUS=y +CONFIG_ZEROPLUS_FF=y +CONFIG_HID_ZYDACRON=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DEVICEFS=y +CONFIG_USB_OTG_BLACKLIST_HUB=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_OPTION=y +CONFIG_USB_GADGET=y +CONFIG_USB20_HOST=y +CONFIG_USB20_OTG=y +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_EMBEDDED_SDIO=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_SDMMC_RK29=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_SWITCH=y +CONFIG_SWITCH_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_WM831X=y +CONFIG_TPS65910_RTC=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +# CONFIG_CMMB is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_DNOTIFY is not set +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_SCHEDSTATS=y +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/mach-rk30/Makefile b/arch/arm/mach-rk30/Makefile index 9a6c0b15416c..93f7aa42ee2f 100755 --- a/arch/arm/mach-rk30/Makefile +++ b/arch/arm/mach-rk30/Makefile @@ -38,3 +38,4 @@ obj-$(CONFIG_MACH_RK30_PHONE_A22) += board-rk30-phone-a22.o board-rk30-phone-a22 obj-$(CONFIG_MACH_RK3066B_FPGA) += board-rk3066b-fpga.o obj-$(CONFIG_MACH_RK3066B_SDK) += board-rk3066b-sdk.o obj-$(CONFIG_MACH_RK3066B_M701) += board-rk3066b-m701.o +obj-$(CONFIG_MACH_RK3108_TB) += board-rk3108-tb.o diff --git a/arch/arm/mach-rk30/board-rk3108-tb-sdmmc.c b/arch/arm/mach-rk30/board-rk3108-tb-sdmmc.c new file mode 100644 index 000000000000..306ebf363926 --- /dev/null +++ b/arch/arm/mach-rk30/board-rk3108-tb-sdmmc.c @@ -0,0 +1,465 @@ +/* + * + * Copyright (C) 2012 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifdef CONFIG_SDMMC_RK29 + +#if !defined(CONFIG_SDMMC_RK29_OLD) +static void rk29_sdmmc_gpio_open(int device_id, int on) +{ + switch(device_id) + { + case 0://mmc0 + { + #ifdef CONFIG_SDMMC0_RK29 + if(on) + { + gpio_direction_output(RK30_PIN3_PA2,GPIO_HIGH);//set mmc0-clk to high + gpio_direction_output(RK30_PIN3_PA3,GPIO_HIGH);// set mmc0-cmd to high. + gpio_direction_output(RK30_PIN3_PA4,GPIO_HIGH);//set mmc0-data0 to high. + gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data1 to high. + gpio_direction_output(RK30_PIN3_PA6,GPIO_HIGH);//set mmc0-data2 to high. + gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH);//set mmc0-data3 to high. + mdelay(30); + } + else + { + rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_GPIO3A2); + gpio_request(RK30_PIN3_PA2, "mmc0-clk"); + gpio_direction_output(RK30_PIN3_PA2,GPIO_LOW);//set mmc0-clk to low. + + rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_GPIO3A3); + gpio_request(RK30_PIN3_PA3, "mmc0-cmd"); + gpio_direction_output(RK30_PIN3_PA3,GPIO_LOW);//set mmc0-cmd to low. + + rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_GPIO3A4); + gpio_request(RK30_PIN3_PA4, "mmc0-data0"); + gpio_direction_output(RK30_PIN3_PA4,GPIO_LOW);//set mmc0-data0 to low. + + rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_GPIO3A5); + gpio_request(RK30_PIN3_PA5, "mmc0-data1"); + gpio_direction_output(RK30_PIN3_PA5,GPIO_LOW);//set mmc0-data1 to low. + + rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_GPIO3A6); + gpio_request(RK30_PIN3_PA6, "mmc0-data2"); + gpio_direction_output(RK30_PIN3_PA6,GPIO_LOW);//set mmc0-data2 to low. + + rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_GPIO3A7); + gpio_request(RK30_PIN3_PA7, "mmc0-data3"); + gpio_direction_output(RK30_PIN3_PA7,GPIO_LOW);//set mmc0-data3 to low. + mdelay(30); + } + #endif + } + break; + + case 1://mmc1 + { + #ifdef CONFIG_SDMMC1_RK29 + if(on) + { + gpio_direction_output(RK30_PIN3_PC5,GPIO_HIGH);//set mmc1-clk to high + gpio_direction_output(RK30_PIN3_PC0,GPIO_HIGH);//set mmc1-cmd to high. + gpio_direction_output(RK30_PIN3_PC1,GPIO_HIGH);//set mmc1-data0 to high. + gpio_direction_output(RK30_PIN3_PC2,GPIO_HIGH);//set mmc1-data1 to high. + gpio_direction_output(RK30_PIN3_PC3,GPIO_HIGH);//set mmc1-data2 to high. + gpio_direction_output(RK30_PIN3_PC4,GPIO_HIGH);//set mmc1-data3 to high. + mdelay(100); + } + else + { + rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_GPIO3C5); + gpio_request(RK30_PIN3_PC5, "mmc1-clk"); + gpio_direction_output(RK30_PIN3_PC5,GPIO_LOW);//set mmc1-clk to low. + + rk30_mux_api_set(GPIO3C0_SDMMC1CMD_RMIITXEN_NAME, GPIO3C_GPIO3C0); + gpio_request(RK30_PIN3_PC0, "mmc1-cmd"); + gpio_direction_output(RK30_PIN3_PC0,GPIO_LOW);//set mmc1-cmd to low. + + rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME, GPIO3C_GPIO3C1); + gpio_request(RK30_PIN3_PC1, "mmc1-data0"); + gpio_direction_output(RK30_PIN3_PC1,GPIO_LOW);//set mmc1-data0 to low. + mdelay(100); + } + #endif + } + break; + + case 2: //mmc2 + break; + + default: + break; + } +} + +static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width) +{ + switch (bus_width) + { + + case 1://SDMMC_CTYPE_4BIT: + { + rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_SDMMC0DATA1); + rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_SDMMC0DATA2); + rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_SDMMC0DATA3); + } + break; + + case 0x10000://SDMMC_CTYPE_8BIT: + break; + case 0xFFFF: //gpio_reset + { + rk30_mux_api_set(GPIO3A1_SDMMC0PWREN_NAME, GPIO3A_GPIO3A1); + gpio_request(RK30_PIN3_PA1,"sdmmc-power"); + gpio_direction_output(RK30_PIN3_PA1,GPIO_HIGH); //power-off + + rk29_sdmmc_gpio_open(0, 0); + + gpio_direction_output(RK30_PIN3_PA1,GPIO_LOW); //power-on + + rk29_sdmmc_gpio_open(0, 1); + } + break; + + default: //case 0://SDMMC_CTYPE_1BIT: + { + rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_SDMMC0CMD); + rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_SDMMC0CLKOUT); + rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_SDMMC0DATA0); + + rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_GPIO3A5); + gpio_request(RK30_PIN3_PA5, "mmc0-data1"); + gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data1 to high. + + rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_GPIO3A6); + gpio_request(RK30_PIN3_PA5, "mmc0-data2"); + gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data2 to high. + + rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_GPIO3A7); + gpio_request(RK30_PIN3_PA7, "mmc0-data3"); + gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH);//set mmc0-data3 to high. + } + break; + } +} + +static void rk29_sdmmc_set_iomux_mmc1(unsigned int bus_width) +{ + rk30_mux_api_set(GPIO3C0_SDMMC1CMD_RMIITXEN_NAME, GPIO3C_SDMMC1CMD); + rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_SDMMC1CLKOUT); + rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME, GPIO3C_SDMMC1DATA0); + rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_RMIITXD0_NAME, GPIO3C_SDMMC1DATA1); + rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_RMIIRXD0_NAME, GPIO3C_SDMMC1DATA2); + rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_RMIIRXD1_NAME, GPIO3C_SDMMC1DATA3); +} + +static void rk29_sdmmc_set_iomux_mmc2(unsigned int bus_width) +{ + ;// +} + +static void rk29_sdmmc_set_iomux(int device_id, unsigned int bus_width) +{ + switch(device_id) + { + case 0: + #ifdef CONFIG_SDMMC0_RK29 + rk29_sdmmc_set_iomux_mmc0(bus_width); + #endif + break; + case 1: + #ifdef CONFIG_SDMMC1_RK29 + rk29_sdmmc_set_iomux_mmc1(bus_width); + #endif + break; + case 2: + rk29_sdmmc_set_iomux_mmc2(bus_width); + break; + default: + break; + } +} + +#endif + + + +#ifdef CONFIG_WIFI_CONTROL_FUNC + +// +// Define wifi module's power and reset gpio, and gpio sensitive level +// + +#if defined(CONFIG_RK903) || defined(CONFIG_RK901) +#define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN2_PA1 +#define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH +#define RK30SDK_WIFI_GPIO_RESET_N RK30_PIN2_PA2 +#define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE GPIO_HIGH +#endif + +#if defined(CONFIG_RTL8192CU) || defined(CONFIG_RTL8188EU) +#define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN2_PA1 +#define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_LOW +#endif + +#if defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) +#define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN2_PA1 +#define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE GPIO_HIGH +#define RK30SDK_WIFI_GPIO_RESET_N RK30_PIN2_PA2 +#define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE GPIO_HIGH +#endif + +#define PREALLOC_WLAN_SEC_NUM 4 +#define PREALLOC_WLAN_BUF_NUM 160 +#define PREALLOC_WLAN_SECTION_HEADER 24 + +#define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_BUF_NUM * 128) +#define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_BUF_NUM * 128) +#define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_BUF_NUM * 512) +#define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024) + +#define WLAN_SKB_BUF_NUM 16 + +static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM]; + +struct wifi_mem_prealloc { + void *mem_ptr; + unsigned long size; +}; + +static struct wifi_mem_prealloc wifi_mem_array[PREALLOC_WLAN_SEC_NUM] = { + {NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER)}, + {NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER)}, + {NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER)}, + {NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER)} +}; + +static void *rk29sdk_mem_prealloc(int section, unsigned long size) +{ + if (section == PREALLOC_WLAN_SEC_NUM) + return wlan_static_skb; + + if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM)) + return NULL; + + if (wifi_mem_array[section].size < size) + return NULL; + + return wifi_mem_array[section].mem_ptr; +} + +static int __init rk29sdk_init_wifi_mem(void) +{ + int i; + int j; + + for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) { + wlan_static_skb[i] = dev_alloc_skb( + ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192)); + + if (!wlan_static_skb[i]) + goto err_skb_alloc; + } + + for (i = 0 ; i < PREALLOC_WLAN_SEC_NUM ; i++) { + wifi_mem_array[i].mem_ptr = + kmalloc(wifi_mem_array[i].size, GFP_KERNEL); + + if (!wifi_mem_array[i].mem_ptr) + goto err_mem_alloc; + } + return 0; + +err_mem_alloc: + pr_err("Failed to mem_alloc for WLAN\n"); + for (j = 0 ; j < i ; j++) + kfree(wifi_mem_array[j].mem_ptr); + + i = WLAN_SKB_BUF_NUM; + +err_skb_alloc: + pr_err("Failed to skb_alloc for WLAN\n"); + for (j = 0 ; j < i ; j++) + dev_kfree_skb(wlan_static_skb[j]); + + return -ENOMEM; +} + +static int rk29sdk_wifi_cd = 0; /* wifi virtual 'card detect' status */ +static void (*wifi_status_cb)(int card_present, void *dev_id); +static void *wifi_status_cb_devid; + +static int rk29sdk_wifi_status(struct device *dev) +{ + return rk29sdk_wifi_cd; +} + +static int rk29sdk_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id) +{ + if(wifi_status_cb) + return -EAGAIN; + wifi_status_cb = callback; + wifi_status_cb_devid = dev_id; + return 0; +} + +static int __init rk29sdk_wifi_bt_gpio_control_init(void) +{ + rk29sdk_init_wifi_mem(); + + rk30_mux_api_set(GPIO2A1_LCDC1DATA1_SMCDATA1_TRACEDATA1_NAME, GPIO2A_GPIO2A1); + rk30_mux_api_set(GPIO2A2_LCDC1DATA2_SMCDATA2_TRACEDATA2_NAME, GPIO2A_GPIO2A2); + +#ifdef RK30SDK_WIFI_GPIO_POWER_N + if (gpio_request(RK30SDK_WIFI_GPIO_POWER_N, "wifi_power")) { + pr_info("%s: request wifi power gpio failed\n", __func__); + return -1; + } +#endif + +#ifdef RK30SDK_WIFI_GPIO_RESET_N + if (gpio_request(RK30SDK_WIFI_GPIO_RESET_N, "wifi reset")) { + pr_info("%s: request wifi reset gpio failed\n", __func__); + gpio_free(RK30SDK_WIFI_GPIO_POWER_N); + return -1; + } +#endif + +#ifdef RK30SDK_WIFI_GPIO_POWER_N + gpio_direction_output(RK30SDK_WIFI_GPIO_POWER_N, !RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE); +#endif +#ifdef RK30SDK_WIFI_GPIO_RESET_N + gpio_direction_output(RK30SDK_WIFI_GPIO_RESET_N, !RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE); +#endif + + #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) + + rk29_mux_api_set(GPIO3C2_SDMMC1DATA1_RMIITXD0_NAME, GPIO3C_GPIO3C2); + gpio_request(RK30_PIN3_PC2, "mmc1-data1"); + gpio_direction_output(RK30_PIN3_PC2,GPIO_LOW);//set mmc1-data1 to low. + + rk29_mux_api_set(GPIO3C3_SDMMC1DATA2_RMIIRXD0_NAME, GPIO3C_GPIO3C3); + gpio_request(RK30_PIN3_PC3, "mmc1-data2"); + gpio_direction_output(RK30_PIN3_PC3,GPIO_LOW);//set mmc1-data2 to low. + + rk29_mux_api_set(GPIO3C4_SDMMC1DATA3_RMIIRXD1_NAME, GPIO3C_GPIO3C4); + gpio_request(RK30_PIN3_PC4, "mmc1-data3"); + gpio_direction_output(RK30_PIN3_PC4,GPIO_LOW);//set mmc1-data3 to low. + + rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13 +#endif + pr_info("%s: init finished\n",__func__); + + return 0; +} + +int rk29sdk_wifi_power(int on) +{ + pr_info("%s: %d\n", __func__, on); + if (on){ +#ifdef RK30SDK_WIFI_GPIO_POWER_N + gpio_set_value(RK30SDK_WIFI_GPIO_POWER_N, RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE); + mdelay(50); +#endif + + #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) + rk29_sdmmc_gpio_open(1, 1); //added by xbw at 2011-10-13 + #endif + +#ifdef RK30SDK_WIFI_GPIO_RESET_N + gpio_set_value(RK30SDK_WIFI_GPIO_RESET_N, RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE); +#endif + mdelay(100); + pr_info("wifi turn on power\n"); + }else{ +// if (!rk29sdk_bt_power_state){ +#ifdef RK30SDK_WIFI_GPIO_POWER_N + gpio_set_value(RK30SDK_WIFI_GPIO_POWER_N, !RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE); +#endif + + #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) + rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13 + #endif + + mdelay(100); + pr_info("wifi shut off power\n"); +// }else +// { +// pr_info("wifi shouldn't shut off power, bt is using it!\n"); +// } +#ifdef RK30SDK_WIFI_GPIO_RESET_N + gpio_set_value(RK30SDK_WIFI_GPIO_RESET_N, !RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE); +#endif + + } + + //rk29sdk_wifi_power_state = on; + return 0; +} +EXPORT_SYMBOL(rk29sdk_wifi_power); + +static int rk29sdk_wifi_reset_state; +static int rk29sdk_wifi_reset(int on) +{ + pr_info("%s: %d\n", __func__, on); + //mdelay(100); + rk29sdk_wifi_reset_state = on; + return 0; +} + +int rk29sdk_wifi_set_carddetect(int val) +{ + pr_info("%s:%d\n", __func__, val); + rk29sdk_wifi_cd = val; + if (wifi_status_cb){ + wifi_status_cb(val, wifi_status_cb_devid); + }else { + pr_warning("%s, nobody to notify\n", __func__); + } + return 0; +} +EXPORT_SYMBOL(rk29sdk_wifi_set_carddetect); + +#define WIFI_HOST_WAKE RK30_PIN3_PD2 + +static struct resource resources[] = { + { + .start = WIFI_HOST_WAKE, + .flags = IORESOURCE_IRQ, + .name = "bcmdhd_wlan_irq", + }, +}; + +static struct wifi_platform_data rk29sdk_wifi_control = { + .set_power = rk29sdk_wifi_power, + .set_reset = rk29sdk_wifi_reset, + .set_carddetect = rk29sdk_wifi_set_carddetect, + .mem_prealloc = rk29sdk_mem_prealloc, +}; + +static struct platform_device rk29sdk_wifi_device = { + .name = "bcmdhd_wlan", + .id = 1, + .num_resources = ARRAY_SIZE(resources), + .resource = resources, + .dev = { + .platform_data = &rk29sdk_wifi_control, + }, +}; +#endif + + +#endif // endif --#ifdef CONFIG_SDMMC_RK29 + diff --git a/arch/arm/mach-rk30/board-rk3108-tb.c b/arch/arm/mach-rk30/board-rk3108-tb.c new file mode 100644 index 000000000000..a4bf83f88214 --- /dev/null +++ b/arch/arm/mach-rk30/board-rk3108-tb.c @@ -0,0 +1,1797 @@ +/* + * + * Copyright (C) 2012 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_MFD_RK610) +#include +#endif + +#if defined(CONFIG_RK_HDMI) + #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h" +#endif + +#if defined(CONFIG_SPIM_RK29) +#include "../../../drivers/spi/rk29_spim.h" +#endif +#if defined(CONFIG_GPS_RK) +#include "../../../drivers/misc/gps/rk_gps/rk_gps.h" +#endif + +#if defined(CONFIG_MU509) +#include +#endif +#if defined(CONFIG_MW100) +#include +#endif +#if defined(CONFIG_MT6229) +#include +#endif +#if defined(CONFIG_ANDROID_TIMED_GPIO) +#include "../../../drivers/staging/android/timed_gpio.h" +#endif + +#ifdef CONFIG_THREE_FB_BUFFER +#define RK30_FB0_MEM_SIZE 12*SZ_1M +#else +#define RK30_FB0_MEM_SIZE 8*SZ_1M +#endif + +#include "board-rk3066b-sdk-camera.c" +#include "board-rk3066b-sdk-key.c" + +#if defined(CONFIG_TOUCHSCREEN_GT8XX) +#define TOUCH_RESET_PIN RK30_PIN2_PC0 +#define TOUCH_PWR_PIN RK30_PIN2_PB4 +static int goodix_init_platform_hw(void) +{ + int ret; + + rk30_mux_api_set(GPIO2C0_LCDC1DATA16_SMCADDR0_TRACECLK_NAME, GPIO2C_GPIO2C0); + rk30_mux_api_set(GPIO2B4_LCDC1DATA12_SMCDATA12_TRACEDATA12_NAME, GPIO2B_GPIO2B4); + printk("%s:0x%x,0x%x\n",__func__,rk30_mux_api_get(GPIO2C0_LCDC1DATA16_SMCADDR0_TRACECLK_NAME),rk30_mux_api_get(GPIO2B4_LCDC1DATA12_SMCDATA12_TRACEDATA12_NAME)); + + if (TOUCH_PWR_PIN != INVALID_GPIO) { + ret = gpio_request(TOUCH_PWR_PIN, "goodix power pin"); + if (ret != 0) { + gpio_free(TOUCH_PWR_PIN); + printk("goodix power error\n"); + return -EIO; + } + gpio_direction_output(TOUCH_PWR_PIN, 0); + gpio_set_value(TOUCH_PWR_PIN, GPIO_LOW); + msleep(100); + } + + if (TOUCH_RESET_PIN != INVALID_GPIO) { + ret = gpio_request(TOUCH_RESET_PIN, "goodix reset pin"); + if (ret != 0) { + gpio_free(TOUCH_RESET_PIN); + printk("goodix gpio_request error\n"); + return -EIO; + } + gpio_direction_output(TOUCH_RESET_PIN, 1); + msleep(100); + //gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW); + //msleep(100); + //gpio_set_value(TOUCH_RESET_PIN, GPIO_HIGH); + //msleep(500); + } + return 0; +} + +struct goodix_platform_data goodix_info = { + .model = 8105, + .irq_pin = RK30_PIN0_PD4, + .rest_pin = TOUCH_RESET_PIN, + .init_platform_hw = goodix_init_platform_hw, +}; +#endif + +static struct spi_board_info board_spi_devices[] = { +}; + +/*********************************************************** +* rk30 backlight +************************************************************/ +#ifdef CONFIG_BACKLIGHT_RK29_BL +#define PWM_ID 2 +#define PWM_MUX_NAME GPIO3D5_PWM2_JTAGTCK_OTGDRVVBUS_NAME +#define PWM_MUX_MODE GPIO3D_PWM2 +#define PWM_MUX_MODE_GPIO GPIO3D_GPIO3D5 +#define PWM_GPIO RK30_PIN3_PD5 +#define PWM_EFFECT_VALUE 1 + +#define LCD_DISP_ON_PIN + +#ifdef LCD_DISP_ON_PIN +#define BL_EN_PIN RK30_PIN0_PA2 +#define BL_EN_VALUE GPIO_HIGH +#endif +static int rk29_backlight_io_init(void) +{ + int ret = 0; + rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE); +#ifdef LCD_DISP_ON_PIN + // rk30_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE); + + ret = gpio_request(BL_EN_PIN, NULL); + if (ret != 0) { + gpio_free(BL_EN_PIN); + } + + gpio_direction_output(BL_EN_PIN, 0); + gpio_set_value(BL_EN_PIN, BL_EN_VALUE); +#endif + return ret; +} + +static int rk29_backlight_io_deinit(void) +{ + int ret = 0; +#ifdef LCD_DISP_ON_PIN + gpio_free(BL_EN_PIN); +#endif + rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO); + gpio_request(PWM_GPIO, NULL); + gpio_direction_output(PWM_GPIO, GPIO_LOW); + return ret; +} + +static int rk29_backlight_pwm_suspend(void) +{ + int ret = 0; + rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO); + if (gpio_request(PWM_GPIO, NULL)) { + printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__); + return -1; + } + gpio_direction_output(PWM_GPIO, GPIO_LOW); +#ifdef LCD_DISP_ON_PIN + gpio_direction_output(BL_EN_PIN, 0); + gpio_set_value(BL_EN_PIN, !BL_EN_VALUE); +#endif + return ret; +} + +static int rk29_backlight_pwm_resume(void) +{ + gpio_free(PWM_GPIO); + rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE); +#ifdef LCD_DISP_ON_PIN + msleep(30); + gpio_direction_output(BL_EN_PIN, 1); + gpio_set_value(BL_EN_PIN, BL_EN_VALUE); +#endif + return 0; +} + +static struct rk29_bl_info rk29_bl_info = { + .pwm_id = PWM_ID, + .bl_ref = PWM_EFFECT_VALUE, + .io_init = rk29_backlight_io_init, + .io_deinit = rk29_backlight_io_deinit, + .pwm_suspend = rk29_backlight_pwm_suspend, + .pwm_resume = rk29_backlight_pwm_resume, +}; + +static struct platform_device rk29_device_backlight = { + .name = "rk29_backlight", + .id = -1, + .dev = { + .platform_data = &rk29_bl_info, + } +}; + +#endif + +#ifdef CONFIG_RK29_SUPPORT_MODEM + +#define RK30_MODEM_POWER RK30_PIN2_PB0 +#define RK30_MODEM_POWER_IOMUX rk29_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0) + +static int rk30_modem_io_init(void) +{ + printk("%s\n", __FUNCTION__); + RK30_MODEM_POWER_IOMUX; + + return 0; +} + +static struct rk29_io_t rk30_modem_io = { + .io_addr = RK30_MODEM_POWER, + .enable = GPIO_HIGH, + .disable = GPIO_LOW, + .io_init = rk30_modem_io_init, +}; + +static struct platform_device rk30_device_modem = { + .name = "rk30_modem", + .id = -1, + .dev = { + .platform_data = &rk30_modem_io, + } +}; +#endif +#if defined(CONFIG_MU509) +static int mu509_io_init(void) +{ + + rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0); + rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME, GPIO2D_GPIO2D1); + rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME, GPIO2B_GPIO2B7); + rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME, GPIO2C_GPIO2C0); + return 0; +} + +static int mu509_io_deinit(void) +{ + + return 0; +} + +struct rk29_mu509_data rk29_mu509_info = { + .io_init = mu509_io_init, + .io_deinit = mu509_io_deinit, + .modem_power_en = RK30_PIN2_PB0, + .bp_power = RK30_PIN2_PB0, + .bp_reset = RK30_PIN2_PD1, + .ap_wakeup_bp = RK30_PIN2_PB7, + .bp_wakeup_ap = RK30_PIN6_PA0, +}; +struct platform_device rk29_device_mu509 = { + .name = "mu509", + .id = -1, + .dev = { + .platform_data = &rk29_mu509_info, + } + }; +#endif +#if defined(CONFIG_MW100) +static int mw100_io_init(void) +{ + rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0); + rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME, GPIO2D_GPIO2D1); + rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME, GPIO2B_GPIO2B7); + rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME, GPIO2C_GPIO2C0); + return 0; +} + +static int mw100_io_deinit(void) +{ + + return 0; +} + +struct rk29_mw100_data rk29_mw100_info = { + .io_init = mw100_io_init, + .io_deinit = mw100_io_deinit, + .modem_power_en = RK30_PIN6_PB0, + .bp_power = RK30_PIN2_PB0, + .bp_reset = RK30_PIN2_PD1, + .ap_wakeup_bp = RK30_PIN2_PB7, + .bp_wakeup_ap = RK30_PIN6_PA0, +}; +struct platform_device rk29_device_mw100 = { + .name = "mw100", + .id = -1, + .dev = { + .platform_data = &rk29_mw100_info, + } + }; +#endif +#if defined(CONFIG_MT6229) +static int mt6229_io_init(void) +{ + rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0); + rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME, GPIO2D_GPIO2D1); + rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME, GPIO2B_GPIO2B7); + rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME, GPIO2C_GPIO2C0); + return 0; +} + +static int mt6229_io_deinit(void) +{ + + return 0; +} + +struct rk29_mt6229_data rk29_mt6229_info = { + .io_init = mt6229_io_init, + .io_deinit = mt6229_io_deinit, + .modem_power_en = RK30_PIN2_PB0, + .bp_power = RK30_PIN2_PB0,//RK30_PIN2_PB6, + .bp_reset = RK30_PIN2_PD1, + .ap_wakeup_bp = RK30_PIN2_PC0, + .bp_wakeup_ap = RK30_PIN6_PA0, +}; +struct platform_device rk29_device_mt6229 = { + .name = "mt6229", + .id = -1, + .dev = { + .platform_data = &rk29_mt6229_info, + } + }; +#endif + +/*MMA8452 gsensor*/ +#if defined (CONFIG_GS_MMA8452) +#define MMA8452_INT_PIN RK30_PIN3_PD7 + +static int mma8452_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data mma8452_info = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = mma8452_init_platform_hw, + .orientation = {-1, 0, 0, 0, 0, 1, 0, -1, 0}, +}; +#endif +#if defined (CONFIG_GS_LIS3DH) +#define LIS3DH_INT_PIN RK30_PIN3_PD7 + +static int lis3dh_init_platform_hw(void) +{ + + return 0; +} + +static struct sensor_platform_data lis3dh_info = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = lis3dh_init_platform_hw, + .orientation = {-1, 0, 0, 0, 0, 1, 0, -1, 0}, +}; +#endif +#if defined (CONFIG_COMPASS_AK8975) +static struct sensor_platform_data akm8975_info = +{ + .type = SENSOR_TYPE_COMPASS, + .irq_enable = 1, + .poll_delay_ms = 30, + .m_layout = + { + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + } +}; + +#endif + +#if defined(CONFIG_GYRO_L3G4200D) + +#include +#define L3G4200D_INT_PIN RK30_PIN0_PB4 + +static int l3g4200d_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data l3g4200d_info = { + .type = SENSOR_TYPE_GYROSCOPE, + .irq_enable = 1, + .poll_delay_ms = 30, + .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1}, + .init_platform_hw = l3g4200d_init_platform_hw, + .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware + .y_min = 40, + .z_min = 20, +}; + +#endif + +#ifdef CONFIG_LS_CM3217 +static struct sensor_platform_data cm3217_info = { + .type = SENSOR_TYPE_LIGHT, + .irq_enable = 0, + .poll_delay_ms = 500, +}; + +#endif + +#ifdef CONFIG_FB_ROCKCHIP + +#define LCD_CS_PIN INVALID_GPIO +#define LCD_CS_VALUE GPIO_HIGH + +#define LCD_EN_PIN RK30_PIN0_PB0 +#define LCD_EN_VALUE GPIO_HIGH + +static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting) +{ + int ret = 0; + + if(LCD_CS_PIN !=INVALID_GPIO) + { + ret = gpio_request(LCD_CS_PIN, NULL); + if (ret != 0) + { + gpio_free(LCD_CS_PIN); + printk(KERN_ERR "request lcd cs pin fail!\n"); + return -1; + } + else + { + gpio_direction_output(LCD_CS_PIN, LCD_CS_VALUE); + } + } + + if(LCD_EN_PIN !=INVALID_GPIO) + { + ret = gpio_request(LCD_EN_PIN, NULL); + if (ret != 0) + { + gpio_free(LCD_EN_PIN); + printk(KERN_ERR "request lcd en pin fail!\n"); + return -1; + } + else + { + gpio_direction_output(LCD_EN_PIN, LCD_EN_VALUE); + } + } + return 0; +} +static int rk_fb_io_disable(void) +{ + if(LCD_CS_PIN !=INVALID_GPIO) + { + gpio_set_value(LCD_CS_PIN, !LCD_CS_VALUE); + } + if(LCD_EN_PIN !=INVALID_GPIO) + { + gpio_set_value(LCD_EN_PIN, !LCD_EN_VALUE); + } + return 0; +} +static int rk_fb_io_enable(void) +{ + if(LCD_CS_PIN !=INVALID_GPIO) + { + gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE); + } + if(LCD_EN_PIN !=INVALID_GPIO) + { + gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE); + } + return 0; +} + +#if defined(CONFIG_LCDC0_RK3066B) +struct rk29fb_info lcdc0_screen_info = { + .prop = PRMRY, //primary display device + .io_init = rk_fb_io_init, + .io_disable = rk_fb_io_disable, + .io_enable = rk_fb_io_enable, + .set_screen_info = set_lcd_info, +}; +#endif + +#if defined(CONFIG_LCDC1_RK3066B) +struct rk29fb_info lcdc1_screen_info = { + #if defined(CONFIG_RK_HDMI) + .prop = EXTEND, //extend display device + .lcd_info = NULL, + .set_screen_info = hdmi_init_lcdc, + #endif +}; +#endif + +static struct resource resource_fb[] = { + [0] = { + .name = "fb0 buf", + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "ipp buf", //for rotate + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .name = "fb2 buf", + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device device_fb = { + .name = "rk-fb", + .id = -1, + .num_resources = ARRAY_SIZE(resource_fb), + .resource = resource_fb, +}; +#endif + +#if defined(CONFIG_LCDC0_RK3066B) +static struct resource resource_lcdc0[] = { + [0] = { + .name = "lcdc0 reg", + .start = RK30_LCDC0_PHYS, + .end = RK30_LCDC0_PHYS + RK30_LCDC0_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + + [1] = { + .name = "lcdc0 irq", + .start = IRQ_LCDC0, + .end = IRQ_LCDC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device device_lcdc0 = { + .name = "rk30-lcdc", + .id = 0, + .num_resources = ARRAY_SIZE(resource_lcdc0), + .resource = resource_lcdc0, + .dev = { + .platform_data = &lcdc0_screen_info, + }, +}; +#endif +#if defined(CONFIG_LCDC1_RK3066B) +static struct resource resource_lcdc1[] = { + [0] = { + .name = "lcdc1 reg", + .start = RK30_LCDC1_PHYS, + .end = RK30_LCDC1_PHYS + RK30_LCDC1_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "lcdc1 irq", + .start = IRQ_LCDC1, + .end = IRQ_LCDC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device device_lcdc1 = { + .name = "rk30-lcdc", + .id = 1, + .num_resources = ARRAY_SIZE(resource_lcdc1), + .resource = resource_lcdc1, + .dev = { + .platform_data = &lcdc1_screen_info, + }, +}; +#endif + +#if defined(CONFIG_MFD_RK610) +#if 1 +#define RK610_RST_PIN_MUX_NAME GPIO2C5_LCDC1DATA21_SMCADDR5_NAME +#define RK610_RST_PIN_MUX_MODE GPIO2C_GPIO2C5 +#define RK610_RST_PIN RK30_PIN2_PC5 +#else +#define RK610_RST_PIN_MUX_NAME GPIO2D6_SMCCSN1_NAME +#define RK610_RST_PIN_MUX_MODE GPIO2D_GPIO2D6 +#define RK610_RST_PIN RK30_PIN2_PD6 + +#endif +static int rk610_power_on_init(void) +{ + int ret; + if(RK610_RST_PIN != INVALID_GPIO) + { + rk30_mux_api_set(RK610_RST_PIN_MUX_NAME,RK610_RST_PIN_MUX_MODE); + ret = gpio_request(RK610_RST_PIN, "rk610 reset"); + if (ret) + { + printk(KERN_ERR "rk610_control_probe request gpio fail\n"); + } + else + { + gpio_direction_output(RK610_RST_PIN, GPIO_HIGH); + msleep(100); + gpio_direction_output(RK610_RST_PIN, GPIO_LOW); + msleep(100); + gpio_set_value(RK610_RST_PIN, GPIO_HIGH); + } + } + + return 0; + +} + + +static struct rk610_ctl_platform_data rk610_ctl_pdata = { + .rk610_power_on_init = rk610_power_on_init, +}; +#endif + +#ifdef CONFIG_ANDROID_TIMED_GPIO +static struct timed_gpio timed_gpios[] = { + { + .name = "vibrator", + .gpio = RK30_PIN3_PD3, + .max_timeout = 1000, + .active_low = 0, + .adjust_time =20, //adjust for diff product + }, +}; + +static struct timed_gpio_platform_data rk29_vibrator_info = { + .num_gpios = 1, + .gpios = timed_gpios, +}; + +static struct platform_device rk29_device_vibrator = { + .name = "timed-gpio", + .id = -1, + .dev = { + .platform_data = &rk29_vibrator_info, + }, + +}; +#endif + +#ifdef CONFIG_LEDS_GPIO_PLATFORM +static struct gpio_led rk29_leds[] = { + { + .name = "button-backlight", + .gpio = RK30_PIN2_PB3, + .default_trigger = "timer", + .active_low = 0, + .retain_state_suspended = 0, + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, +}; + +static struct gpio_led_platform_data rk29_leds_pdata = { + .leds = rk29_leds, + .num_leds = ARRAY_SIZE(rk29_leds), +}; + +static struct platform_device rk29_device_gpio_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &rk29_leds_pdata, + }, +}; +#endif + +#ifdef CONFIG_RK_IRDA +#define IRDA_IRQ_PIN RK30_PIN0_PA3 + +static int irda_iomux_init(void) +{ + int ret = 0; + + //irda irq pin + ret = gpio_request(IRDA_IRQ_PIN, NULL); + if (ret != 0) { + gpio_free(IRDA_IRQ_PIN); + printk(">>>>>> IRDA_IRQ_PIN gpio_request err \n "); + } + gpio_pull_updown(IRDA_IRQ_PIN, PullDisable); + gpio_direction_input(IRDA_IRQ_PIN); + + return 0; +} + +static int irda_iomux_deinit(void) +{ + gpio_free(IRDA_IRQ_PIN); + return 0; +} + +static struct irda_info rk29_irda_info = { + .intr_pin = IRDA_IRQ_PIN, + .iomux_init = irda_iomux_init, + .iomux_deinit = irda_iomux_deinit, + //.irda_pwr_ctl = bu92747guw_power_ctl, +}; + +static struct platform_device irda_device = { +#ifdef CONFIG_RK_IRDA_NET + .name = "rk_irda", +#else + .name = "bu92747_irda", +#endif + .id = -1, + .dev = { + .platform_data = &rk29_irda_info, + } +}; +#endif + +#ifdef CONFIG_ION +#define ION_RESERVE_SIZE (80 * SZ_1M) +static struct ion_platform_data rk30_ion_pdata = { + .nr = 1, + .heaps = { + { + .type = ION_HEAP_TYPE_CARVEOUT, + .id = ION_NOR_HEAP_ID, + .name = "norheap", + .size = ION_RESERVE_SIZE, + } + }, +}; + +static struct platform_device device_ion = { + .name = "ion-rockchip", + .id = 0, + .dev = { + .platform_data = &rk30_ion_pdata, + }, +}; +#endif + +/************************************************************************************************** + * SDMMC devices, include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05 +**************************************************************************************************/ +#ifdef CONFIG_SDMMC_RK29 +#include "board-rk3108-tb-sdmmc.c" + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) +#define SDMMC0_WRITE_PROTECT_PIN RK30_PIN3_PB7 //According to your own project to set the value of write-protect-pin. +#endif + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) +#define SDMMC1_WRITE_PROTECT_PIN RK30_PIN3_PC7 //According to your own project to set the value of write-protect-pin. +#endif + +#define RK29SDK_WIFI_SDIO_CARD_DETECT_N RK30_PIN6_PB2 + +#endif //endif ---#ifdef CONFIG_SDMMC_RK29 + +#ifdef CONFIG_SDMMC0_RK29 +static int rk29_sdmmc0_cfg_gpio(void) +{ +#ifdef CONFIG_SDMMC_RK29_OLD + rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME, GPIO3B_SDMMC0_CMD); + rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_SDMMC0_CLKOUT); + rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME, GPIO3B_SDMMC0_DATA0); + rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_SDMMC0_DATA1); + rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME, GPIO3B_SDMMC0_DATA2); + rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_SDMMC0_DATA3); + + rk30_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B6); + + rk30_mux_api_set(GPIO3A7_SDMMC0PWREN_NAME, GPIO3A_GPIO3A7); + gpio_request(RK30_PIN3_PA7, "sdmmc-power"); + gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW); + +#else + rk29_sdmmc_set_iomux(0, 0xFFFF); + + rk30_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0DETECTN); + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) + gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp"); + gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN); +#endif + +#endif + + return 0; +} + +#define CONFIG_SDMMC0_USE_DMA +struct rk29_sdmmc_platform_data default_sdmmc0_data = { + .host_ocr_avail = + (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 | + MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | + MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36), + .host_caps = + (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), + .io_init = rk29_sdmmc0_cfg_gpio, + +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif + + .dma_name = "sd_mmc", +#ifdef CONFIG_SDMMC0_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + .detect_irq = RK30_PIN3_PB6, // INVALID_GPIO + .enable_sd_wakeup = 0, + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) + .write_prt = SDMMC0_WRITE_PROTECT_PIN, +#else + .write_prt = INVALID_GPIO, +#endif +}; +#endif // CONFIG_SDMMC0_RK29 + +#ifdef CONFIG_SDMMC1_RK29 +#define CONFIG_SDMMC1_USE_DMA +static int rk29_sdmmc1_cfg_gpio(void) +{ +#if defined(CONFIG_SDMMC_RK29_OLD) + rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME, GPIO3C_SMMC1_CMD); + rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_SDMMC1_CLKOUT); + rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_SDMMC1_DATA0); + rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME, GPIO3C_SDMMC1_DATA1); + rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME, GPIO3C_SDMMC1_DATA2); + rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME, GPIO3C_SDMMC1_DATA3); + //rk30_mux_api_set(GPIO3C6_SDMMC1DETECTN_NAME, GPIO3C_SDMMC1_DETECT_N); + +#else + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) + gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp"); + gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN); +#endif + +#endif + + return 0; +} + +struct rk29_sdmmc_platform_data default_sdmmc1_data = { + .host_ocr_avail = + (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 | + MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | + MMC_VDD_33_34), + +#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD) + .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ | + MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), +#else + .host_caps = + (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), +#endif + + .io_init = rk29_sdmmc1_cfg_gpio, + +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif + + .dma_name = "sdio", +#ifdef CONFIG_SDMMC1_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + +#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD) +#ifdef CONFIG_WIFI_CONTROL_FUNC + .status = rk29sdk_wifi_status, + .register_status_notify = rk29sdk_wifi_status_register, +#endif +#if 0 + .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N, +#endif + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) + .write_prt = SDMMC1_WRITE_PROTECT_PIN, +#else + .write_prt = INVALID_GPIO, +#endif + +#else + .detect_irq = INVALID_GPIO, + .enable_sd_wakeup = 0, +#endif + +}; +#endif //endif--#ifdef CONFIG_SDMMC1_RK29 + +/************************************************************************************************** + * the end of setting for SDMMC devices +**************************************************************************************************/ + +#ifdef CONFIG_BATTERY_RK30_ADC +static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = { + .dc_det_pin = RK30_PIN0_PB2, + .batt_low_pin = RK30_PIN0_PB1, + .charge_set_pin = INVALID_GPIO, + .charge_ok_pin = RK30_PIN0_PA6, + .dc_det_level = GPIO_LOW, + .charge_ok_level = GPIO_HIGH, +}; + +static struct platform_device rk30_device_adc_battery = { + .name = "rk30-battery", + .id = -1, + .dev = { + .platform_data = &rk30_adc_battery_platdata, + }, +}; +#endif +#ifdef CONFIG_RK30_PWM_REGULATOR +const static int pwm_voltage_map[] = { + 950000, 975000,1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, 1400000 +}; + +static struct regulator_consumer_supply pwm_dcdc1_consumers[] = { + { + .supply = "vdd_core", + } +}; + +struct regulator_init_data pwm_regulator_init_dcdc[1] = +{ + { + .constraints = { + .name = "PWM_DCDC1", + .min_uV = 600000, + .max_uV = 1800000, //0.6-1.8V + .apply_uV = true, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(pwm_dcdc1_consumers), + .consumer_supplies = pwm_dcdc1_consumers, + }, +}; + +static struct pwm_platform_data pwm_regulator_info[1] = { + { + .pwm_id = 3, + .pwm_gpio = RK30_PIN3_PD6, + .pwm_iomux_name = GPIO3D6_PWM3_JTAGTMS_HOSTDRVVBUS_NAME, + .pwm_iomux_pwm = GPIO3D_PWM3, + .pwm_iomux_gpio = GPIO3D_GPIO3D6, + .pwm_voltage = 1100000, + .suspend_voltage = 1050000, + .min_uV = 950000, + .max_uV = 1400000, + .coefficient = 455, //45.5% + .pwm_voltage_map = pwm_voltage_map, + .init_data = &pwm_regulator_init_dcdc[0], + }, +}; + +struct platform_device pwm_regulator_device[1] = { + { + .name = "pwm-voltage-regulator", + .id = 0, + .dev = { + .platform_data = &pwm_regulator_info[0], + } + }, +}; +#endif + +#ifdef CONFIG_RK29_VMAC +#define PHY_PWR_EN_GPIO RK30_PIN1_PD6 +#include "board-rk30-sdk-vmac.c" +#endif + +#ifdef CONFIG_RFKILL_RK +// bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c +static struct rfkill_rk_platform_data rfkill_rk_platdata = { + .type = RFKILL_TYPE_BLUETOOTH, + + .poweron_gpio = { // BT_REG_ON + .io = INVALID_GPIO, //RK30_PIN3_PC7, + .enable = GPIO_HIGH, + .iomux = { + .name = GPIO3C7_SDMMC1WRITEPRT_RMIICRS_NAME, + .fgpio = GPIO3C_GPIO3C7, + }, + }, + + .reset_gpio = { // BT_RST + .io = RK30_PIN3_PD1, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, + .iomux = { + .name = GPIO3D1_SDMMC1BACKENDPWR_MIIMDCLK_NAME, + .fgpio = GPIO3D_GPIO3D1, + }, + }, + + .wake_gpio = { // BT_WAKE, use to control bt's sleep and wakeup + .io = RK30_PIN3_PC6, // set io to INVALID_GPIO for disable it + .enable = GPIO_HIGH, + .iomux = { + .name = GPIO3C6_SDMMC1DETECTN_RMIIRXERR_NAME, + .fgpio = GPIO3C_GPIO3C6, + }, + }, + + .wake_host_irq = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep + .gpio = { + .io = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, // set GPIO_LOW for falling, set 0 for rising + .iomux = { + .name = NULL, + }, + }, + }, + + .rts_gpio = { // UART_RTS, enable or disable BT's data coming + .io = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, + .iomux = { + .name = GPIO1A3_UART0RTSN_NAME, + .fgpio = GPIO1A_GPIO1A3, + .fmux = GPIO1A_UART0RTSN, + }, + }, +}; + +static struct platform_device device_rfkill_rk = { + .name = "rfkill_rk", + .id = -1, + .dev = { + .platform_data = &rfkill_rk_platdata, + }, +}; +#endif + +#if defined(CONFIG_GPS_RK) +int rk_gps_io_init(void) +{ + printk("%s \n", __FUNCTION__); + + rk30_mux_api_set(GPIO1B5_UART3RTSN_NAME, GPIO1B_GPIO1B5);//VCC_EN + gpio_request(RK30_PIN1_PB5, NULL); + gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW); + + rk30_mux_api_set(GPIO1B4_UART3CTSN_GPSRFCLK_NAME, GPIO1B_GPSRFCLK);//GPS_CLK + rk30_mux_api_set(GPIO1B2_UART3SIN_GPSMAG_NAME, GPIO1B_GPSMAG);//GPS_MAG + rk30_mux_api_set(GPIO1B3_UART3SOUT_GPSSIG_NAME, GPIO1B_GPSSIG);//GPS_SIGN + + rk30_mux_api_set(GPIO1A6_UART1CTSN_SPI0CLK_NAME, GPIO1A_GPIO1A6);//SPI_CLK + gpio_request(RK30_PIN1_PA6, NULL); + gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW); + + rk30_mux_api_set(GPIO1A5_UART1SOUT_SPI0TXD_NAME, GPIO1A_GPIO1A5);//SPI_MOSI + gpio_request(RK30_PIN1_PA5, NULL); + gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW); + + rk30_mux_api_set(GPIO1A7_UART1RTSN_SPI0CSN0_NAME, GPIO1A_GPIO1A7);//SPI_CS + gpio_request(RK30_PIN1_PA7, NULL); + gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW); + return 0; +} +int rk_gps_power_up(void) +{ + printk("%s \n", __FUNCTION__); + + return 0; +} + +int rk_gps_power_down(void) +{ + printk("%s \n", __FUNCTION__); + + return 0; +} + +int rk_gps_reset_set(int level) +{ + return 0; +} +int rk_enable_hclk_gps(void) +{ + printk("%s \n", __FUNCTION__); + clk_enable(clk_get(NULL, "hclk_gps")); + return 0; +} +int rk_disable_hclk_gps(void) +{ + printk("%s \n", __FUNCTION__); + clk_disable(clk_get(NULL, "hclk_gps")); + return 0; +} +struct rk_gps_data rk_gps_info = { + .io_init = rk_gps_io_init, + .power_up = rk_gps_power_up, + .power_down = rk_gps_power_down, + .reset = rk_gps_reset_set, + .enable_hclk_gps = rk_enable_hclk_gps, + .disable_hclk_gps = rk_disable_hclk_gps, + .GpsSign = RK30_PIN1_PB3, + .GpsMag = RK30_PIN1_PB2, //GPIO index + .GpsClk = RK30_PIN1_PB4, //GPIO index + .GpsVCCEn = RK30_PIN1_PB5, //GPIO index + .GpsSpi_CSO = RK30_PIN1_PA4, //GPIO index + .GpsSpiClk = RK30_PIN1_PA5, //GPIO index + .GpsSpiMOSI = RK30_PIN1_PA7, //GPIO index + .GpsIrq = IRQ_GPS, + .GpsSpiEn = 0, + .GpsAdcCh = 2, + .u32GpsPhyAddr = RK30_GPS_PHYS, + .u32GpsPhySize = RK30_GPS_SIZE, +}; + +struct platform_device rk_device_gps = { + .name = "gps_hv5820b", + .id = -1, + .dev = { + .platform_data = &rk_gps_info, + } + }; +#endif + + +static struct platform_device *devices[] __initdata = { +#ifdef CONFIG_FB_ROCKCHIP + &device_fb, +#endif +#if defined(CONFIG_LCDC0_RK3066B) + &device_lcdc0, +#endif +#if defined(CONFIG_LCDC1_RK3066B) + &device_lcdc1, +#endif + +#ifdef CONFIG_BACKLIGHT_RK29_BL + &rk29_device_backlight, +#endif + +#ifdef CONFIG_ION + &device_ion, +#endif +#ifdef CONFIG_ANDROID_TIMED_GPIO + &rk29_device_vibrator, +#endif +#ifdef CONFIG_LEDS_GPIO_PLATFORM + &rk29_device_gpio_leds, +#endif +#ifdef CONFIG_RK_IRDA + &irda_device, +#endif +#ifdef CONFIG_WIFI_CONTROL_FUNC + &rk29sdk_wifi_device, +#endif +#ifdef CONFIG_RK29_SUPPORT_MODEM + &rk30_device_modem, +#endif +#if defined(CONFIG_MU509) + &rk29_device_mu509, +#endif +#if defined(CONFIG_MW100) + &rk29_device_mw100, +#endif +#if defined(CONFIG_MT6229) + &rk29_device_mt6229, +#endif +#ifdef CONFIG_BATTERY_RK30_ADC + &rk30_device_adc_battery, +#endif +#ifdef CONFIG_RFKILL_RK + &device_rfkill_rk, +#endif +#ifdef CONFIG_GPS_RK + &rk_device_gps, +#endif + +}; + +// i2c +#ifdef CONFIG_I2C0_RK30 +static struct i2c_board_info __initdata i2c0_info[] = { +#if defined (CONFIG_GS_MMA8452) + { + .type = "gs_mma8452", + .addr = 0x1d, + .flags = 0, + .irq = MMA8452_INT_PIN, + .platform_data = &mma8452_info, + }, +#endif +#if defined (CONFIG_GS_LIS3DH) + { + .type = "gs_lis3dh", + .addr = 0x19, //0x19(SA0-->VCC), 0x18(SA0-->GND) + .flags = 0, + .irq = LIS3DH_INT_PIN, + .platform_data = &lis3dh_info, + }, +#endif +#if defined (CONFIG_COMPASS_AK8975) + { + .type = "ak8975", + .addr = 0x0d, + .flags = 0, + .irq = RK30_PIN0_PD5, + .platform_data = &akm8975_info, + }, +#endif +#if defined (CONFIG_GYRO_L3G4200D) + { + .type = "l3g4200d_gryo", + .addr = 0x69, + .flags = 0, + .irq = L3G4200D_INT_PIN, + .platform_data = &l3g4200d_info, + }, +#endif +#if defined (CONFIG_SND_SOC_RK1000) + { + .type = "rk1000_i2c_codec", + .addr = 0x60, + .flags = 0, + }, + { + .type = "rk1000_control", + .addr = 0x40, + .flags = 0, + }, +#endif +#if defined (CONFIG_SND_SOC_RT5631) + { + .type = "rt5631", + .addr = 0x1a, + .flags = 0, + }, +#endif + +#ifdef CONFIG_MFD_RK610 + { + .type = "rk610_ctl", + .addr = 0x40, + .flags = 0, + .platform_data = &rk610_ctl_pdata, + }, +#ifdef CONFIG_RK610_TVOUT + { + .type = "rk610_tvout", + .addr = 0x42, + .flags = 0, + }, +#endif +#ifdef CONFIG_HDMI_RK610 + { + .type = "rk610_hdmi", + .addr = 0x46, + .flags = 0, + .irq = INVALID_GPIO, + }, +#endif +#ifdef CONFIG_SND_SOC_RK610 + {//RK610_CODEC addr from 0x60 to 0x80 (0x60~0x80) + .type = "rk610_i2c_codec", + .addr = 0x60, + .flags = 0, + }, +#endif +#endif + +}; +#endif + +int __sramdata g_pmic_type = 0; +#ifdef CONFIG_I2C1_RK30 +#ifdef CONFIG_MFD_WM831X_I2C +#define PMU_POWER_SLEEP RK30_PIN0_PA1 + +static struct pmu_info wm8326_dcdc_info[] = { + { + .name = "vdd_core", //logic + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 950000, + }, + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 950000, + }, + { + .name = "dcdc3", //ddr + .min_uv = 1150000, + .max_uv = 1150000, + .suspend_vol = 1150000, + }, + #ifdef CONFIG_MACH_RK3066_SDK + { + .name = "dcdc4", //vcc_io + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3000000, + }, + #else + { + .name = "dcdc4", //vcc_io + .min_uv = 3000000, + .max_uv = 3000000, + .suspend_vol = 2800000, + }, + #endif +}; + +static struct pmu_info wm8326_ldo_info[] = { + { + .name = "ldo1", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo2", //vccio_wl + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo3", // + .min_uv = 1100000, + .max_uv = 1100000, + .suspend_vol = 1100000, + }, + { + .name = "ldo4", //vdd11 + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 1000000, + }, + { + .name = "ldo5", //vcc25 + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo6", //vcc33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo7", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + .suspend_vol = 2800000, + }, + { + .name = "ldo8", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo9", //vcc_tp + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo10", //flash_io + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, +}; + +#include "board-rk3066b-wm8326.c" +#endif + +#ifdef CONFIG_MFD_TPS65910 +#ifdef CONFIG_ARCH_RK3066B +#define TPS65910_HOST_IRQ RK30_PIN0_PB3 +#else +#define TPS65910_HOST_IRQ RK30_PIN6_PA4 +#endif + +#define PMU_POWER_SLEEP RK30_PIN0_PA1 + +static struct pmu_info tps65910_dcdc_info[] = { + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + }, + { + .name = "vdd2", //ddr + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "vio", //vcc_io + .min_uv = 3000000, + .max_uv = 3000000, + }, + +}; +static struct pmu_info tps65910_ldo_info[] = { + { + .name = "vpll", //vcc25 + .min_uv = 2500000, + .max_uv = 2500000, + }, + { + .name = "vdig1", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "vdig2", //vdd11 + .min_uv = 1000000, + .max_uv = 1000000, + }, + { + .name = "vaux1", //vcc25_hdmi + .min_uv = 2500000, + .max_uv = 2500000, + }, + { + .name = "vaux2", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "vaux33", //vcc_tp + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "vmmc", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + }, + { + .name = "vdac", //vccio_wl + .min_uv = 1800000, + .max_uv = 1800000, + }, + }; + +#include "board-rk3066b-tps65910.c" +#endif + +static struct i2c_board_info __initdata i2c1_info[] = { +#if defined (CONFIG_MFD_WM831X_I2C) + { + .type = "wm8326", + .addr = 0x34, + .flags = 0, + .irq = RK30_PIN0_PB3, + .platform_data = &wm831x_platdata, + }, +#endif +#if defined (CONFIG_MFD_TPS65910) + { + .type = "tps65910", + .addr = TPS65910_I2C_ID0, + .flags = 0, + .irq = TPS65910_HOST_IRQ, + .platform_data = &tps65910_data, + }, +#endif +}; +#endif + +void __sramfunc board_pmu_suspend(void) +{ + #if defined (CONFIG_MFD_WM831X_I2C) + if(pmic_is_wm8326()) + board_pmu_wm8326_suspend(); + #endif + #if defined (CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + board_pmu_tps65910_suspend(); + #endif +} + +void __sramfunc board_pmu_resume(void) +{ + #if defined (CONFIG_MFD_WM831X_I2C) + if(pmic_is_wm8326()) + board_pmu_wm8326_resume(); + #endif + #if defined (CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + board_pmu_tps65910_resume(); + #endif +} + + int __sramdata gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en; + +void __sramfunc rk30_pwm_logic_suspend_voltage(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + +// int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en; + sram_udelay(10000); + gpio0d7_iomux = readl_relaxed(GRF_GPIO0D_IOMUX); + gpio0d7_do = grf_readl(GRF_GPIO0H_DO); + gpio0d7_dir = grf_readl(GRF_GPIO0H_DIR); + gpio0d7_en = grf_readl(GRF_GPIO0H_EN); + + writel_relaxed((1<<30), GRF_GPIO0D_IOMUX); + grf_writel((1<<31)|(1<<15), GRF_GPIO0H_DIR); + grf_writel((1<<31)|(1<<15), GRF_GPIO0H_DO); + grf_writel((1<<31)|(1<<15), GRF_GPIO0H_EN); +#endif +} +void __sramfunc rk30_pwm_logic_resume_voltage(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + writel_relaxed((1<<30)|gpio0d7_iomux, GRF_GPIO0D_IOMUX); + grf_writel((1<<31)|gpio0d7_en, GRF_GPIO0H_EN); + grf_writel((1<<31)|gpio0d7_dir, GRF_GPIO0H_DIR); + grf_writel((1<<31)|gpio0d7_do, GRF_GPIO0H_DO); + sram_udelay(10000); + +#endif + +} +extern void pwm_suspend_voltage(void); +extern void pwm_resume_voltage(void); +void rk30_pwm_suspend_voltage_set(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + pwm_suspend_voltage(); +#endif +} +void rk30_pwm_resume_voltage_set(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + pwm_resume_voltage(); +#endif +} + + +#ifdef CONFIG_I2C2_RK30 +static struct i2c_board_info __initdata i2c2_info[] = { +#if defined (CONFIG_TOUCHSCREEN_GT8XX) + { + .type = "Goodix-TS", + .addr = 0x55, + .flags = 0, + .irq = RK30_PIN0_PD4, + .platform_data = &goodix_info, + }, +#endif +#if defined (CONFIG_LS_CM3217) + { + .type = "lightsensor", + .addr = 0x10, + .flags = 0, + .platform_data = &cm3217_info, + }, +#endif +}; +#endif + +#ifdef CONFIG_I2C3_RK30 +static struct i2c_board_info __initdata i2c3_info[] = { +}; +#endif + +#ifdef CONFIG_I2C4_RK30 +static struct i2c_board_info __initdata i2c4_info[] = { +}; +#endif + +#ifdef CONFIG_I2C_GPIO_RK30 +#define I2C_SDA_PIN INVALID_GPIO// RK30_PIN2_PD6 //set sda_pin here +#define I2C_SCL_PIN INVALID_GPIO//RK30_PIN2_PD7 //set scl_pin here +static int rk30_i2c_io_init(void) +{ + //set iomux (gpio) here + //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7); + //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6); + + return 0; +} +struct i2c_gpio_platform_data default_i2c_gpio_data = { + .sda_pin = I2C_SDA_PIN, + .scl_pin = I2C_SCL_PIN, + .udelay = 5, // clk = 500/udelay = 100Khz + .timeout = 100,//msecs_to_jiffies(100), + .bus_num = 5, + .io_init = rk30_i2c_io_init, +}; +static struct i2c_board_info __initdata i2c_gpio_info[] = { +}; +#endif + +static void __init rk30_i2c_register_board_info(void) +{ +#ifdef CONFIG_I2C0_RK30 + i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info)); +#endif +#ifdef CONFIG_I2C1_RK30 + i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info)); +#endif +#ifdef CONFIG_I2C2_RK30 + i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info)); +#endif +#ifdef CONFIG_I2C3_RK30 + i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info)); +#endif +#ifdef CONFIG_I2C4_RK30 + i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info)); +#endif +#ifdef CONFIG_I2C_GPIO_RK30 + i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info)); +#endif +} +//end of i2c + +#define POWER_ON_PIN RK30_PIN0_PA0 //power_hold +static void rk30_pm_power_off(void) +{ + printk(KERN_ERR "rk30_pm_power_off start...\n"); + gpio_direction_output(POWER_ON_PIN, GPIO_LOW); +#if defined(CONFIG_MFD_WM831X) + wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0 + wm831x_device_shutdown(Wm831x);//wm8326 shutdown +#endif + while (1); +} + +static void __init machine_rk30_board_init(void) +{ + //avs_init(); + gpio_request(POWER_ON_PIN, "poweronpin"); + gpio_direction_output(POWER_ON_PIN, GPIO_HIGH); + + pm_power_off = rk30_pm_power_off; + + gpio_direction_output(POWER_ON_PIN, GPIO_HIGH); + + //test + rk30_mux_api_set(GPIO2A1_LCDC1DATA1_SMCDATA1_TRACEDATA1_NAME, GPIO2A_GPIO2A1); + rk30_mux_api_set(GPIO2A2_LCDC1DATA2_SMCDATA2_TRACEDATA2_NAME, GPIO2A_GPIO2A2); + gpio_request(RK30_PIN2_PA1, NULL); + gpio_direction_output(RK30_PIN2_PA1, GPIO_HIGH); + + rk30_i2c_register_board_info(); + spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices)); + platform_add_devices(devices, ARRAY_SIZE(devices)); + board_usb_detect_init(RK30_PIN0_PA7); + +#ifdef CONFIG_WIFI_CONTROL_FUNC + rk29sdk_wifi_bt_gpio_control_init(); +#endif +} + +static void __init rk30_reserve(void) +{ +#ifdef CONFIG_ION + rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE); +#endif +#ifdef CONFIG_FB_ROCKCHIP + resource_fb[0].start = board_mem_reserve_add("fb0", RK30_FB0_MEM_SIZE); + resource_fb[0].end = resource_fb[0].start + RK30_FB0_MEM_SIZE - 1; + #if 0 + resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE); + resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1; + resource_fb[2].start = board_mem_reserve_add("fb2", RK30_FB0_MEM_SIZE); + resource_fb[2].end = resource_fb[2].start + RK30_FB0_MEM_SIZE - 1; + #endif +#endif +#ifdef CONFIG_VIDEO_RK29 + rk30_camera_request_reserve_mem(); +#endif + +#ifdef CONFIG_GPS_RK + //it must be more than 8MB + rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M); +#endif + board_mem_reserved(); +} + +/** + * dvfs_cpu_logic_table: table for arm and logic dvfs + * @frequency : arm frequency + * @cpu_volt : arm voltage depend on frequency + * @logic_volt : logic voltage arm requests depend on frequency + * comments : min arm/logic voltage + */ +static struct dvfs_arm_table dvfs_cpu_logic_table[] = { + {.frequency = 312 * 1000, .cpu_volt = 850 * 1000, .logic_volt = 1000 * 1000}, + {.frequency = 504 * 1000, .cpu_volt = 900 * 1000, .logic_volt = 1000 * 1000}, + {.frequency = 816 * 1000, .cpu_volt = 950 * 1000, .logic_volt = 1000 * 1000}, + {.frequency = 1008 * 1000, .cpu_volt = 1025 * 1000, .logic_volt = 1000 * 1000}, + {.frequency = 1200 * 1000, .cpu_volt = 1100 * 1000, .logic_volt = 1050 * 1000}, + {.frequency = 1416 * 1000, .cpu_volt = 1200 * 1000, .logic_volt = 1150 * 1000}, + {.frequency = 1608 * 1000, .cpu_volt = 1300 * 1000, .logic_volt = 1250 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_gpu_table[] = { + {.frequency = 100 * 1000, .index = 900 * 1000}, + {.frequency = 200 * 1000, .index = 900 * 1000}, + {.frequency = 266 * 1000, .index = 900 * 1000}, + {.frequency = 300 * 1000, .index = 900 * 1000}, + {.frequency = 400 * 1000, .index = 950 * 1000}, + {.frequency = 600 * 1000, .index = 1100 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_ddr_table[] = { + {.frequency = 300 * 1000, .index = 900 * 1000}, + {.frequency = 400 * 1000, .index = 950 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table)) +static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE]; +static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE]; + +void __init board_clock_init(void) +{ + rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS); + dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table); + dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table); + dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table); +} + +MACHINE_START(RK30, "RK30board") + .boot_params = PLAT_PHYS_OFFSET + 0x800, + .fixup = rk30_fixup, + .reserve = &rk30_reserve, + .map_io = rk30_map_io, + .init_irq = rk30_init_irq, + .timer = &rk30_timer, + .init_machine = machine_rk30_board_init, +MACHINE_END -- 2.34.1