From 31978a7a9477da7209df0692683d8b6840bd57af Mon Sep 17 00:00:00 2001 From: huang zhibao Date: Wed, 8 Jul 2015 09:41:51 +0800 Subject: [PATCH] dts: 3368 box dts add dcdc eta3558 --- arch/arm64/boot/dts/rk3368-box-r88.dts | 53 ++++++++++++++++++++++++++ arch/arm64/boot/dts/rk3368-box.dts | 53 ++++++++++++++++++++++++++ 2 files changed, 106 insertions(+) diff --git a/arch/arm64/boot/dts/rk3368-box-r88.dts b/arch/arm64/boot/dts/rk3368-box-r88.dts index de019ed08fcb..25be49499d17 100755 --- a/arch/arm64/boot/dts/rk3368-box-r88.dts +++ b/arch/arm64/boot/dts/rk3368-box-r88.dts @@ -467,6 +467,59 @@ }; }; }; + + eta355c: eta355c@60 { + compatible = "eta3555"; + reg = <0x60>; + status = "okay"; + regulators { + #address-cells = <1>; + #size-cells = <0>; + eta355c_dc1: regulator@0 { + reg = <0>; + regulator-compatible = "eta_dcdc1"; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <902500>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x1>; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-state-mode = <0x2>; + regulator-state-enabled; + regulator-state-uv = <1000000>; + }; + }; + }; + }; + + + eta3558: eta3558@40 { + compatible = "eta3555"; + reg = <0x40>; + status = "disabled"; + regulators { + #address-cells = <1>; + #size-cells = <0>; + eta3558_dc1: regulator@0 { + reg = <0>; + regulator-compatible = "eta_dcdc1"; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <902500>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-state-mode = <0x2>; + regulator-state-enabled; + regulator-state-uv = <1000000>; + }; + }; + }; + }; act8846: act8846@5a { reg = <0x5a>; diff --git a/arch/arm64/boot/dts/rk3368-box.dts b/arch/arm64/boot/dts/rk3368-box.dts index 133e57d3c294..7ba3c05b0f4f 100755 --- a/arch/arm64/boot/dts/rk3368-box.dts +++ b/arch/arm64/boot/dts/rk3368-box.dts @@ -461,6 +461,59 @@ }; }; }; + + eta355c: eta355c@60 { + compatible = "eta3555"; + reg = <0x60>; + status = "okay"; + regulators { + #address-cells = <1>; + #size-cells = <0>; + eta355c_dc1: regulator@0 { + reg = <0>; + regulator-compatible = "eta_dcdc1"; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <902500>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x1>; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-state-mode = <0x2>; + regulator-state-enabled; + regulator-state-uv = <1000000>; + }; + }; + }; + }; + + + eta3558: eta3558@40 { + compatible = "eta3555"; + reg = <0x40>; + status = "disabled"; + regulators { + #address-cells = <1>; + #size-cells = <0>; + eta3558_dc1: regulator@0 { + reg = <0>; + regulator-compatible = "eta_dcdc1"; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <902500>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-state-mode = <0x2>; + regulator-state-enabled; + regulator-state-uv = <1000000>; + }; + }; + }; + }; act8846: act8846@5a { reg = <0x5a>; -- 2.34.1