From 32dcf8b8e9a1697f7f72490927ccc009d25920e0 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 1 Oct 2015 02:02:46 +0000 Subject: [PATCH] AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D12451 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248978 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/SIRegisterInfo.h | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/lib/Target/AMDGPU/SIRegisterInfo.h b/lib/Target/AMDGPU/SIRegisterInfo.h index c59c0147e8a..3458cec0923 100644 --- a/lib/Target/AMDGPU/SIRegisterInfo.h +++ b/lib/Target/AMDGPU/SIRegisterInfo.h @@ -90,15 +90,18 @@ public: bool opCanUseInlineConstant(unsigned OpType) const; enum PreloadedValue { - TGID_X, - TGID_Y, - TGID_Z, - SCRATCH_WAVE_OFFSET, - SCRATCH_PTR, - INPUT_PTR, - TIDIG_X, - TIDIG_Y, - TIDIG_Z + // SGPRS: + SCRATCH_PTR = 0, + INPUT_PTR = 3, + TGID_X = 10, + TGID_Y = 11, + TGID_Z = 12, + SCRATCH_WAVE_OFFSET = 14, + // VGPRS: + FIRST_VGPR_VALUE = 15, + TIDIG_X = FIRST_VGPR_VALUE, + TIDIG_Y = 16, + TIDIG_Z = 17, }; /// \brief Returns the physical register that \p Value is stored in. -- 2.34.1