From 32ed2d02a4c76b5f5cc3cc6cc012171ac69101cb Mon Sep 17 00:00:00 2001 From: yxj Date: Thu, 13 Mar 2014 07:28:20 +0800 Subject: [PATCH] clean up rk screen --- drivers/video/rockchip/Kconfig | 2 +- drivers/video/rockchip/Makefile | 3 +- drivers/video/rockchip/lcdc/Kconfig | 63 - drivers/video/rockchip/rk_fb.c | 71 +- drivers/video/rockchip/screen/Kconfig | 192 +- drivers/video/rockchip/screen/Makefile | 68 +- drivers/video/rockchip/screen/lcd_AT070TNA2.c | 36 - .../video/rockchip/screen/lcd_AUO_A080SN03.c | 42 - .../rockchip/screen/lcd_B080XAN02_mipi.c | 39 +- drivers/video/rockchip/screen/lcd_B101AW06.c | 36 - .../rockchip/screen/lcd_CPTclaa038la31xe.c | 327 ---- .../rockchip/screen/lcd_E242868_rk3028_86v.c | 68 - .../rockchip/screen/lcd_E242868_rk3168_86v.c | 68 - .../screen/lcd_E242868_rk3168_rk616_86v.c | 223 --- .../video/rockchip/screen/lcd_I30_800x480.c | 62 - .../video/rockchip/screen/lcd_LD089WU1_mipi.c | 39 +- .../video/rockchip/screen/lcd_LG_LP097X02.c | 33 - drivers/video/rockchip/screen/lcd_LP097QX1.c | 77 - .../video/rockchip/screen/lcd_YQ70CPT9160.c | 38 - .../screen/lcd_YQ70CPT9160_rk3168_86v.c | 36 - .../rockchip/screen/lcd_YQ70CPT9160_v86.c | 40 - drivers/video/rockchip/screen/lcd_a060se02.c | 168 -- .../rockchip/screen/lcd_androidcomputer.c | 69 - drivers/video/rockchip/screen/lcd_at070tn93.c | 34 - drivers/video/rockchip/screen/lcd_auto.c | 474 ----- drivers/video/rockchip/screen/lcd_b101ew05.c | 251 --- .../rockchip/screen/lcd_b101uano_1920x1200.c | 138 -- .../video/rockchip/screen/lcd_byd1024x600.c | 42 - drivers/video/rockchip/screen/lcd_common.c | 79 - drivers/video/rockchip/screen/lcd_ds1006h.c | 187 -- drivers/video/rockchip/screen/lcd_general.c | 8 + .../video/rockchip/screen/lcd_hdmi_1024x600.c | 182 -- .../video/rockchip/screen/lcd_hdmi_1024x768.c | 138 -- .../video/rockchip/screen/lcd_hdmi_1280x800.c | 141 -- .../video/rockchip/screen/lcd_hdmi_1366x768.c | 178 -- .../video/rockchip/screen/lcd_hdmi_800x480.c | 138 -- .../screen/lcd_hdmi_rk3168m_b101ew05.c | 85 - .../video/rockchip/screen/lcd_hh070d_lvds.c | 36 - .../video/rockchip/screen/lcd_hj050na_06a.c | 378 ---- drivers/video/rockchip/screen/lcd_hj080na.c | 34 - drivers/video/rockchip/screen/lcd_hj101na.c | 42 - drivers/video/rockchip/screen/lcd_hl070vm4.c | 171 -- drivers/video/rockchip/screen/lcd_hsd100pxn.c | 130 -- .../screen/lcd_hsd100pxn_for_tdw851.c | 284 --- .../video/rockchip/screen/lcd_hsd800x480.c | 207 --- drivers/video/rockchip/screen/lcd_hv070wsa.c | 36 - drivers/video/rockchip/screen/lcd_hx8357.c | 368 ---- .../rockchip/screen/lcd_ili9803_cpt4_3.c | 380 ---- .../rockchip/screen/lcd_ips1p5680_v1_e.c | 239 --- .../rockchip/screen/lcd_mcu_tft480800_25_e.c | 556 ------ drivers/video/rockchip/screen/lcd_mq0801d.c | 186 -- drivers/video/rockchip/screen/lcd_nt35510.c | 1600 ----------------- drivers/video/rockchip/screen/lcd_nt35580.c | 437 ----- drivers/video/rockchip/screen/lcd_nt35582.c | 436 ----- drivers/video/rockchip/screen/lcd_null.c | 41 - .../rockchip/screen/lcd_rgb_tft480800_25_e.c | 603 ------- drivers/video/rockchip/screen/lcd_rk2928.c | 78 - .../video/rockchip/screen/lcd_rk3168_fac.c | 203 --- drivers/video/rockchip/screen/lcd_s1d13521.c | 355 ---- .../video/rockchip/screen/lcd_td043mgea1.c | 40 - .../video/rockchip/screen/lcd_tj048nc01ca.c | 173 -- .../video/rockchip/screen/lcd_tl5001_mipi.c | 406 ----- drivers/video/rockchip/screen/lcd_tx23d88vm.c | 36 - .../video/rockchip/screen/lcd_wy_800x480.c | 68 - drivers/video/rockchip/screen/rk_screen.c | 396 +--- drivers/video/rockchip/screen/s1d13521.h | 95 - drivers/video/rockchip/screen/s1d13521ioctl.h | 134 -- include/linux/rk_fb.h | 10 + 68 files changed, 132 insertions(+), 11901 deletions(-) delete mode 100755 drivers/video/rockchip/screen/lcd_AT070TNA2.c delete mode 100644 drivers/video/rockchip/screen/lcd_AUO_A080SN03.c delete mode 100755 drivers/video/rockchip/screen/lcd_B101AW06.c delete mode 100644 drivers/video/rockchip/screen/lcd_CPTclaa038la31xe.c delete mode 100755 drivers/video/rockchip/screen/lcd_E242868_rk3028_86v.c delete mode 100644 drivers/video/rockchip/screen/lcd_E242868_rk3168_86v.c delete mode 100755 drivers/video/rockchip/screen/lcd_E242868_rk3168_rk616_86v.c delete mode 100644 drivers/video/rockchip/screen/lcd_I30_800x480.c delete mode 100644 drivers/video/rockchip/screen/lcd_LG_LP097X02.c delete mode 100644 drivers/video/rockchip/screen/lcd_LP097QX1.c delete mode 100644 drivers/video/rockchip/screen/lcd_YQ70CPT9160.c delete mode 100644 drivers/video/rockchip/screen/lcd_YQ70CPT9160_rk3168_86v.c delete mode 100644 drivers/video/rockchip/screen/lcd_YQ70CPT9160_v86.c delete mode 100644 drivers/video/rockchip/screen/lcd_a060se02.c delete mode 100755 drivers/video/rockchip/screen/lcd_androidcomputer.c delete mode 100755 drivers/video/rockchip/screen/lcd_at070tn93.c delete mode 100644 drivers/video/rockchip/screen/lcd_auto.c delete mode 100755 drivers/video/rockchip/screen/lcd_b101ew05.c delete mode 100644 drivers/video/rockchip/screen/lcd_b101uano_1920x1200.c delete mode 100755 drivers/video/rockchip/screen/lcd_byd1024x600.c delete mode 100644 drivers/video/rockchip/screen/lcd_common.c delete mode 100644 drivers/video/rockchip/screen/lcd_ds1006h.c create mode 100644 drivers/video/rockchip/screen/lcd_general.c delete mode 100644 drivers/video/rockchip/screen/lcd_hdmi_1024x600.c delete mode 100644 drivers/video/rockchip/screen/lcd_hdmi_1024x768.c delete mode 100644 drivers/video/rockchip/screen/lcd_hdmi_1280x800.c delete mode 100644 drivers/video/rockchip/screen/lcd_hdmi_1366x768.c delete mode 100644 drivers/video/rockchip/screen/lcd_hdmi_800x480.c delete mode 100644 drivers/video/rockchip/screen/lcd_hdmi_rk3168m_b101ew05.c delete mode 100755 drivers/video/rockchip/screen/lcd_hh070d_lvds.c delete mode 100644 drivers/video/rockchip/screen/lcd_hj050na_06a.c delete mode 100755 drivers/video/rockchip/screen/lcd_hj080na.c delete mode 100644 drivers/video/rockchip/screen/lcd_hj101na.c delete mode 100755 drivers/video/rockchip/screen/lcd_hl070vm4.c delete mode 100644 drivers/video/rockchip/screen/lcd_hsd100pxn.c delete mode 100644 drivers/video/rockchip/screen/lcd_hsd100pxn_for_tdw851.c delete mode 100755 drivers/video/rockchip/screen/lcd_hsd800x480.c delete mode 100644 drivers/video/rockchip/screen/lcd_hv070wsa.c delete mode 100755 drivers/video/rockchip/screen/lcd_hx8357.c delete mode 100644 drivers/video/rockchip/screen/lcd_ili9803_cpt4_3.c delete mode 100644 drivers/video/rockchip/screen/lcd_ips1p5680_v1_e.c delete mode 100644 drivers/video/rockchip/screen/lcd_mcu_tft480800_25_e.c delete mode 100644 drivers/video/rockchip/screen/lcd_mq0801d.c delete mode 100644 drivers/video/rockchip/screen/lcd_nt35510.c delete mode 100755 drivers/video/rockchip/screen/lcd_nt35580.c delete mode 100644 drivers/video/rockchip/screen/lcd_nt35582.c delete mode 100644 drivers/video/rockchip/screen/lcd_null.c delete mode 100644 drivers/video/rockchip/screen/lcd_rgb_tft480800_25_e.c delete mode 100644 drivers/video/rockchip/screen/lcd_rk2928.c delete mode 100644 drivers/video/rockchip/screen/lcd_rk3168_fac.c delete mode 100644 drivers/video/rockchip/screen/lcd_s1d13521.c delete mode 100644 drivers/video/rockchip/screen/lcd_td043mgea1.c delete mode 100755 drivers/video/rockchip/screen/lcd_tj048nc01ca.c delete mode 100644 drivers/video/rockchip/screen/lcd_tl5001_mipi.c delete mode 100755 drivers/video/rockchip/screen/lcd_tx23d88vm.c delete mode 100755 drivers/video/rockchip/screen/lcd_wy_800x480.c delete mode 100644 drivers/video/rockchip/screen/s1d13521.h delete mode 100644 drivers/video/rockchip/screen/s1d13521ioctl.h diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig index cd5db950da19..6034139cacf2 100755 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -60,7 +60,7 @@ config THREE_FB_BUFFER source "drivers/video/rockchip/lcdc/Kconfig" -#source "drivers/video/rockchip/screen/Kconfig" +source "drivers/video/rockchip/screen/Kconfig" source "drivers/video/rockchip/transmitter/Kconfig" source "drivers/video/rockchip/hdmi/Kconfig" source "drivers/video/rockchip/tve/Kconfig" diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 9595aff9370d..40b81fcf3093 100755 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -1,5 +1,6 @@ -obj-$(CONFIG_FB_ROCKCHIP) += rk_fb.o rkfb_sysfs.o lcdc/ +obj-$(CONFIG_FB_ROCKCHIP) += rk_fb.o rkfb_sysfs.o screen/ obj-$(CONFIG_RK_TRSM) += transmitter/ +obj-$(CONFIG_FB_ROCKCHIP) += lcdc/ obj-$(CONFIG_ROCKCHIP_RGA) += rga/ obj-$(CONFIG_ROCKCHIP_RGA2) += rga2/ obj-$(CONFIG_RK_HDMI) += display-sys.o hdmi/ diff --git a/drivers/video/rockchip/lcdc/Kconfig b/drivers/video/rockchip/lcdc/Kconfig index b45cdec8b772..57b69439b96b 100755 --- a/drivers/video/rockchip/lcdc/Kconfig +++ b/drivers/video/rockchip/lcdc/Kconfig @@ -10,19 +10,6 @@ config LCDC_RK30 help Driver for rk30 lcdc .There are two lcd controllers on rk30 -config LCDC0_RK30 - bool "lcdc0 support" - depends on LCDC_RK30 - default y - help - Support rk30 lcdc0 if you say y here - -config LCDC1_RK30 - bool "lcdc1 support" - depends on LCDC_RK30 - default y if HDMI_RK30 - help - Support rk30 lcdc1 if you say y here config LCDC_RK3066B tristate "rk3066b lcdc support" @@ -30,33 +17,6 @@ config LCDC_RK3066B help Driver for rk3066b lcdc. -config LCDC0_RK3066B - bool "lcdc0 support" - depends on LCDC_RK3066B - default y - help - Support lcdc0 if you say y here - -config RK3066B_LCDC0_IO_18V - bool "lcdc0 1.8v io support" - depends on LCDC0_RK3066B - default n - help - LCDC0 io voltage is 1.8V if you say y here,the default voltage is 3.3V - -config LCDC1_RK3066B - bool "lcdc1 support" - depends on LCDC_RK3066B - default n - help - Support lcdc1 if you say y here - -config RK3066B_LCDC1_IO_18V - bool "lcdc1 1.8v io support" - depends on LCDC1_RK3066B - default n - help - LCDC1 io voltage is 1.8V if you say y here,the default voltage is 3.3V config LCDC_RK3188 @@ -64,30 +24,7 @@ config LCDC_RK3188 depends on FB_ROCKCHIP help Driver for rk3188/rk302x/rk319x lcdc.There are two lcd controllers on rk3188 -config LCDC0_RK3188 - bool "lcdc0 support" - depends on LCDC_RK3188 - help - Support rk3188 lcdc0 if you say y here -config LCDC0_IO_18V - bool "lcdc0 1.8v io support" - depends on LCDC0_RK3188 - default n - help - LCDC0 io voltage is 1.8V if you say y here,the default voltage is 3.3V -config LCDC1_RK3188 - bool "lcdc1 support" - depends on LCDC_RK3188 - help - Support rk3188 lcdc1 if you say y here - -config LCDC1_IO_18V - bool "lcdc1 1.8v io support" - depends on LCDC1_RK3188 - default n - help - LCDC1 io voltage is 1.8V if you say y here,the default voltage is 3.3V config LCDC_RK3288 bool "rk3288 lcdc support" diff --git a/drivers/video/rockchip/rk_fb.c b/drivers/video/rockchip/rk_fb.c index 20f4e6af465c..a2b3d32f0c3a 100755 --- a/drivers/video/rockchip/rk_fb.c +++ b/drivers/video/rockchip/rk_fb.c @@ -58,6 +58,58 @@ EXPORT_SYMBOL(video_data_to_mirroring); #endif +static struct rk_fb_trsm_ops *trsm_lvds_ops; +static struct rk_fb_trsm_ops *trsm_edp_ops; +static struct rk_fb_trsm_ops *trsm_mipi_ops; + +int rk_fb_trsm_ops_register(struct rk_fb_trsm_ops *ops, int type) +{ + switch (type) { + case SCREEN_RGB: + case SCREEN_LVDS: + case SCREEN_DUAL_LVDS: + trsm_lvds_ops = ops; + break; + case SCREEN_EDP: + trsm_edp_ops = ops; + break; + case SCREEN_MIPI: + case SCREEN_DUAL_MIPI: + trsm_mipi_ops = ops; + break; + default: + printk(KERN_WARNING "%s:un supported transmitter:%d!\n", + __func__, type); + break; + } + return 0; +} + +struct rk_fb_trsm_ops *rk_fb_trsm_ops_get(int type) +{ + struct rk_fb_trsm_ops *ops; + switch (type) { + case SCREEN_RGB: + case SCREEN_LVDS: + case SCREEN_DUAL_LVDS: + ops = trsm_lvds_ops; + break; + case SCREEN_EDP: + ops = trsm_edp_ops; + break; + case SCREEN_MIPI: + case SCREEN_DUAL_MIPI: + ops = trsm_mipi_ops; + break; + default: + ops = NULL; + printk(KERN_WARNING "%s:un supported transmitter:%d!\n", + __func__, type); + break; + } + return ops; +} + int rk_fb_pixel_width(int data_format) { int pixel_width; @@ -276,14 +328,14 @@ int rk_fb_video_mode_from_timing(const struct display_timing *dt, return 0; } -int rk_disp_prase_timing_dt(struct rk_lcdc_driver *dev_drv) + +int rk_fb_prase_timing_dt(struct device_node *np, struct rk_screen *screen) { struct display_timings *disp_timing; struct display_timing *dt; - struct rk_screen *screen = dev_drv->cur_screen; - disp_timing = of_get_display_timings(dev_drv->dev->of_node); + disp_timing = of_get_display_timings(np); if (!disp_timing) { - dev_err(dev_drv->dev, "parse display timing err\n"); + pr_err("parse display timing err\n"); return -EINVAL; } dt = display_timings_get(disp_timing, 0); @@ -462,14 +514,6 @@ static struct rk_lcdc_driver *rk_get_extend_lcdc_drv(void) return dev_drv; } -int rk_fb_get_prmry_screen(struct rk_screen *screen) -{ - struct rk_lcdc_driver *dev_drv = rk_get_prmry_lcdc_drv(); - memcpy(screen, dev_drv->screen0, sizeof(struct rk_screen)); - return 0; - - -} u32 rk_fb_get_prmry_screen_pixclock(void) { @@ -2339,7 +2383,8 @@ static int init_lcdc_device_driver(struct rk_fb *rk_fb, dev_drv->ops->fb_win_remap(dev_drv, FB_DEFAULT_ORDER); dev_drv->first_frame = 1; rk_disp_pwr_ctr_parse_dt(dev_drv); - rk_disp_prase_timing_dt(dev_drv); + if (dev_drv->prop == PRMRY) + rk_fb_get_prmry_screen(screen); return 0; } diff --git a/drivers/video/rockchip/screen/Kconfig b/drivers/video/rockchip/screen/Kconfig index 9f5ed6df7bcc..d95bc00d7ae2 100755 --- a/drivers/video/rockchip/screen/Kconfig +++ b/drivers/video/rockchip/screen/Kconfig @@ -2,198 +2,14 @@ choice depends on FB_ROCKCHIP prompt "LCD Panel Select" -config LCD_NULL - bool "NULL" - -config LCD_RK2928 - bool "RK2928 LCD" - depends on MACH_RK2928 - -config LCD_LG_LP097X02 - bool "RGB LCD_LG_LP097X02 1024X768" - -config LCD_TD043MGEA1 - bool "RGB TD043MGEA1" - -config LCD_HX8357 - bool "RGB HX8357" - -config LCD_TJ048NC01CA - bool "RGB TJ048NC01CA" - -config LCD_HL070VM4AU - bool "RGB_HL070VM4AU" - -config LCD_HSD070IDW1 - bool "RGB Hannstar800x480" - -config LCD_RGB_TFT480800_25_E - bool "RGB TFT480800_25_E" - -config LCD_HSD100PXN - bool "RGB Hannstar HSD100PXN(1024X768)" - -config LCD_BYD8688FTGF - bool "RGB BYD 1024X600 8688FTGF" - -config LCD_B101AW06 - bool "RGB Hannstar B101AW06(1024X600)" - -config LCD_RGB_TFT480800_25_E - bool "RGB TFT480800_25_E(480X800)" - -config LCD_LS035Y8DX02A - bool "RGB LS035Y8DX02A(480X800)" - -config LCD_LS035Y8DX04A - bool "RGB LS035Y8DX04A(480X800)" - -config LCD_HSD100PXN_FOR_TDW851 - bool "RGB Hannstar HSD100PXN(800X480)" - -config LCD_CPTCLAA038LA31XE - bool "RGB LCD_CPTCLAA038LA31XE(480X800)" - -config LCD_A060SE02 - bool "MCU A060SE02" - -config LCD_S1D13521 - bool "MCU S1D13521" - -config LCD_NT35582 - bool "MCU NT35582" - -config LCD_NT35580 - bool "MCU NT35580" - -config LCD_IPS1P5680_V1_E - bool "MCU IPS1P5680_V1_E" - -config LCD_MCU_TFT480800_25_E - bool "MCU TFT480800_25_E" - -config LCD_NT35510 - bool "RGB lcd_nt35510" - -config LCD_ILI9803_CPT4_3 - bool "RGB lcd_ILI9803_CPT4_3" - -config LCD_IPS1P5680_V1_E - bool "MCU IPS1P5680_V1_E" - -config LCD_MCU_TFT480800_25_E - bool "MCU TFT480800_25_E" - -config LCD_AT070TNA2 - bool "RGB AT070TNA2" - -config LCD_AT070TN93 - bool "RGB AT070TN93" - -config LCD_TX23D88VM - bool "HITACHI LVDS TX23D88VM (1200x800)" - -config LCD_A050VL01 - bool "RGB A050VL01" - -config LCD_B101EW05 - bool "RGB lcd panel B101EW05" - -config LCD_RK3168M_B101EW05 - bool "RGB lcd panel LCD_RK3168M_B101EW05" - -config LCD_HJ050NA_06A - bool "RGB lcd panel HJ050NA-06A" - -config LCD_HDMI_1366x768 - bool "RK610 LCD_HDMI_1366X768" - ---help--- - if support RK610, this setting can support dual screen output - -config LCD_HDMI_1280x800 - bool "RGB Hannstar LCD_HDMI_1280X800" - ---help--- - if support RK610, this setting can support dual screen output - -config LCD_HDMI_1024x768 - bool "RGB Hannstar LCD_HDMI_1024X768" - ---help--- - if support RK610, this setting can support dual screen output - -config LCD_HSD07PFW1 - depends on MFD_RK610 - bool "RGB Hannstar LCD_HDMI_1024X600" - -config LCD_HDMI_800x480 - bool "RGB Hannstar LCD_HDMI_800x480" - ---help--- - if support RK610, this setting can support dual screen output - -config LCD_HV070WSA100 - bool "HV070WSA-100 1024X600" - -config LCD_COMMON - bool "LCD COMMON" - -config LCD_RK3168_AUO_A080SN03 - bool "RK3168 auo panel 800x480" - -config LCD_RK2928_A720 - bool "RK2928 A720 panel 800x480" - -config LCD_RK2926_V86 - bool "RK2926 v86 panel 800x480" - -config LCD_RK3168_86V - bool "RK3168 86v panel 800x480" - -config LCD_HJ080NA - bool "HJ080NA_4J 1024X768" - -config LCD_HJ101NA - bool "HJ101NA_4J 1280X800" - -config LCD_AUTO - bool "auto select lcd" - -config LCD_HSD07PFW1 - bool "RGB lcd panel HSD07PFW1" - -config LCD_I30_800X480 - bool "lcd I30" - -config LCD_ANDROIDCOMPUTER - bool "rk3188 android computer lcd" - -config LCD_TL5001_MIPI - bool "TL5001 720X1280" - -config LCD_LP097QX1 - bool "Display Port screen LP097QX1" - -config LCD_DS1006H - bool "Lvds screen for ds1006h(RK3168)" - -config LCD_B101UANO_1920x1200 - bool "Lvds screen B101UANO for u30gt2" - -config LCD_E242868_1024X600 - bool "RK3168 86v RGB 1024*600 " -config LCD_E242868_RK616_1024X600 - bool "RK3168 RK616 86v RGB 1024*600 " -config LCD_WY_800X480 - bool "lcd for 760" - -config LCD_HH070D_LVDS - bool "lcd lvds for 760" -config LCD_RK3028_86V - bool "RGB 1024*600 for RK3028 86V" +config LCD_GENERAL + bool "General lcd panel" + help + select if the panel do not need initialization config LCD_LD089WU1_MIPI bool "mipi dsi lcd LD089WU1 1920X1200" config LCD_B080XAN02_MIPI bool "mipi dsi lcd B080XAN02 1024X768" -config LCD_RK3168_FAC - bool "RK3168 for factoryTool" endchoice diff --git a/drivers/video/rockchip/screen/Makefile b/drivers/video/rockchip/screen/Makefile index c969ea1229ed..bf426117b26d 100644 --- a/drivers/video/rockchip/screen/Makefile +++ b/drivers/video/rockchip/screen/Makefile @@ -1,72 +1,6 @@ -obj-$(CONFIG_LCD_NULL) += lcd_null.o - -obj-$(CONFIG_LCD_RK2928) += lcd_rk2928.o - -obj-$(CONFIG_LCD_RK3168_FAC) += lcd_rk3168_fac.o -obj-$(CONFIG_LCD_TD043MGEA1) += lcd_td043mgea1.o -obj-$(CONFIG_LCD_HSD070IDW1) += lcd_hsd800x480.o -obj-$(CONFIG_LCD_HL070VM4AU) += lcd_hl070vm4.o -obj-$(CONFIG_LCD_BYD8688FTGF) += lcd_byd1024x600.o -obj-$(CONFIG_LCD_LG_LP097X02)+= lcd_LG_LP097X02.o -obj-$(CONFIG_LCD_TJ048NC01CA) += lcd_tj048nc01ca.o - -obj-$(CONFIG_LCD_A060SE02) += lcd_a060se02.o -obj-$(CONFIG_LCD_S1D13521) += lcd_s1d13521.o -obj-$(CONFIG_LCD_NT35582) += lcd_nt35582.o -obj-$(CONFIG_LCD_NT35580) += lcd_nt35580.o -obj-$(CONFIG_LCD_IPS1P5680_V1_E) += lcd_ips1p5680_v1_e.o -obj-$(CONFIG_LCD_RGB_TFT480800_25_E) += lcd_rgb_tft480800_25_e.o -obj-$(CONFIG_LCD_MCU_TFT480800_25_E) += lcd_mcu_tft480800_25_e.o -obj-$(CONFIG_LCD_LS035Y8DX02A) += lcd_ls035y8dx02a.o -obj-$(CONFIG_LCD_LS035Y8DX04A) += lcd_ls035y8dx04a.o -obj-$(CONFIG_LCD_CPTCLAA038LA31XE) += lcd_CPTclaa038la31xe.o - - -obj-$(CONFIG_LCD_HX8357) += lcd_hx8357.o -obj-$(CONFIG_LCD_HSD100PXN) += lcd_hsd100pxn.o -obj-$(CONFIG_LCD_HDMI_1366x768) += lcd_hdmi_1366x768.o -obj-$(CONFIG_LCD_HDMI_1280x800) += lcd_hdmi_1280x800.o -obj-$(CONFIG_LCD_HDMI_1024x768) += lcd_hdmi_1024x768.o -obj-$(CONFIG_LCD_HDMI_800x480) += lcd_hdmi_800x480.o -obj-$(CONFIG_LCD_B101AW06) += lcd_B101AW06.o -obj-$(CONFIG_LCD_NT35510) += lcd_nt35510.o -obj-$(CONFIG_LCD_ILI9803_CPT4_3) += lcd_ili9803_cpt4_3.o -obj-$(CONFIG_LCD_RGB_TFT480800_25_E) += lcd_rgb_tft480800_25_e.o -obj-$(CONFIG_LCD_LS035Y8DX02A) += lcd_ls035y8dx02a.o -obj-$(CONFIG_LCD_IPS1P5680_V1_E) += lcd_ips1p5680_v1_e.o -obj-$(CONFIG_LCD_MCU_TFT480800_25_E) += lcd_mcu_tft480800_25_e.o -obj-$(CONFIG_LCD_AT070TNA2) += lcd_AT070TNA2.o -obj-$(CONFIG_LCD_TX23D88VM) += lcd_tx23d88vm.o -obj-$(CONFIG_LCD_AT070TN93) += lcd_at070tn93.o -obj-$(CONFIG_LCD_A050VL01) += lcd_A050VL01.o -obj-$(CONFIG_LCD_B101EW05) += lcd_b101ew05.o -obj-$(CONFIG_LCD_RK3168M_B101EW05) += lcd_hdmi_rk3168m_b101ew05.o -obj-$(CONFIG_LCD_HJ050NA_06A) += lcd_hj050na_06a.o -obj-$(CONFIG_LCD_HSD100PXN_FOR_TDW851) += lcd_hsd100pxn_for_tdw851.o -obj-$(CONFIG_LCD_HV070WSA100) += lcd_hv070wsa.o -obj-$(CONFIG_LCD_COMMON) += lcd_common.o -obj-$(CONFIG_LCD_RK2928_A720) += lcd_YQ70CPT9160.o -obj-$(CONFIG_LCD_RK3168_AUO_A080SN03) += lcd_AUO_A080SN03.o -obj-$(CONFIG_LCD_RK2926_V86) += lcd_YQ70CPT9160_v86.o -obj-$(CONFIG_LCD_RK3168_86V) += lcd_YQ70CPT9160_rk3168_86v.o -obj-$(CONFIG_LCD_HSD07PFW1) += lcd_hdmi_1024x600.o -obj-$(CONFIG_LCD_HJ080NA) += lcd_hj080na.o -obj-$(CONFIG_LCD_HJ101NA) += lcd_hj101na.o -obj-$(CONFIG_LCD_AUTO) += lcd_auto.o -obj-$(CONFIG_LCD_I30_800X480) += lcd_I30_800x480.o -obj-$(CONFIG_LCD_TL5001_MIPI) += lcd_tl5001_mipi.o -obj-$(CONFIG_LCD_LP097QX1) += lcd_LP097QX1.o -obj-$(CONFIG_LCD_DS1006H) += lcd_ds1006h.o -obj-$(CONFIG_LCD_B101UANO_1920x1200) += lcd_b101uano_1920x1200.o -obj-$(CONFIG_LCD_E242868_1024X600) += lcd_E242868_rk3168_86v.o -obj-$(CONFIG_LCD_E242868_RK616_1024X600) += lcd_E242868_rk3168_rk616_86v.o -obj-$(CONFIG_LCD_WY_800X480) += lcd_wy_800x480.o -obj-$(CONFIG_LCD_HH070D_LVDS) += lcd_hh070d_lvds.o -obj-$(CONFIG_LCD_RK3028_86V) += lcd_E242868_rk3028_86v.o -obj-$(CONFIG_LCD_MQ0801D) += lcd_mq0801d.o +obj-$(CONFIG_LCD_GENERAL) += lcd_general.o obj-$(CONFIG_LCD_LD089WU1_MIPI) += lcd_LD089WU1_mipi.o obj-$(CONFIG_LCD_B080XAN02_MIPI) += lcd_B080XAN02_mipi.o -obj-$(CONFIG_LCD_ANDROIDCOMPUTER) += lcd_androidcomputer.o quiet_cmd_gen = GEN $@ diff --git a/drivers/video/rockchip/screen/lcd_AT070TNA2.c b/drivers/video/rockchip/screen/lcd_AT070TNA2.c deleted file mode 100755 index c54d5cd43f3d..000000000000 --- a/drivers/video/rockchip/screen/lcd_AT070TNA2.c +++ /dev/null @@ -1,36 +0,0 @@ - -#ifndef _LCD_AT070TNA2__ -#define _LCD_AT070TNA2__ - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_D888_P666 -#define DCLK 58500000 // 65000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 600 -#define V_FP 18 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#endif diff --git a/drivers/video/rockchip/screen/lcd_AUO_A080SN03.c b/drivers/video/rockchip/screen/lcd_AUO_A080SN03.c deleted file mode 100644 index 216e7bd91456..000000000000 --- a/drivers/video/rockchip/screen/lcd_AUO_A080SN03.c +++ /dev/null @@ -1,42 +0,0 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ - -#ifndef __LCD_AUO__ -#define __LCD_AUO__ - - - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888//OUT_P666 -#define DCLK 40000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1//30//48 //10 -#define H_BP 46//10//40 //100 -#define H_VD 800 //1024 -#define H_FP 210// //210 - -#define V_PW 3// 2// 3//13//10 -#define V_BP 23// 18 // 23//10// //10 -#define V_VD 600//480 //768 -#define V_FP 2// 8// 12//22 //18 - -/* Other */ -#define DCLK_POL 1 -#define SWAP_RB 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define LCD_WIDTH 162//154 //need modify -#define LCD_HEIGHT 121//85 -#endif - diff --git a/drivers/video/rockchip/screen/lcd_B080XAN02_mipi.c b/drivers/video/rockchip/screen/lcd_B080XAN02_mipi.c index c9de1f21769c..5d5997e84bc3 100755 --- a/drivers/video/rockchip/screen/lcd_B080XAN02_mipi.c +++ b/drivers/video/rockchip/screen/lcd_B080XAN02_mipi.c @@ -6,51 +6,14 @@ #endif #include -#if defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS) -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_MIPI -#endif -#define LVDS_FORMAT 0 //mipi lcd don't need it, so 0 would be ok. -#define OUT_FACE OUT_P666 //OUT_P888 - - -#define DCLK 67*1000000 //150*1000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ?¦Ì?¨º - -/* Timing */ -#define H_PW 64 //16 -#define H_BP 56 //40 -#define H_VD 768 //1920 -#define H_FP 60 //24 -#define V_PW 14//50 //6 -#define V_BP 30 // 26 -#define V_VD 1024 //120 -#define V_FP 36 //4 - -#define LCD_WIDTH 119 //204 -#define LCD_HEIGHT 159// 136 -/* Other */ -#if defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS) || defined(CONFIG_MIPI_DSI) -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 #define RK_SCREEN_INIT 1 /* about mipi */ #define MIPI_DSI_LANE 4 #define MIPI_DSI_HS_CLK 528*1000000 //1000*1000000 -#define MIPI_LCD_RST_PIN RK30_PIN0_PC3 + #if defined(RK_SCREEN_INIT) static struct rk29lcd_info *gLcd_info = NULL; diff --git a/drivers/video/rockchip/screen/lcd_B101AW06.c b/drivers/video/rockchip/screen/lcd_B101AW06.c deleted file mode 100755 index f6efa7367fc0..000000000000 --- a/drivers/video/rockchip/screen/lcd_B101AW06.c +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _LCD_B101AW06__ -#define _LCD_B101AW06__ - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_D888_P666 -#define DCLK 45000000 -#define LCDC_ACLK 312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 80 -#define H_VD 1024 -#define H_FP 100 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 600 -#define V_FP 18 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#endif diff --git a/drivers/video/rockchip/screen/lcd_CPTclaa038la31xe.c b/drivers/video/rockchip/screen/lcd_CPTclaa038la31xe.c deleted file mode 100644 index 2b896ba81746..000000000000 --- a/drivers/video/rockchip/screen/lcd_CPTclaa038la31xe.c +++ /dev/null @@ -1,327 +0,0 @@ -/* - * Copyright (C) 2011 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2011-03-22 - * route:drivers/video/display/screen/lcd_ls035y8dx02a.c - driver for rk29 phone sdk - * declaration: This program driver have been tested in rk29_phonesdk hardware platform at 2011.03.31. - * about migration: you need just 3 interface functions,such as lcd_init(void),lcd_standby(u8 enable), - * set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include -#include "screen.h" - -/* Base */ -#define OUT_TYPE SCREEN_RGB -#define OUT_FACE OUT_P666 -#define OUT_CLK (26*1000000) //***27 uint Hz -#define LCDC_ACLK 150000000 //29 lcdc axi DMA Ƶ�� - -/* Timing */ -#define H_PW 10//8 //16 -#define H_BP 10//24 -#define H_VD 480//320 -#define H_FP 10//60//16 - -#define V_PW 3 -#define V_BP 3 -#define V_VD 800//480 -#define V_FP 3 - -#define LCD_WIDTH 800 //need modify -#define LCD_HEIGHT 480 - -/* Other */ -#define DCLK_POL 0 //0 -#define SWAP_RB 0 - -static struct rk29lcd_info *gLcd_info = NULL; -int lcd_init(void); -int lcd_standby(u8 enable); - -#define RXD_PORT RK29_PIN2_PC7 -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin -#define RESET_PORT RK29_PIN6_PC6 - -#define CS_OUT() gpio_direction_output(CS_PORT, 1) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 1) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) -#define RXD_IN() gpio_direction_input(RXD_PORT) -#define RXD_GET() gpio_get_value(RXD_PORT) - -#define DRVDelayUs(i) udelay(i*4) -#define DRVDelayMs(i) mdelay(i*4) - -/*---------------------------------------------------------------------- -Name : Claa0381a31RegSet -Desc : IO模拟SPI对屏寄存器进行设置 -Params : Reg 寄存器地址 - Data 数据 -Return : -Notes : 设置前需要调用SetIOSpiMode(1)进入IO模式 - 设置后需要调用SetIOSpiMode(0)退出IO模式 -----------------------------------------------------------------------*/ -void Claa0381a31Cmd(u32 data) -{ - u32 i; - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - - if(data) - { - CS_CLR(); - DRVDelayUs(2); - - TXD_CLR(); //wr 0 - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - for(i = 0; i < 8; i++) //reg - { - if(data &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - // 模拟CLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - } -} - -void Claa0381a31Data(u32 data) -{ - u32 i; - - TXD_SET(); - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - for(i = 0; i < 8; i++) //reg - { - if(data &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - // 模拟CLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - -} - - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; - screen->left_margin = H_BP; /*>2*/ - screen->right_margin = H_FP; /*>2*/ - screen->hsync_len = H_PW; /*>2*/ //***all > 326, 4upper_margin = V_BP; /*>2*/ - screen->lower_margin = V_FP; /*>2*/ - screen->vsync_len = V_PW; /*>6*/ - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - if(lcd_info) - gLcd_info = lcd_info; -} - -int lcd_init(void) -{ - volatile u32 data; - if(gLcd_info){ - gLcd_info->io_init(); - } - - /* reset lcd to start init lcd by software if there is no hardware reset circuit for the lcd */ -#ifdef RESET_PORT - gpio_request(RESET_PORT, NULL); - gpio_direction_output(RESET_PORT, 0); - mdelay(2); - gpio_set_value(RESET_PORT, 1); - mdelay(10); - gpio_free(RESET_PORT); -#endif - - printk("lcd init...\n"); - - Claa0381a31Cmd(0xb9); - Claa0381a31Data(0xff); - Claa0381a31Data(0x83); - Claa0381a31Data(0x63); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0xb1); - Claa0381a31Data(0x81); - Claa0381a31Data(0x30); - Claa0381a31Data(0x03); - Claa0381a31Data(0x34); - Claa0381a31Data(0x02); - Claa0381a31Data(0x13); - Claa0381a31Data(0x11); - Claa0381a31Data(0x00); - Claa0381a31Data(0x35); - Claa0381a31Data(0x3e); - Claa0381a31Data(0x16); - Claa0381a31Data(0x16); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0x11); - Claa0381a31Cmd(0); - - DRVDelayMs(150); - - Claa0381a31Cmd(0xb6); - Claa0381a31Data(0x42); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0xb3); - Claa0381a31Data(0x01); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0xb4); - Claa0381a31Data(0x04); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0xe0); - Claa0381a31Data(0x00); - Claa0381a31Data(0x1e); - Claa0381a31Data(0x23); - Claa0381a31Data(0x2d); - Claa0381a31Data(0x2d); - Claa0381a31Data(0x3f); - Claa0381a31Data(0x08); - Claa0381a31Data(0xcc); - Claa0381a31Data(0x8c); - Claa0381a31Data(0xcf); - Claa0381a31Data(0x51); - Claa0381a31Data(0x12); - Claa0381a31Data(0x52); - Claa0381a31Data(0x92); - Claa0381a31Data(0x1E); - Claa0381a31Data(0x00); - Claa0381a31Data(0x1e); - Claa0381a31Data(0x23); - Claa0381a31Data(0x2d); - Claa0381a31Data(0x2d); - Claa0381a31Data(0x3f); - Claa0381a31Data(0x08); - Claa0381a31Data(0xcc); - Claa0381a31Data(0x8c); - Claa0381a31Data(0xcf); - Claa0381a31Data(0x51); - Claa0381a31Data(0x12); - Claa0381a31Data(0x52); - Claa0381a31Data(0x92); - Claa0381a31Data(0x1E); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0xcc); - Claa0381a31Data(0x0b); - Claa0381a31Cmd(0); - - Claa0381a31Cmd(0x3a); - Claa0381a31Data(0x60); - Claa0381a31Cmd(0); - - DRVDelayMs(20); - - Claa0381a31Cmd(0x29); - Claa0381a31Cmd(0); - - if(gLcd_info) - gLcd_info->io_deinit(); - - return 0; -} - -int lcd_standby(u8 enable) //***enable =1 means suspend, 0 means resume -{ - - if(gLcd_info) - gLcd_info->io_init(); - printk("lcd standby\n"); - if(enable) { - printk("lcd standby...enable =1 means suspend\n"); - //spi_screenreg_set(0x10, 0xffff, 0xffff); - //mdelay(120); - //spi_screenreg_set(0x28, 0xffff, 0xffff); - } else { - printk("lcd standby...0 means resume\n"); - //spi_screenreg_set(0x29, 0xffff, 0xffff); - //spi_screenreg_set(0x11, 0xffff, 0xffff); - //mdelay(150); - } - - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} - diff --git a/drivers/video/rockchip/screen/lcd_E242868_rk3028_86v.c b/drivers/video/rockchip/screen/lcd_E242868_rk3028_86v.c deleted file mode 100755 index 897adc7bb147..000000000000 --- a/drivers/video/rockchip/screen/lcd_E242868_rk3028_86v.c +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __LCD_E242868_RK3028__ -#define __LCD_E242868_RK3028__ -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 -#define DCLK 50000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30 -#define H_BP 10 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 13 -#define V_BP 10 -#define V_VD 600 -#define V_FP 22 - -#define LCD_WIDTH 154 -#define LCD_HEIGHT 85 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_E242868_rk3168_86v.c b/drivers/video/rockchip/screen/lcd_E242868_rk3168_86v.c deleted file mode 100644 index 9f42d168481d..000000000000 --- a/drivers/video/rockchip/screen/lcd_E242868_rk3168_86v.c +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __LCD_E242868__ -#define __LCD_E242868__ -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 50000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30 -#define H_BP 10 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 13 -#define V_BP 10 -#define V_VD 600 -#define V_FP 22 - -#define LCD_WIDTH 154 -#define LCD_HEIGHT 85 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_E242868_rk3168_rk616_86v.c b/drivers/video/rockchip/screen/lcd_E242868_rk3168_rk616_86v.c deleted file mode 100755 index 94f5309d528e..000000000000 --- a/drivers/video/rockchip/screen/lcd_E242868_rk3168_rk616_86v.c +++ /dev/null @@ -1,223 +0,0 @@ - -#ifndef __E242868_RK616__ -#define __E242868_RK616__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_P888 -#define DCLK 50000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30 -#define H_BP 10 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 13 -#define V_BP 10 -#define V_VD 600 -#define V_FP 22 - -#define LCD_WIDTH 154 -#define LCD_HEIGHT 85 -#define DCLK_POL 1 - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& ( defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS)) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,50625000) -#define S_H_PW 10 -#define S_H_BP 10 -#define S_H_VD 1024 -#define S_H_FP 306 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 600 -#define S_V_FP 5 - -#define S_H_ST 0 -#define S_V_ST 5 - -#define S_PLL_CFG_VAL 0x01443013//0x01842016 -#define S_FRAC 0x4d9380//0xc16c2d -#define S_SCL_VST 0x00b//0x25 -#define S_SCL_HST 0x000//0x4ba -#define S_VIF_VST 0x1//0x1 -#define S_VIF_HST 0xca//0xca - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,45375000) -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1024 -#define S1_H_FP 408 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 600 -#define S1_V_FP 5 - -#define S1_H_ST 0 -#define S1_V_ST 5 - -#define S1_PLL_CFG_VAL 0x01843013//0x01c42016 -#define S1_FRAC 0x4d9365//0x1f9ad4 -#define S1_SCL_VST 0x00a//0x25 -#define S1_SCL_HST 0xa4f//0x5ab -#define S1_VIF_VST 0x1//0x1 -#define S1_VIF_HST 0xca//0xca - - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,50625000) -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1024 -#define S2_H_FP 306 - -#define S2_V_PW 10 -#define S2_V_BP 10 -#define S2_V_VD 600 -#define S2_V_FP 5 - -#define S2_H_ST 0 -#define S2_V_ST 3 - - -//bellow are for jettaB -#define S2_PLL_CFG_VAL 0x01423013//0x01822016 -#define S2_FRAC 0x4d9380//0xc16c2d -#define S2_SCL_VST 0x008//0x19 -#define S2_SCL_HST 0x000//0x483 -#define S2_VIF_VST 0x1//0x1 -#define S2_VIF_HST 0xcf//0xcf - - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,44343750) -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1024 -#define S3_H_FP 375 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 600 -#define S3_V_FP 3 - -#define S3_H_ST 0 -#define S3_V_ST 3 - -#define S3_PLL_CFG_VAL 0x01823013//0x01c22016 -#define S3_FRAC 0x4d9365//0x1f9ad4 -#define S3_SCL_VST 0x007//0x19 -#define S3_SCL_HST 0x7bb//0x569 -#define S3_VIF_VST 0x1//0x1 -#define S3_VIF_HST 0xcf//0xcf - - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,46875000) -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1024 -#define S4_H_FP 396 - -#define S4_V_PW 10 -#define S4_V_BP 10 -#define S4_V_VD 600 -#define S4_V_FP 31 - -#define S4_H_ST 0 -#define S4_V_ST 28 - -#define S4_PLL_CFG_VAL 0x01c12015//0x01412016 -#define S4_FRAC 0x80f04c//0xa23d09 -#define S4_SCL_VST 0x01f//0x2d -#define S4_SCL_HST 0x2b3//0x33d -#define S4_VIF_VST 0x1//0x1 -#define S4_VIF_HST 0xc1//0xc1 - - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1024 -#define S5_H_FP 386 - -#define S5_V_PW 10 -#define S5_V_BP 10 -#define S5_V_VD 600 -#define S5_V_FP 35 - -#define S5_H_ST 0 -#define S5_V_ST 22 - -#define S5_PLL_CFG_VAL 0x01812016//0x01c11013 -#define S5_FRAC 0x45d17b//0x25325e -#define S5_SCL_VST 0x01a//0x26 -#define S5_SCL_HST 0x359//0x2ae -#define S5_VIF_VST 0x1//0x1 -#define S5_VIF_HST 0xc1//0xc1 - - -#define S_DCLK_POL 1 - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_I30_800x480.c b/drivers/video/rockchip/screen/lcd_I30_800x480.c deleted file mode 100644 index 5b70c8a4ad13..000000000000 --- a/drivers/video/rockchip/screen/lcd_I30_800x480.c +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __LCD_I30__ -#define __LCD_I30__ -/* Base */ -#define LCD_WIDTH 154 //need modify -#define LCD_HEIGHT 85 - -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 -#define DCLK 30000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 48 //10 -#define H_BP 88 //100 -#define H_VD 800 -#define H_FP 40 //210 - -#define V_PW 3 //10 -#define V_BP 32 //10 -#define V_VD 480 -#define V_FP 13 //18 - -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#define RK_SCREEN_INIT -static struct rk29lcd_info *gLcd_info = NULL; - -static int rk_lcd_init(void) -{ - int ret = 0; - - if(gLcd_info && gLcd_info->io_init) - gLcd_info->io_init(); - - return 0; -} - -static int rk_lcd_standby(u8 enable) -{ - if(!enable) - { - if(gLcd_info && gLcd_info->io_enable) - gLcd_info->io_enable(); - } - else - { - if(gLcd_info && gLcd_info->io_disable) - gLcd_info->io_disable(); - } - return 0; -} - -#endif diff --git a/drivers/video/rockchip/screen/lcd_LD089WU1_mipi.c b/drivers/video/rockchip/screen/lcd_LD089WU1_mipi.c index cef35493db9b..30db8f02b12f 100644 --- a/drivers/video/rockchip/screen/lcd_LD089WU1_mipi.c +++ b/drivers/video/rockchip/screen/lcd_LD089WU1_mipi.c @@ -6,46 +6,9 @@ #endif -#if defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS) -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_MIPI -#endif -#define LVDS_FORMAT 0 //mipi lcd don't need it, so 0 would be ok. -#define OUT_FACE OUT_P888 - - -#define DCLK 150*1000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 16 -#define H_BP 40 -#define H_VD 1920 -#define H_FP 24 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 1200 -#define V_FP 16 - -#define LCD_WIDTH 204 -#define LCD_HEIGHT 136 -/* Other */ -#if defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS) || defined(CONFIG_MIPI_DSI) -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 -//#define RK_SCREEN_INIT 1 +#define RK_SCREEN_INIT 1 /* about mipi */ #define MIPI_DSI_LANE 4 diff --git a/drivers/video/rockchip/screen/lcd_LG_LP097X02.c b/drivers/video/rockchip/screen/lcd_LG_LP097X02.c deleted file mode 100644 index 220092b0b275..000000000000 --- a/drivers/video/rockchip/screen/lcd_LG_LP097X02.c +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __LCD_LG097X02__ -#define __LCD_LG097X02__ - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_D888_P666 -#define DCLK 100000000 -#define LCDC_ACLK 500000000 -/* Timing */ -#define H_PW 320 -#define H_BP 480 -#define H_VD 1024 -#define H_FP 260 - -#define V_PW 10 -#define V_BP 6 -#define V_VD 768 -#define V_FP 16 - -#define LCD_WIDTH 196// 142 // 202 -#define LCD_HEIGHT 147 //106// 152 -/* Other */ -#define DCLK_POL 1 // -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_LP097QX1.c b/drivers/video/rockchip/screen/lcd_LP097QX1.c deleted file mode 100644 index 783ce1533d89..000000000000 --- a/drivers/video/rockchip/screen/lcd_LP097QX1.c +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef __LCD_LP097QX1__ -#define __LCD_LP097QX1__ - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 -#define DCLK 205000000 //160000000//205000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 5 -#define H_BP 5 - -#if defined(CONFIG_ARCH_RK3066B) -#define H_VD 2047 -#else -#define H_VD 2048 -#endif - - -#define H_FP 150 - -#define V_PW 1 -#define V_BP 9 -#define V_VD 1536 -#define V_FP 3 - -#define LCD_WIDTH 216 -#define LCD_HEIGHT 135 -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_DUMMY 0 -#define SWAP_GB 0 -#define SWAP_RG 0 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#endif diff --git a/drivers/video/rockchip/screen/lcd_YQ70CPT9160.c b/drivers/video/rockchip/screen/lcd_YQ70CPT9160.c deleted file mode 100644 index c8854b36fcbf..000000000000 --- a/drivers/video/rockchip/screen/lcd_YQ70CPT9160.c +++ /dev/null @@ -1,38 +0,0 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ - - -#ifndef __LCD_YQ70CPT__ -#define __LCD_YQ70CPT__ -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 -#define DCLK 33000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30//48 //10 -#define H_BP 10//40 //100 -#define H_VD 800 //1024 -#define H_FP 210// //210 - -#define V_PW 13//10 -#define V_BP 10// //10 -#define V_VD 480 //768 -#define V_FP 22 //18 - -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define LCD_WIDTH 154 //need modify -#define LCD_HEIGHT 85 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_YQ70CPT9160_rk3168_86v.c b/drivers/video/rockchip/screen/lcd_YQ70CPT9160_rk3168_86v.c deleted file mode 100644 index c835cbaa2857..000000000000 --- a/drivers/video/rockchip/screen/lcd_YQ70CPT9160_rk3168_86v.c +++ /dev/null @@ -1,36 +0,0 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ - -#ifndef __LCD_YQ70CPT__ -#define __LCD_YQ70CPT__ -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define OUT_FACE OUT_P888 -#define DCLK 33000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30//48 //10 -#define H_BP 10//40 //100 -#define H_VD 800 //1024 -#define H_FP 210// //210 - -#define V_PW 13//10 -#define V_BP 10// //10 -#define V_VD 480 //768 -#define V_FP 22 //18 - -#define LCD_WIDTH 154 -#define LCD_HEIGHT 85 - -/* Other */ -#define DCLK_POL 0 - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_YQ70CPT9160_v86.c b/drivers/video/rockchip/screen/lcd_YQ70CPT9160_v86.c deleted file mode 100644 index 530133e821e2..000000000000 --- a/drivers/video/rockchip/screen/lcd_YQ70CPT9160_v86.c +++ /dev/null @@ -1,40 +0,0 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ -#ifndef __LCD_YQ70CPT__ -#define __LCD_YQ70CPT__ - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 -#define DCLK 33000000 -#define LCDC_ACLK 50000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30//48 //10 -#define H_BP 10//40 //100 -#define H_VD 800 //1024 -#define H_FP 210// //210 - -#define V_PW 13//10 -#define V_BP 10// //10 -#define V_VD 480 //768 -#define V_FP 22 //18 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_DUMMY 0 -#define SWAP_GB 0 -#define SWAP_RG 0 - - - -#define LCD_WIDTH 154 //need modify -#define LCD_HEIGHT 85 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_a060se02.c b/drivers/video/rockchip/screen/lcd_a060se02.c deleted file mode 100644 index 1cb426f43550..000000000000 --- a/drivers/video/rockchip/screen/lcd_a060se02.c +++ /dev/null @@ -1,168 +0,0 @@ -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include "screen.h" - -/* Base */ -#define OUT_TYPE SCREEN_MCU -#define OUT_FACE OUT_P16BPP4 - -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 600 -#define H_FP 5 - -#define V_PW 1 -#define V_BP 1 -#define V_VD 800 -#define V_FP 1 - -#define P_WR 200 - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - -#define LCD_WIDTH 600 //need modify -#define LCD_HEIGHT 800 - - -int lcd_init(void) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - // init set - mcu_ioctl(MCU_WRCMD, 0x0000); - mcu_ioctl(MCU_WRDATA, 0x0001); - - // start display - mcu_ioctl(MCU_WRCMD, 0x1001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0320); - mcu_ioctl(MCU_WRDATA, 0x0258); - - // ³õʼ»¯Í¼Ïó - int i=0, j=0; - while(0) - { - mcu_ioctl(MCU_WRCMD, 0x1001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0320); - mcu_ioctl(MCU_WRDATA, 0x0258); - - for(i=0; i<800*100; i++) - mcu_ioctl(MCU_WRDATA, j%2 ? 0xffff : 0x0000); - for(i=0; i<800*100; i++) - mcu_ioctl(MCU_WRDATA, j%2 ? 0x0000 : 0xffff); - j++; - - mcu_ioctl(MCU_WRCMD, 0x1002); - msleep(2000); - printk(">>>>>> lcd_init : send test image! \n"); - } - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - -int lcd_standby(u8 enable) -{ - return 0; -} - -int lcd_refresh(u8 arg) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - switch(arg) - { - case REFRESH_PRE: //DMA´«ËÍÇ°×¼±¸ - #if 0 - mcu_ioctl(MCU_WRCMD, 0x1001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0320); - mcu_ioctl(MCU_WRDATA, 0x0258); - printk(">>>>>> lcd_refresh : REFRESH_PRE! \n"); - #else - // init set - mcu_ioctl(MCU_WRCMD, 0x0000); - mcu_ioctl(MCU_WRDATA, 0x0001); - // start display - mcu_ioctl(MCU_WRCMD, 0x1001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0001); - mcu_ioctl(MCU_WRDATA, 0x0320); - mcu_ioctl(MCU_WRDATA, 0x0258); - printk(">>>>>> lcd_refresh : REFRESH_PRE!!! \n"); - #endif - break; - - case REFRESH_END: //DMA´«ËͽáÊøºó - mcu_ioctl(MCU_WRCMD, 0x1002); - printk(">>>>>> lcd_refresh : REFRESH_END! \n"); - break; - - default: - break; - } - - mcu_ioctl(MCU_SETBYPASS, 0); - - return 0; -} - - - -void set_lcd_info(struct rk29fb_screen *screen) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - screen->mcu_wrperiod = P_WR; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - screen->refresh = lcd_refresh; -} - - - - diff --git a/drivers/video/rockchip/screen/lcd_androidcomputer.c b/drivers/video/rockchip/screen/lcd_androidcomputer.c deleted file mode 100755 index 9f4515ba2c49..000000000000 --- a/drivers/video/rockchip/screen/lcd_androidcomputer.c +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef __LCD_E242868__ -#define __LCD_E242868__ -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -//#define DCLK 106500000 -#define DCLK 100000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 255//152 -#define H_BP 46 -#define H_VD 1440 -#define H_FP 0 - -#define V_PW 6 -#define V_BP 34 -#define V_VD 900 -#define V_FP 0 - -#define LCD_WIDTH 410 -#define LCD_HEIGHT 256 - -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_at070tn93.c b/drivers/video/rockchip/screen/lcd_at070tn93.c deleted file mode 100755 index b4abb6d6f091..000000000000 --- a/drivers/video/rockchip/screen/lcd_at070tn93.c +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _LCD_AT070NT_H_ -#define _LCD_AT070NT_H_ - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 46800000//33300000//50000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 36 -#define H_VD 800 -#define H_FP 210 - -#define V_PW 10 -#define V_BP 13 -#define V_VD 480 -#define V_FP 22 - -#define LCD_WIDTH 154 -#define LCD_HEIGHT 86 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_auto.c b/drivers/video/rockchip/screen/lcd_auto.c deleted file mode 100644 index 79c4ec56b59b..000000000000 --- a/drivers/video/rockchip/screen/lcd_auto.c +++ /dev/null @@ -1,474 +0,0 @@ - -#ifndef __LCD_AUTO__ -#define __LCD_AUTO__ - -#include -#include -#include -#include -#include -#include -#if defined(CONFIG_HAS_EARLYSUSPEND) -#include -#endif -#include -#include - - -//FOR ID0 -/* Base */ -#define SCREEN_TYPE_ID0 SCREEN_RGB - -#define OUT_FACE_ID0 OUT_P888 -#define DCLK_ID0 71000000 -#define LCDC_ACLK_ID0 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW_ID0 100 -#define H_BP_ID0 100 -#define H_VD_ID0 1024 -#define H_FP_ID0 120 - -#define V_PW_ID0 10 -#define V_BP_ID0 10 -#define V_VD_ID0 600 -#define V_FP_ID0 15 - -#define LCD_WIDTH_ID0 202 -#define LCD_HEIGHT_ID0 152 -/* Other */ -#define DCLK_POL_ID0 0 -#define DEN_POL_ID0 0 -#define VSYNC_POL_ID0 0 -#define HSYNC_POL_ID0 0 - -#define SWAP_RB_ID0 0 -#define SWAP_DUMMY_ID0 0 -#define SWAP_GB_ID0 0 -#define SWAP_RG_ID0 0 - - - -//FOR ID1 -/* Base */ -#define SCREEN_TYPE_ID1 SCREEN_RGB -#define OUT_FACE_ID1 OUT_P888 -#define DCLK_ID1 71000000 -#define LCDC_ACLK_ID1 500000000 - -/* Timing */ -#define H_PW_ID1 10 -#define H_BP_ID1 160 -#define H_VD_ID1 1024 -#define H_FP_ID1 16 - -#define V_PW_ID1 3 -#define V_BP_ID1 23 -#define V_VD_ID1 768 -#define V_FP_ID1 12 - - -/* Other */ -#define DCLK_POL_ID1 0 -#define DEN_POL_ID1 0 -#define VSYNC_POL_ID1 0 -#define HSYNC_POL_ID1 0 - -#define SWAP_RB_ID1 0 -#define SWAP_DUMMY_ID1 0 -#define SWAP_GB_ID1 0 -#define SWAP_RG_ID1 0 - - -#define LCD_WIDTH_ID1 270 -#define LCD_HEIGHT_ID1 202 - - - -//FOR ID2 -#define SCREEN_TYPE_ID2 SCREEN_RGB - -#define OUT_FACE_ID2 OUT_P888 -#define DCLK_ID2 65000000 -#define LCDC_ACLK_ID2 500000000 - -/* Timing */ -#define H_PW_ID2 100 -#define H_BP_ID2 100 -#define H_VD_ID2 1024 -#define H_FP_ID2 120 - -#define V_PW_ID2 10 -#define V_BP_ID2 10 -#define V_VD_ID2 768 -#define V_FP_ID2 15 - -#define LCD_WIDTH_ID2 216 -#define LCD_HEIGHT_ID2 162 -/* Other */ -#define DCLK_POL_ID2 0 -#define DEN_POL_ID2 0 -#define VSYNC_POL_ID2 0 -#define HSYNC_POL_ID2 0 - -#define SWAP_RB_ID2 0 -#define SWAP_DUMMY_ID2 0 -#define SWAP_GB_ID2 0 -#define SWAP_RG_ID2 0 - - -//FOR ID3 -/* Base */ -#define SCREEN_TYPE_ID3 SCREEN_RGB -#define OUT_FACE_ID3 OUT_P888 -#define DCLK_ID3 71000000 -#define LCDC_ACLK_ID3 500000000 - -/* Timing */ -#define H_PW_ID3 10 -#define H_BP_ID3 160 -#define H_VD_ID3 1280 -#define H_FP_ID3 16 - -#define V_PW_ID3 3 -#define V_BP_ID3 23 -#define V_VD_ID3 800 -#define V_FP_ID3 12 - - -/* Other */ -#define DCLK_POL_ID3 0 -#define DEN_POL_ID3 0 -#define VSYNC_POL_ID3 0 -#define HSYNC_POL_ID3 0 - -#define SWAP_RB_ID3 0 -#define SWAP_DUMMY_ID3 0 -#define SWAP_GB_ID3 0 -#define SWAP_RG_ID3 0 - - -#define LCD_WIDTH_ID3 270 -#define LCD_HEIGHT_ID3 202 - - -//FOR ID4 -/* Base */ -#define SCREEN_TYPE_ID4 SCREEN_RGB -#define OUT_FACE_ID4 OUT_P888 -#define DCLK_ID4 71000000 -#define LCDC_ACLK_ID4 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW_ID4 10 -#define H_BP_ID4 64 -#define H_VD_ID4 800 -#define H_FP_ID4 16 - -#define V_PW_ID4 3 -#define V_BP_ID4 8 -#define V_VD_ID4 1280 -#define V_FP_ID4 10 - - -/* Other */ -#define DCLK_POL_ID4 0 -#define DEN_POL_ID4 0 -#define VSYNC_POL_ID4 0 -#define HSYNC_POL_ID4 0 - -#define SWAP_RB_ID4 0 -#define SWAP_DUMMY_ID4 0 -#define SWAP_GB_ID4 0 -#define SWAP_RG_ID4 0 - - -#define LCD_WIDTH_ID4 152 -#define LCD_HEIGHT_ID4 202 - - -#define H_VD 1280 -#define V_VD 800 -#if defined(CONFIG_TS_AUTO) -extern struct ts_private_data *g_ts; -#else -static struct ts_private_data *g_ts = NULL; -#endif - -#if defined(CONFIG_RK_BOARD_ID) -extern enum rk_board_id rk_get_board_id(void); -#else -static enum rk_board_id rk_get_board_id(void) -{ - return -1; -} -#endif -static int lcd_get_id(void) -{ - int id = -1; - int ts_id = -1; - -#if defined(CONFIG_RK_BOARD_ID) - id = rk_get_board_id(); -#elif defined(CONFIG_TS_AUTO) - if(!g_ts) - return -1; - - ts_id = g_ts->ops->ts_id; - - switch(ts_id) - { - case TS_ID_FT5306: - id = BOARD_ID_C8003; - break; - case TS_ID_GT8110: - id = BOARD_ID_C1014; - break; - case TS_ID_GT828: - id = BOARD_ID_C7018; - break; - case TS_ID_GT8005: - id = BOARD_ID_C8002; - break; - case TS_ID_CT360: - id = BOARD_ID_DS763; - break; - default: - break; - } - -#endif - return id; -} - -#define RK_USE_SCREEN_ID - -#if defined(RK_USE_SCREEN_ID) -void set_lcd_info_by_id(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - int id; - id = lcd_get_id(); - - switch(id) - { - case BOARD_ID_DS763: - - /* screen type & face */ - screen->type = SCREEN_TYPE_ID0; - screen->face = OUT_FACE_ID0; - - /* Screen size */ - screen->x_res = H_VD_ID0; - screen->y_res = V_VD_ID0; - - screen->width = LCD_WIDTH_ID0; - screen->height = LCD_HEIGHT_ID0; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK_ID0; - screen->pixclock = DCLK_ID0; - screen->left_margin = H_BP_ID0; - screen->right_margin = H_FP_ID0; - screen->hsync_len = H_PW_ID0; - screen->upper_margin = V_BP_ID0; - screen->lower_margin = V_FP_ID0; - screen->vsync_len = V_PW_ID0; - - /* Pin polarity */ - screen->pin_hsync = HSYNC_POL_ID0; - screen->pin_vsync = VSYNC_POL_ID0; - screen->pin_den = DEN_POL_ID0; - screen->pin_dclk = DCLK_POL_ID0; - - /* Swap rule */ - screen->swap_rb = SWAP_RB_ID0; - screen->swap_rg = SWAP_RG_ID0; - screen->swap_gb = SWAP_GB_ID0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - - break; - - case BOARD_ID_C8002: - - /* screen type & face */ - screen->type = SCREEN_TYPE_ID1; - screen->face = OUT_FACE_ID1; - - /* Screen size */ - screen->x_res = H_VD_ID1; - screen->y_res = V_VD_ID1; - - screen->width = LCD_WIDTH_ID1; - screen->height = LCD_HEIGHT_ID1; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK_ID1; - screen->pixclock = DCLK_ID1; - screen->left_margin = H_BP_ID1; - screen->right_margin = H_FP_ID1; - screen->hsync_len = H_PW_ID1; - screen->upper_margin = V_BP_ID1; - screen->lower_margin = V_FP_ID1; - screen->vsync_len = V_PW_ID1; - - /* Pin polarity */ - screen->pin_hsync = HSYNC_POL_ID1; - screen->pin_vsync = VSYNC_POL_ID1; - screen->pin_den = DEN_POL_ID1; - screen->pin_dclk = DCLK_POL_ID1; - - /* Swap rule */ - screen->swap_rb = SWAP_RB_ID1; - screen->swap_rg = SWAP_RG_ID1; - screen->swap_gb = SWAP_GB_ID1; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - break; - - case BOARD_ID_C8003: - - /* screen type & face */ - screen->type = SCREEN_TYPE_ID2; - screen->face = OUT_FACE_ID2; - - /* Screen size */ - screen->x_res = H_VD_ID2; - screen->y_res = V_VD_ID2; - - screen->width = LCD_WIDTH_ID2; - screen->height = LCD_HEIGHT_ID2; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK_ID2; - screen->pixclock = DCLK_ID2; - screen->left_margin = H_BP_ID2; - screen->right_margin = H_FP_ID2; - screen->hsync_len = H_PW_ID2; - screen->upper_margin = V_BP_ID2; - screen->lower_margin = V_FP_ID2; - screen->vsync_len = V_PW_ID2; - - /* Pin polarity */ - screen->pin_hsync = HSYNC_POL_ID2; - screen->pin_vsync = VSYNC_POL_ID2; - screen->pin_den = DEN_POL_ID2; - screen->pin_dclk = DCLK_POL_ID2; - - /* Swap rule */ - screen->swap_rb = SWAP_RB_ID2; - screen->swap_rg = SWAP_RG_ID2; - screen->swap_gb = SWAP_GB_ID2; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - - break; - - case BOARD_ID_C1014: - default: - - /* screen type & face */ - screen->type = SCREEN_TYPE_ID3; - screen->face = OUT_FACE_ID3; - - /* Screen size */ - screen->x_res = H_VD_ID3; - screen->y_res = V_VD_ID3; - - screen->width = LCD_WIDTH_ID3; - screen->height = LCD_HEIGHT_ID3; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK_ID3; - screen->pixclock = DCLK_ID3; - screen->left_margin = H_BP_ID3; - screen->right_margin = H_FP_ID3; - screen->hsync_len = H_PW_ID3; - screen->upper_margin = V_BP_ID3; - screen->lower_margin = V_FP_ID3; - screen->vsync_len = V_PW_ID3; - - /* Pin polarity */ - screen->pin_hsync = HSYNC_POL_ID3; - screen->pin_vsync = VSYNC_POL_ID3; - screen->pin_den = DEN_POL_ID3; - screen->pin_dclk = DCLK_POL_ID3; - - /* Swap rule */ - screen->swap_rb = SWAP_RB_ID3; - screen->swap_rg = SWAP_RG_ID3; - screen->swap_gb = SWAP_GB_ID3; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - - break; - - case BOARD_ID_C7018: - - /* screen type & face */ - screen->type = SCREEN_TYPE_ID4; - screen->face = OUT_FACE_ID4; - - /* Screen size */ - screen->x_res = H_VD_ID4; - screen->y_res = V_VD_ID4; - - screen->width = LCD_WIDTH_ID4; - screen->height = LCD_HEIGHT_ID4; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK_ID4; - screen->pixclock = DCLK_ID4; - screen->left_margin = H_BP_ID4; - screen->right_margin = H_FP_ID4; - screen->hsync_len = H_PW_ID4; - screen->upper_margin = V_BP_ID4; - screen->lower_margin = V_FP_ID4; - screen->vsync_len = V_PW_ID4; - - /* Pin polarity */ - screen->pin_hsync = HSYNC_POL_ID4; - screen->pin_vsync = VSYNC_POL_ID4; - screen->pin_den = DEN_POL_ID4; - screen->pin_dclk = DCLK_POL_ID4; - - /* Swap rule */ - screen->swap_rb = SWAP_RB_ID4; - screen->swap_rg = SWAP_RG_ID4; - screen->swap_gb = SWAP_GB_ID4; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - - break; - - - } - - - printk("%s:board_id=%d\n",__func__,id); - -} - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_b101ew05.c b/drivers/video/rockchip/screen/lcd_b101ew05.c deleted file mode 100755 index 57bed4078837..000000000000 --- a/drivers/video/rockchip/screen/lcd_b101ew05.c +++ /dev/null @@ -1,251 +0,0 @@ -#ifndef __LCD_B101EW05__ -#define __LCD_B101EW05__ - -#if defined(CONFIG_RK610_LVDS) -#include "../transmitter/rk610_lcd.h" -#endif - -#if defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS) || defined(CONFIG_RK3026_LVDS) -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_RGB -#endif -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666 - - -#define DCLK 71000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1280 -#define H_FP 18 - -#define V_PW 2 -#define V_BP 8 -#define V_VD 800 -#define V_FP 6 - -#define LCD_WIDTH 216 -#define LCD_HEIGHT 135 -/* Other */ -#if defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS) || defined(CONFIG_RK3026_LVDS) -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#define USE_RK_DSP_LUT -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - - -// if we use one lcdc with jetta for dual display,we need these configration -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF) - -/* scaler Timing */ -//1920*1080*60 - -#if defined(CONFIG_RK610_LVDS) -#define S_DCLK_POL 1 -#define S_OUT_CLK SCALE_RATE(148500000,74250000) //m=16 n=9 no=4 -#define S_H_PW 48 -#define S_H_BP 98 -#define S_H_VD 1280 -#define S_H_FP 59 - -#define S_V_PW 6 -#define S_V_BP 25 -#define S_V_VD 800 -#define S_V_FP 2 - -#define S_H_ST 495 -#define S_V_ST 2 -#endif - - -#if defined(CONFIG_RK616_LVDS) -#define S_PLL_CFG_VAL 0x01842016 -#define S_FRAC 0xc16c2d -#define S_SCL_VST 0x25 -#define S_SCL_HST 0x4ba -#define S_VIF_VST 0x1 -#define S_VIF_HST 0xca -#endif - -//1920*1080*50 -#if defined(CONFIG_RK610_LVDS) -#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1280 -#define S1_H_FP 77 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 800 -#define S1_V_FP 13 - -#define S1_H_ST 459 -#define S1_V_ST 13 -#endif - -#if defined(CONFIG_RK616_LVDS) -#define S1_PLL_CFG_VAL 0x01c42016 -#define S1_FRAC 0x1f9ad4 -#define S1_SCL_VST 0x25 -#define S1_SCL_HST 0x5ab -#define S1_VIF_VST 0x1 -#define S1_VIF_HST 0xca -#endif - -//1280*720*60 -#if defined(CONFIG_RK610_LVDS) -#define S2_OUT_CLK SCALE_RATE(74250000,74250000) //m=32 n=9 no=4 -#define S2_H_PW 48 -#define S2_H_BP 98 -#define S2_H_VD 1280 -#define S2_H_FP 59 - -#define S2_V_PW 6 -#define S2_V_BP 25 -#define S2_V_VD 800 -#define S2_V_FP 2 - -#define S2_H_ST 495 -#define S2_V_ST 5 -#endif - -//bellow are for jettaB -#if defined(CONFIG_RK616_LVDS) -#define S2_PLL_CFG_VAL 0x01822016 -#define S2_FRAC 0xc16c2d -#define S2_SCL_VST 0x19 -#define S2_SCL_HST 0x483 -#define S2_VIF_VST 0x1 -#define S2_VIF_HST 0xcf -#endif - -//1280*720*50 -#if defined(CONFIG_RK610_LVDS) -#define S3_OUT_CLK SCALE_RATE(74250000,67500000) // m=34 n=11 no=4 -#define S3_H_PW 48 -#define S3_H_BP 233 -#define S3_H_VD 1280 -#define S3_H_FP 59 - -#define S3_V_PW 6 -#define S3_V_BP 25 -#define S3_V_VD 800 -#define S3_V_FP 2 - -#define S3_H_ST 540 -#define S3_V_ST 3 -#endif - -#if defined(CONFIG_RK616_LVDS) -#define S3_PLL_CFG_VAL 0x01c22016 -#define S3_FRAC 0x1f9ad4 -#define S3_SCL_VST 0x19 -#define S3_SCL_HST 0x569 -#define S3_VIF_VST 0x1 -#define S3_VIF_HST 0xcf -#endif - -//720*576*50 -#if defined(CONFIG_RK610_LVDS) -#define S4_OUT_CLK SCALE_RATE(27000000,70312500) //m=75 n=4 no=8 -#define S4_H_PW 48 -#define S4_H_BP 233 -#define S4_H_VD 1280 -#define S4_H_FP 59 - -#define S4_V_PW 9 -#define S4_V_BP 57 -#define S4_V_VD 800 -#define S4_V_FP 2 - -#define S4_H_ST 90 -#define S4_V_ST 2 -#endif - -#if defined(CONFIG_RK616_LVDS) -#define S4_PLL_CFG_VAL 0x01412016 -#define S4_FRAC 0xa23d09 -#define S4_SCL_VST 0x2d -#define S4_SCL_HST 0x33d -#define S4_VIF_VST 0x1 -#define S4_VIF_HST 0xc1 -#endif - -//720*480*60 -#if defined(CONFIG_RK610_LVDS) -#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4 -#define S5_H_PW 48 -#define S5_H_BP 86 -#define S5_H_VD 1280 -#define S5_H_FP 16 - -#define S5_V_PW 9 -#define S5_V_BP 35 -#define S5_V_VD 800 -#define S5_V_FP 30 - -#define S5_H_ST 476 -#define S5_V_ST 12 -#endif -#if defined(CONFIG_RK616_LVDS) - -#define S5_PLL_CFG_VAL 0x01c11013 -#define S5_FRAC 0x25325e -#define S5_SCL_VST 0x26 -#define S5_SCL_HST 0x2ae -#define S5_VIF_VST 0x1 -#define S5_VIF_HST 0xc1 -#endif - -#endif -#endif - - diff --git a/drivers/video/rockchip/screen/lcd_b101uano_1920x1200.c b/drivers/video/rockchip/screen/lcd_b101uano_1920x1200.c deleted file mode 100644 index 04919bc74ab6..000000000000 --- a/drivers/video/rockchip/screen/lcd_b101uano_1920x1200.c +++ /dev/null @@ -1,138 +0,0 @@ - -#ifndef __LCD_B101UANO__ -#define __LCD_B101UANO__ - -/* Base */ -#if defined(CONFIG_RK616_LVDS) -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_RGB -#endif -#define LVDS_FORMAT LVDS_8BIT_1 - -#define OUT_FACE OUT_P888 - - -#define DCLK 160000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 90 -#define H_VD 1920 -#define H_FP 1 - -#define V_PW 1 -#define V_BP 12 -#define V_VD 1200 -#define V_FP 1 - -#define LCD_WIDTH 217 -#define LCD_HEIGHT 136 -/* Other */ -#if defined(CONFIG_RK616_LVDS) -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#define USE_RK_DSP_LUT -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK616_LVDS) - -#define S_PLL_CFG_VAL 0x01842016 -#define S_FRAC 0xc16c2d -#define S_SCL_VST 0x25 -#define S_SCL_HST 0x4ba -#define S_VIF_VST 0x1 -#define S_VIF_HST 0xca - -//1920*1080*50 - - -#define S1_PLL_CFG_VAL 0x01c42016 -#define S1_FRAC 0x1f9ad4 -#define S1_SCL_VST 0x25 -#define S1_SCL_HST 0x5ab -#define S1_VIF_VST 0x1 -#define S1_VIF_HST 0xca - - -//1280*720*60 -//bellow are for jettaB -#define S2_PLL_CFG_VAL 0x01822016 -#define S2_FRAC 0xc16c2d -#define S2_SCL_VST 0x19 -#define S2_SCL_HST 0x483 -#define S2_VIF_VST 0x1 -#define S2_VIF_HST 0xcf - - -//1280*720*50 -#define S3_PLL_CFG_VAL 0x01c22016 -#define S3_FRAC 0x1f9ad4 -#define S3_SCL_VST 0x19 -#define S3_SCL_HST 0x569 -#define S3_VIF_VST 0x1 -#define S3_VIF_HST 0xcf - -//720*576*50 -#define S4_PLL_CFG_VAL 0x01412016 -#define S4_FRAC 0xa23d09 -#define S4_SCL_VST 0x2d -#define S4_SCL_HST 0x33d -#define S4_VIF_VST 0x1 -#define S4_VIF_HST 0xc1 - - -//720*480*60 - -#define S5_PLL_CFG_VAL 0x01c11013 -#define S5_FRAC 0x25325e -#define S5_SCL_VST 0x26 -#define S5_SCL_HST 0x2ae -#define S5_VIF_VST 0x1 -#define S5_VIF_HST 0xc1 -#endif -#endif diff --git a/drivers/video/rockchip/screen/lcd_byd1024x600.c b/drivers/video/rockchip/screen/lcd_byd1024x600.c deleted file mode 100755 index a22055b957b8..000000000000 --- a/drivers/video/rockchip/screen/lcd_byd1024x600.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This Lcd Driver is for BYD 5' LCD BM800480-8545FTGE. - * written by Michael Lin, 2010-06-18 - */ - -#ifndef _LCD_BYD1024X600__ -#define _LCD_BYD1024X600__ - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 47000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 160 -#define H_VD 1024 -#define H_FP 119 - -#define V_PW 3 -#define V_BP 23 -#define V_VD 600 -#define V_FP 9 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - - -#define LCD_WIDTH 153 //need modify -#define LCD_HEIGHT 90 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_common.c b/drivers/video/rockchip/screen/lcd_common.c deleted file mode 100644 index 4d18e7b442aa..000000000000 --- a/drivers/video/rockchip/screen/lcd_common.c +++ /dev/null @@ -1,79 +0,0 @@ -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include -#include "screen.h" - -/* Base */ -#define OUT_TYPE SCREEN_RGB - -#define OUT_FACE OUT_D888_P666 - - -#define OUT_CLK 71000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1280 -#define H_FP 18 - -#define V_PW 2 -#define V_BP 8 -#define V_VD 800 -#define V_FP 6 - -#define LCD_WIDTH 216 -#define LCD_HEIGHT 135 -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - - -u32 lcdpamara[]={0x4B434F52,0x64636C5F,0x61746164,SCREEN_RGB,OUT_D888_P666,71000000,300000000,10,100,1280,18,2,8,800,6,216,135,0,0}; - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = lcdpamara[3]; - screen->face = lcdpamara[4]; - - /* Screen size */ - screen->x_res = lcdpamara[9]; - screen->y_res = lcdpamara[13]; - - screen->width = lcdpamara[15]; - screen->height = lcdpamara[16]; - - /* Timing */ - screen->lcdc_aclk = lcdpamara[6]; - screen->pixclock = lcdpamara[5]; - screen->left_margin = lcdpamara[8]; - screen->right_margin = lcdpamara[10]; - screen->hsync_len = lcdpamara[7]; - screen->upper_margin = lcdpamara[12]; - screen->lower_margin = lcdpamara[14]; - screen->vsync_len = lcdpamara[11]; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = lcdpamara[17]; - - /* Swap rule */ - screen->swap_rb = lcdpamara[18]; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - -} - diff --git a/drivers/video/rockchip/screen/lcd_ds1006h.c b/drivers/video/rockchip/screen/lcd_ds1006h.c deleted file mode 100644 index 3f65f37743d1..000000000000 --- a/drivers/video/rockchip/screen/lcd_ds1006h.c +++ /dev/null @@ -1,187 +0,0 @@ -#ifndef __LCD_DS1006H__ -#define __LCD_DS1006H__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - -/* Base */ -#ifdef CONFIG_RK610_LVDS -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_RGB -#endif -#define LVDS_FORMAT LVDS_8BIT_1 - -#define OUT_FACE OUT_P888 - - -#define DCLK 71000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 1280 -#define H_FP 158 - -#define V_PW 1 -#define V_BP 1 -#define V_VD 800 -#define V_FP 21 - -#define LCD_WIDTH 216 -#define LCD_HEIGHT 135 -/* Other */ -#ifdef CONFIG_RK610_LVDS -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,74250000) //m=16 n=9 no=4 -#define S_H_PW 48 -#define S_H_BP 98 -#define S_H_VD 1280 -#define S_H_FP 59 - -#define S_V_PW 6 -#define S_V_BP 25 -#define S_V_VD 800 -#define S_V_FP 2 - -#define S_H_ST 495 -#define S_V_ST 2 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1280 -#define S1_H_FP 77 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 800 -#define S1_V_FP 13 - -#define S1_H_ST 459 -#define S1_V_ST 13 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,74250000) //m=32 n=9 no=4 -#define S2_H_PW 48 -#define S2_H_BP 98 -#define S2_H_VD 1280 -#define S2_H_FP 59 - -#define S2_V_PW 6 -#define S2_V_BP 5 -#define S2_V_VD 800 -#define S2_V_FP 2 - -#define S2_H_ST 495 -#define S2_V_ST 15 - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,67500000) // m=34 n=11 no=4 -#define S3_H_PW 48 -#define S3_H_BP 233 -#define S3_H_VD 1280 -#define S3_H_FP 59 - -#define S3_V_PW 6 -#define S3_V_BP 5 -#define S3_V_VD 800 -#define S3_V_FP 2 - -#define S3_H_ST 540 -#define S3_V_ST 14 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,70312500) //m=75 n=4 no=8 -#define S4_H_PW 48 -#define S4_H_BP 233 -#define S4_H_VD 1280 -#define S4_H_FP 59 - -#define S4_V_PW 9 -#define S4_V_BP 57 -#define S4_V_VD 800 -#define S4_V_FP 2 - -#define S4_H_ST 90 -#define S4_V_ST 2 - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4 -#define S5_H_PW 48 -#define S5_H_BP 86 -#define S5_H_VD 1280 -#define S5_H_FP 16 - -#define S5_V_PW 9 -#define S5_V_BP 35 -#define S5_V_VD 800 -#define S5_V_FP 30 - -#define S5_H_ST 476 -#define S5_V_ST 12 - -#define S_DCLK_POL 1 -#endif - - -#endif - diff --git a/drivers/video/rockchip/screen/lcd_general.c b/drivers/video/rockchip/screen/lcd_general.c new file mode 100644 index 000000000000..b57dc2cbb86f --- /dev/null +++ b/drivers/video/rockchip/screen/lcd_general.c @@ -0,0 +1,8 @@ + +#ifndef __LCD_NULL__ +#define __LCD_NULL__ + + + +#endif + diff --git a/drivers/video/rockchip/screen/lcd_hdmi_1024x600.c b/drivers/video/rockchip/screen/lcd_hdmi_1024x600.c deleted file mode 100644 index c73631e481c4..000000000000 --- a/drivers/video/rockchip/screen/lcd_hdmi_1024x600.c +++ /dev/null @@ -1,182 +0,0 @@ -#ifndef __LCD_HDMI_1024x600__ -#define __LCD_HDMI_1024x600__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - -/* Base */ -#ifdef CONFIG_RK610_LVDS -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_RGB -#endif -#define LVDS_FORMAT LVDS_8BIT_1 - -#define OUT_FACE OUT_P888 -#define DCLK 50000000 // 65000000 -#define LCDC_ACLK 312000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 20 -#define H_BP 20 -#define H_VD 1024 -#define H_FP 280 - -#define V_PW 2 -#define V_BP 2 -#define V_VD 600 -#define V_FP 34 - -#define LCD_WIDTH 154//1024 -#define LCD_HEIGHT 91//600 -/* Other */ -#ifdef CONFIG_RK610_LVDS -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,50625000) -#define S_H_PW 10 -#define S_H_BP 10 -#define S_H_VD 1024 -#define S_H_FP 306 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 600 -#define S_V_FP 5 - -#define S_H_ST 0 -#define S_V_ST 5 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,45375000) -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1024 -#define S1_H_FP 408 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 600 -#define S1_V_FP 5 - -#define S1_H_ST 0 -#define S1_V_ST 5 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,50625000) -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1024 -#define S2_H_FP 306 - -#define S2_V_PW 10 -#define S2_V_BP 10 -#define S2_V_VD 600 -#define S2_V_FP 5 - -#define S2_H_ST 0 -#define S2_V_ST 3 - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,44343750) -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1024 -#define S3_H_FP 375 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 600 -#define S3_V_FP 3 - -#define S3_H_ST 0 -#define S3_V_ST 3 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,46875000) -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1024 -#define S4_H_FP 396 - -#define S4_V_PW 10 -#define S4_V_BP 10 -#define S4_V_VD 600 -#define S4_V_FP 31 - -#define S4_H_ST 0 -#define S4_V_ST 28 - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1024 -#define S5_H_FP 386 - -#define S5_V_PW 10 -#define S5_V_BP 10 -#define S5_V_VD 600 -#define S5_V_FP 35 - -#define S5_H_ST 0 -#define S5_V_ST 22 - -#define S_DCLK_POL 1 -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hdmi_1024x768.c b/drivers/video/rockchip/screen/lcd_hdmi_1024x768.c deleted file mode 100644 index 600baf76fc2f..000000000000 --- a/drivers/video/rockchip/screen/lcd_hdmi_1024x768.c +++ /dev/null @@ -1,138 +0,0 @@ - -#ifndef __LCD_HDMI_1024x768__ -#define __LCD_HDMI_1024x768__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - -/* Base */ -#define SCREEN_TYPE SCREEN_LVDS -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666 -#define DCLK 65000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 768 -#define V_FP 18 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -#define DCLK_POL 1 - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 -#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 -#define S_H_PW 100 -#define S_H_BP 100 -#define S_H_VD 1024 -#define S_H_FP 151 - -#define S_V_PW 5 -#define S_V_BP 15 -#define S_V_VD 768 -#define S_V_FP 12 - -#define S_H_ST 1757 -#define S_V_ST 14 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4 -#define S1_H_PW 100 -#define S1_H_BP 100 -#define S1_H_VD 1024 -#define S1_H_FP 126 - -#define S1_V_PW 5 -#define S1_V_BP 15 -#define S1_V_VD 768 -#define S1_V_FP 12 - -#define S1_H_ST 1757 -#define S1_V_ST 14 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 -#define S2_H_PW 100 -#define S2_H_BP 100 -#define S2_H_VD 1024 -#define S2_H_FP 151 - -#define S2_V_PW 5 -#define S2_V_BP 15 -#define S2_V_VD 768 -#define S2_V_FP 12 - -#define S2_H_ST 0 -#define S2_V_ST 12 -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4 -#define S3_H_PW 100 -#define S3_H_BP 100 -#define S3_H_VD 1024 -#define S3_H_FP 151 - -#define S3_V_PW 5 -#define S3_V_BP 15 -#define S3_V_VD 768 -#define S3_V_FP 12 - -#define S3_H_ST 0 -#define S3_V_ST 12 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8 -#define S4_H_PW 100 -#define S4_H_BP 100 -#define S4_H_VD 1024 -#define S4_H_FP 81 - -#define S4_V_PW 5 -#define S4_V_BP 15 -#define S4_V_VD 768 -#define S4_V_FP 45 - - -#define S4_H_ST 435 -#define S4_V_ST 45 -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4 -#define S5_H_PW 100 -#define S5_H_BP 100 -#define S5_H_VD 1024 -#define S5_H_FP 81 - -#define S5_V_PW 5 -#define S5_V_BP 15 -#define S5_V_VD 768 -#define S5_V_FP 51 - -#define S5_H_ST 858 -#define S5_V_ST 45 - -#define S_DCLK_POL 0 - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hdmi_1280x800.c b/drivers/video/rockchip/screen/lcd_hdmi_1280x800.c deleted file mode 100644 index cdf15f3dc5bb..000000000000 --- a/drivers/video/rockchip/screen/lcd_hdmi_1280x800.c +++ /dev/null @@ -1,141 +0,0 @@ - -#ifndef __LCD_HDMI_1280x800__ -#define __LCD_HDMI_1280x800__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - - -/* Base */ -#define SCREEN_TYPE SCREEN_LVDS -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666 -#define DCLK 65000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - - -/* Timing */ -#define H_PW 10 -#define H_BP 10 -#define H_VD 1280 -#define H_FP 20 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 800 -#define V_FP 13 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 -#define S_H_PW 10 -#define S_H_BP 10 -#define S_H_VD 1280 -#define S_H_FP 20 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 800 -#define S_V_FP 13 - -#define S_H_ST 440 -#define S_V_ST 13 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1280 -#define S1_H_FP 77 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 800 -#define S1_V_FP 13 - -#define S1_H_ST 459 -#define S1_V_ST 13 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1280 -#define S2_H_FP 20 - -#define S2_V_PW 10 -#define S2_V_BP 10 -#define S2_V_VD 800 -#define S2_V_FP 13 - -#define S2_H_ST 440 -#define S2_V_ST 13 - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4 -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1280 -#define S3_H_FP 77 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 800 -#define S3_V_FP 13 - -#define S3_H_ST 459 -#define S3_V_ST 13 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8 -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1280 -#define S4_H_FP 185 - -#define S4_V_PW 10 -#define S4_V_BP 10 -#define S4_V_VD 800 -#define S4_V_FP 48 - -#define S4_H_ST 81 -#define S4_V_ST 48 - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1280 -#define S5_H_FP 130 - -#define S5_V_PW 10 -#define S5_V_BP 10 -#define S5_V_VD 800 -#define S5_V_FP 54 - -#define S5_H_ST 476 -#define S5_V_ST 48 - -#define S_DCLK_POL 0 - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hdmi_1366x768.c b/drivers/video/rockchip/screen/lcd_hdmi_1366x768.c deleted file mode 100644 index c295e2ae5de8..000000000000 --- a/drivers/video/rockchip/screen/lcd_hdmi_1366x768.c +++ /dev/null @@ -1,178 +0,0 @@ - -#ifndef __LCD_HDMI_1366x768__ -#define __LCD_HDMI_1366x768__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - -/* Base */ -#define SCREEN_TYPE SCREEN_LVDS -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_D888_P666 -#define DCLK 95000000 // 1280x800x1.13x60(hz) -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 34 -#define H_BP 120 -#define H_VD 1366 -#define H_FP 80 - -#define V_PW 8 -#define V_BP 50 -#define V_VD 768 -#define V_FP 12 - -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define LCD_WIDTH 1366 -#define LCD_HEIGHT 768 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,79199997) //m=32 n=15 no=4 -#define S_H_PW 34 -#define S_H_BP 120 -#define S_H_VD 1366 -#define S_H_FP 130 - -#define S_V_PW 8 -#define S_V_BP 10 -#define S_V_VD 768 -#define S_V_FP 13 - -#define S_H_ST 0 -#define S_V_ST 15 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 -#define S1_H_PW 34 -#define S1_H_BP 120 -#define S1_H_VD 1366 -#define S1_H_FP 130 - -#define S1_V_PW 8 -#define S1_V_BP 10 -#define S1_V_VD 768 -#define S1_V_FP 14 - -#define S1_H_ST 0 -#define S1_V_ST 15 - - -//1280*720p 60HZ -#define S2_OUT_CLK SCALE_RATE(74250000,79199997) //m=64 n=15 no=4 -#define S2_H_PW 34 -#define S2_H_BP 120 -#define S2_H_VD 1366 -#define S2_H_FP 130 - -#define S2_V_PW 8 -#define S2_V_BP 10 -#define S2_V_VD 768 -#define S2_V_FP 13 - -#define S2_H_ST 0 -#define S2_V_ST 8 - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,66000000) // m=16 n=5 no=4 -#define S3_H_PW 34 -#define S3_H_BP 120 -#define S3_H_VD 1366 -#define S3_H_FP 130 - -#define S3_V_PW 8 -#define S3_V_BP 10 -#define S3_V_VD 768 -#define S3_V_FP 14 - -#define S3_H_ST 0 -#define S3_V_ST 8 - - -//720*576*50 //run -#define S4_OUT_CLK SCALE_RATE(27000000,60000000) //m=91 n=9 no=4 -#define S4_H_PW 34 -#define S4_H_BP 20 -#define S4_H_VD 1366 -#define S4_H_FP 20 - -#define S4_V_PW 8 -#define S4_V_BP 10 -#define S4_V_VD 768 -#define S4_V_FP 47 - -#define S4_H_ST 0 -#define S4_V_ST 33 - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=79 n=7 no=4 -#define S5_H_PW 34 -#define S5_H_BP 20 -#define S5_H_VD 1366 -#define S5_H_FP 10 - -#define S5_V_PW 8 -#define S5_V_BP 10 -#define S5_V_VD 768 -#define S5_V_FP 53 - -#define S5_H_ST 0 -#define S5_V_ST 29 - -#define S_DCLK_POL 1 - -/* Other */ - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hdmi_800x480.c b/drivers/video/rockchip/screen/lcd_hdmi_800x480.c deleted file mode 100644 index 2511959f21f3..000000000000 --- a/drivers/video/rockchip/screen/lcd_hdmi_800x480.c +++ /dev/null @@ -1,138 +0,0 @@ - -#ifndef __LCD_HDMI_800x480__ -#define __LCD_HDMI_800x480__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 33000000 -#define LCDC_ACLK 150000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 88 -#define H_VD 800 -#define H_FP 40 - -#define V_PW 3 -#define V_BP 29 -#define V_VD 480 -#define V_FP 13 - -#define LCD_WIDTH 154 -#define LCD_HEIGHT 85 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,33000000) -#define S_H_PW 1 -#define S_H_BP 88 -#define S_H_VD 800 -#define S_H_FP 211 - -#define S_V_PW 3 -#define S_V_BP 10 -#define S_V_VD 480 -#define S_V_FP 7 - -#define S_H_ST 244 -#define S_V_ST 11 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,30375000) -#define S1_H_PW 1 -#define S1_H_BP 88 -#define S1_H_VD 800 -#define S1_H_FP 326 - -#define S1_V_PW 3 -#define S1_V_BP 9 -#define S1_V_VD 480 -#define S1_V_FP 8 - -#define S1_H_ST 270 -#define S1_V_ST 13 -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,33000000) -#define S2_H_PW 1 -#define S2_H_BP 88 -#define S2_H_VD 800 -#define S2_H_FP 211 - -#define S2_V_PW 3 -#define S2_V_BP 9 -#define S2_V_VD 480 -#define S2_V_FP 8 - -#define S2_H_ST 0 -#define S2_V_ST 8 -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,30375000) -#define S3_H_PW 1 -#define S3_H_BP 88 -#define S3_H_VD 800 -#define S3_H_FP 326 - -#define S3_V_PW 3 -#define S3_V_BP 9 -#define S3_V_VD 480 -#define S3_V_FP 8 - -#define S3_H_ST 0 -#define S3_V_ST 8 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,30000000) -#define S4_H_PW 1 -#define S4_H_BP 88 -#define S4_H_VD 800 -#define S4_H_FP 263 - -#define S4_V_PW 3 -#define S4_V_BP 9 -#define S4_V_VD 480 -#define S4_V_FP 28 - -#define S4_H_ST 0 -#define S4_V_ST 33 -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,31500000) -#define S5_H_PW 1 -#define S5_H_BP 88 -#define S5_H_VD 800 -#define S5_H_FP 112 - -#define S5_V_PW 3 -#define S5_V_BP 9 -#define S5_V_VD 480 -#define S5_V_FP 28 - -#define S5_H_ST 0 -#define S5_V_ST 29 - -#define S_DCLK_POL 0 - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hdmi_rk3168m_b101ew05.c b/drivers/video/rockchip/screen/lcd_hdmi_rk3168m_b101ew05.c deleted file mode 100644 index 0d99a4d4a0a0..000000000000 --- a/drivers/video/rockchip/screen/lcd_hdmi_rk3168m_b101ew05.c +++ /dev/null @@ -1,85 +0,0 @@ -#ifndef __LCD_RK3168M__ -#define __LCD_RK3168M__ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - - -/* Base */ -#ifdef CONFIG_RK610_LVDS -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_RGB -#endif - -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666 - - -#define DCLK 71000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1280 -#define H_FP 18 - -#define V_PW 2 -#define V_BP 8 -#define V_VD 800 -#define V_FP 6 - -#define LCD_WIDTH 216 -#define LCD_HEIGHT 135 -/* Other */ -#ifdef CONFIG_RK610_LVDS -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hh070d_lvds.c b/drivers/video/rockchip/screen/lcd_hh070d_lvds.c deleted file mode 100755 index ca6d6bfb40b2..000000000000 --- a/drivers/video/rockchip/screen/lcd_hh070d_lvds.c +++ /dev/null @@ -1,36 +0,0 @@ - -#ifndef _LCD_HH070D__ -#define _LCD_HH070D__ -/* Base */ -#define SCREEN_TYPE SCREEN_LVDS -#define LVDS_FORMAT LVDS_8BIT_2 - -#define OUT_FACE OUT_D888_P666 -#define DCLK 60000000 -#define LCDC_ACLK 300000000//500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 100 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 120 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 600 -#define V_FP 150 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif - diff --git a/drivers/video/rockchip/screen/lcd_hj050na_06a.c b/drivers/video/rockchip/screen/lcd_hj050na_06a.c deleted file mode 100644 index 84e35c309d60..000000000000 --- a/drivers/video/rockchip/screen/lcd_hj050na_06a.c +++ /dev/null @@ -1,378 +0,0 @@ -/* - * Copyright (C) 2012 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2012-04-19 - * route:drivers/video/display/screen/lcd_hj050na_06a.c - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __LCD_HJ050NA__ -#define __LCD_HJ050NA__ - -#include -#include -#include -#include - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666// OUT_D888_P666 //OUT_P888 -#define DCLK 50000000 //50MHz -#define LCDC_ACLK 300000000 //29 lcdc axi DMA - -/* Timing */ -#define H_PW 5 -#define H_BP 50 -#define H_VD 640 -#define H_FP 130 - -#define V_PW 3 -#define V_BP 20//23 -#define V_VD 960 -#define V_FP 12 - -#define LCD_WIDTH 71 //uint mm the lenth of lcd active area -#define LCD_HEIGHT 106 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - - -#define RK_SCREEN_INIT //this screen need to init - -#define CONFIG_DEEP_STANDBY_MODE 0 - - -/* define spi write command and data interface function */ - -#define SIMULATION_SPI 1 -#ifdef SIMULATION_SPI - - #define TXD_PORT gLcd_info->txd_pin - #define CLK_PORT gLcd_info->clk_pin - #define CS_PORT gLcd_info->cs_pin - #define LCD_RST_PORT gLcd_info->reset_pin - - #define CS_OUT() gpio_direction_output(CS_PORT, 0) - #define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) - #define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) - #define CLK_OUT() gpio_direction_output(CLK_PORT, 0) - #define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) - #define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) - #define TXD_OUT() gpio_direction_output(TXD_PORT, 0) - #define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) - #define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - #define LCD_RST_OUT() gpio_direction_output(LCD_RST_PORT, 0) - #define LCD_RST(i) gpio_set_value(LCD_RST_PORT, i) - - #define bits_9 - #ifdef bits_9 //9bits - #define Write_ADDR(cmd) spi_write_9bit(0, cmd) - #define Write_DATA(dat) spi_write_9bit(0x100, dat) - #else //16bits - #define Write_ADDR(cmd) spi_write_16bit(0, cmd) - #define Write_DATA(dat) spi_write_16bit(1, dat) - #endif - #define Lcd_EnvidOnOff(i) - -#else - - #define bits_9 1 - #ifdef bits_9 //9bits - #define LCDSPI_InitCMD(cmd) - #define LCDSPI_InitDAT(dat) - #else //16bits - #define LCDSPI_InitCMD(cmd) - #define LCDSPI_InitDAT(dat) - #endif - -#endif - - -static struct rk29lcd_info *gLcd_info = NULL; -int rk_lcd_init(void); -int rk_lcd_standby(u8 enable); - - -/* spi write a data frame,type mean command or data */ -int spi_write_9bit(u32 type, u32 value) -{ -// if(type != 0 && type != 1) -// return -1; - /*make a data frame of 9 bits,the 8th bit 0:mean command,1:mean data*/ - value &= 0xff; - value |= type; - type = 9; - CS_CLR(); - //udelay(2); - while(type--) { - CLK_CLR(); - if(value & 0x100) - TXD_SET(); - else - TXD_CLR(); - value <<= 1; - //udelay(2); - CLK_SET(); - //udelay(2); - } - CS_SET(); - TXD_SET(); - - return 0; -} - - -int rk_lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); - - printk("lcd hj050a_06a...\n"); -#if 1 - gpio_direction_output(LCD_RST_PORT, 0); - usleep_range(2*1000, 3*1000); - gpio_set_value(LCD_RST_PORT, 1); - usleep_range(7*1000, 7*1000); -#endif - - Write_ADDR(0x0001); // Software Reset - msleep(10); - - Write_ADDR(0x0011); // Sleep Out - msleep(60); - -//<<<<<<<<<<<<<<>>>>>>>>>>>>>> - Write_ADDR(0x00B0); //Manufacture Command Access Protect - Write_DATA(0x0004); - -//<<<<<<<<<<<>>>>>>>>>>>> - Write_ADDR(0x00B3); //Number of Source outputs & Pixel Format setting - Write_DATA(0x0000); //PSEL[2:0] = 640 RGB - -//<<<<<<<<<<<>>>>>>>>>>>>>>>> - Write_ADDR(0x00B6); - Write_DATA(0x0052); - Write_DATA(0x0083); - Write_DATA(0x0045); - Write_DATA(0x0000); - -//<<<<<<<<<<<>>>>>>>>>>> - Write_ADDR(0x00B8); //Back Light Control(1) - Write_DATA(0x0000); //P1: CABCON = 0; - Write_DATA(0x001A); //P2: SSD_THRE = 1A; - Write_DATA(0x0018); //P3: SD_THRE = 18; - Write_DATA(0x0002); //P4: IPK_INTPO = 02; - Write_DATA(0x0040); //P5: IPK_TRANS = 40; - - Write_ADDR(0x00BB); //Back Light Control(1) - Write_DATA(0x0000); //LEDPWME[3] = 1,PWMWM[1] = 0,PWMON[0] = 0; - Write_DATA(0x00FF); //BDCV = FF; - Write_DATA(0x0001); //PWMDIC=1 - -//<<<<<<<<<<<>>>>>>>>>>> - Write_ADDR(0x00C0); //PANEL DRIVING SETTING 1 (36h=00) - Write_DATA(0x000B); //BLREV[5:4];REV[3];UD[2]=0:forward;BGR[1]=1:RGB->BGR;SS=1:S1920->S1 - Write_DATA(0x00BF); //NL[7:0] NL = 3BF : 960 Line - Write_DATA(0x0003); //NL[10:8] - Write_DATA(0x0011); //VBP[5:0] Vertical back porch - Write_DATA(0x0002); //DIV[3:0] - Write_DATA(0x0009); //PCDIVL[4:0] PCLKD Low Period - Write_DATA(0x0009); //PCDIVH[4:0] PCLKD High Period - - Write_ADDR(0x00C1); //PANEL DRIVING SETTING 2 - Write_DATA(0x0000); //GDS_MODE = 0 : GIP Ctrl(single scan) - Write_DATA(0x0010); //LINEINV[6:4]:2 Line inversion; MFPOL[1]:No Phase inversion; PNSER[0]:Spatial mode1 - Write_DATA(0x0004); //SEQMODE[7]:Source Pre-charge Mode; SEQGND[3:0]: GND Pre-charge 3clk - Write_DATA(0x0088); //SEQVN[7:4]:VCL pre-charge 2clk ;SEQVP[3:0]:VCL pre-charge 2clk - Write_DATA(0x001B); //DPM[7:6]: ;GEQ2W[5:3]/GEQ1W[2:0]:Gate pre-charge - Write_DATA(0x0001); //SDT[5:0] = 8 : Source output delay - Write_DATA(0x0060); //PSEUDO_EN = 0; - Write_DATA(0x0001); //GEM - - Write_ADDR(0x00C3); //PANEL DRIVING SETTING 4 - Write_DATA(0x0000); //GIPPAT[6:4]:Pattern-1 ; GIPMOD[2:0]: GIP mode 1 - Write_DATA(0x0000); //STPEOFF:normal ; FWBWOFF:normal ; T_GALH:normal - Write_DATA(0x0021); //GSPF[5:0]: 33clk - Write_DATA(0x0021); //GSPS[5:0]: 33clk - Write_DATA(0x0000); //VFSTEN[7]: NO END Pulse ; VFST[4:0]: 0 line - Write_DATA(0x0060); //FL1[6]: ; GLOL[5:4]: ; VGSET[3]: ; GIPSIDE=0:Single drive mode ; GOVERSEL=0:Overlap ; GIPSEL=0:8-phase clk - Write_DATA(0x0003); //VBPEX[6]: ; STVG[5:3]: ; STVGA[2:0]: - Write_DATA(0x0000); //ACBF[7:6]: ; ACF[5:4]: ; ACBR[3:2]: ; ACR[1:0]: - Write_DATA(0x0000); //ACBF2[7:6]: ; ACF2[5:4]: ; ACBR2[3:2]: ; ACR2[1:0]: - Write_DATA(0x0090); //9xH ACCYC[3:2]: ; ACFIX[1;0]: - Write_DATA(0x001D); //GOFF_L[7:0] - Write_DATA(0x00FE); //GOFF_L[15:8] - Write_DATA(0x0003); //GOFF_L[17:16] - Write_DATA(0x001D); //GOFF_R[7:0] - Write_DATA(0x00FE); //GOFF_R[15:8] - Write_DATA(0x0003); //GOFF_R[17:16] - -//<<<<<<<<<>>>>>>>>> - Write_ADDR(0x00C7); //TCON Unusual Operation Setting - Write_DATA(0x0000); //P1: - Write_DATA(0x0000); //P2: - Write_DATA(0x0000); //P3: - Write_DATA(0x0000); //P4: - Write_DATA(0x0000); //P5: - Write_DATA(0x0000); //P6: - Write_DATA(0x0000); //P7: - Write_DATA(0x0000); //P8: - Write_DATA(0x0000); //P9: - Write_DATA(0x0000); //P10: - Write_DATA(0x0000); //P11: - Write_DATA(0x0000); //P12: - Write_DATA(0x0000); //P13: - Write_DATA(0x0000); //P14: - -//<<<<<<<<<>>>>>>>>> - Write_ADDR(0x00C8); //Gamma Setting - Write_DATA(0x0003); - Write_DATA(0x000F); - Write_DATA(0x0015); - Write_DATA(0x0018); - Write_DATA(0x001A); - Write_DATA(0x0023); - Write_DATA(0x0025); - Write_DATA(0x0024); - Write_DATA(0x0021); - Write_DATA(0x001E); - Write_DATA(0x0015); - Write_DATA(0x000A); - - Write_DATA(0x0003); - Write_DATA(0x000F); - Write_DATA(0x0015); - Write_DATA(0x0018); - Write_DATA(0x001A); - Write_DATA(0x0023); - Write_DATA(0x0025); - Write_DATA(0x0024); - Write_DATA(0x0021); - Write_DATA(0x001E); - Write_DATA(0x0015); - Write_DATA(0x000A); - -//<<<<<<<<<>>>>>>>>> - Write_ADDR(0x00C9); //COLOR ENHANCEMENT SETTING - Write_DATA(0x0000); //CE_ON = 0; - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0080); - Write_DATA(0x0000); - Write_DATA(0x0000); - Write_DATA(0x0002); - Write_DATA(0x0080); - -//<<<<<<<<<<<<<<<<<<<>>>>>>>>>>>>>>>>>> - Write_ADDR(0x00D0); //POWER SETTING(CHARGE PUMP) - Write_DATA(0x0054); //P1:VC1 = 7; DC23 = 4 - Write_DATA(0x0019); //P2:BT3 = 2; BT2 = 1 09 - Write_DATA(0x00DD); //P3:VLMT1M = D; VLMT1 = D - Write_DATA(0x0016); //P4:VC3 = B; VC2 =B 3B - Write_DATA(0x0092); //P5:VLMT2B = 0; VLMT2 = 0A - Write_DATA(0x00A1); //P6:VLMT3B = 0; VLMT3 = 0F A1 - Write_DATA(0x0000); //P7:VBSON = 0; VBS = 00 - Write_DATA(0x00C0); //P8:VGGON = 0; LVGLON = 0; VC6 = 0 - Write_DATA(0x00CC); //P9:DC56 = ? - - Write_ADDR(0x00D1); //POWER SETTING(SWITCHING REGULATOR) - Write_DATA(0x004D); //P1:VDF1 = 4; VDF0 = D - Write_DATA(0x0024); //P2:DC1CLKEN = 0; DC1MCLKEN = 0; VDF2 =4 - Write_DATA(0x0034); //P3:VDWS2 = 3; VDWS1 = 4 - Write_DATA(0x0055); //P4:VDW12 = 5; VDW11 = 5 - Write_DATA(0x0055); //P5:VDW14 = 5; VDW13 = 5 - Write_DATA(0x0077); //P6:VDW22 = 7; VDW21 = 7 - Write_DATA(0x0077); //P7:VDW24 = 7; VDW23 = 7 - Write_DATA(0x0006); //P8:LSWPH = 6 - -//<<<<<<<<<<<<<<>>>>>>>>>>>>>> - Write_ADDR(0x00D5); //VPLVL/VNLVL SETTING - Write_DATA(0x0020); //P1:PVH = 24 - Write_DATA(0x0020); //P2:NVH = 24 - -//<<<<<<<<<<<<<<>>>>>>>>>>>>>>> - Write_ADDR(0x00D6); - Write_DATA(0x00A8); - -//<<<<<<<<<<<<<<>>>>>>>>>>>>>> - Write_ADDR(0x00DE); //VCOMDC SETTING - Write_DATA(0x0003); //P1:WCVDCB.[1] = 1; WCVDCF.[0] = 1 - Write_DATA(0x005A); //P2:VDCF.[7:0] = ? //57 - Write_DATA(0x005A); //P3:VDCB.[7:0] = ? //57 - - -//<<<<<<<<<<<<<<>>>>>>>>>>>>>> - Write_ADDR(0x00B0); //MANUFACTURE COMMAND ACCESS PROTECT - Write_DATA(0x0003); // - msleep(17); - - Write_ADDR(0x0036); // - Write_DATA(0x0000); // - msleep(17); - Write_ADDR(0x003A); // - Write_DATA(0x0060); // - msleep(17); - Write_ADDR(0x0029); // - - if(gLcd_info) - gLcd_info->io_deinit(); - - return 0; - -} - - - -int rk_lcd_standby(u8 enable) -{ - if(enable) { - if(gLcd_info) - gLcd_info->io_init(); - printk("lcd_standby...\n"); - Write_ADDR(0x0028); //set Display Off - Write_ADDR(0x0010); //enter sleep mode - msleep(50); //wait at least 3 frames time -#if 1 - Write_ADDR(0x00b0); - Write_DATA(0x0004); - Write_ADDR(0x00b1); - Write_DATA(0x0001); - msleep(1); //wait at least 1ms - gpio_direction_output(LCD_RST_PORT, 0); -#endif - - if(gLcd_info) - gLcd_info->io_deinit(); - - } else { - rk_lcd_init(); - } - - return 0; -} - -#endif - diff --git a/drivers/video/rockchip/screen/lcd_hj080na.c b/drivers/video/rockchip/screen/lcd_hj080na.c deleted file mode 100755 index bd76d2541e21..000000000000 --- a/drivers/video/rockchip/screen/lcd_hj080na.c +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _LCD_HJ080NA__ -#define _LCD_HJ080NA__ - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_P888 -#define DCLK 65000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 100 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 120 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 768 -#define V_FP 15 - -#define LCD_WIDTH 216 -#define LCD_HEIGHT 162 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hj101na.c b/drivers/video/rockchip/screen/lcd_hj101na.c deleted file mode 100644 index 41e04b957d3f..000000000000 --- a/drivers/video/rockchip/screen/lcd_hj101na.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This Lcd Driver is for BYD 5' LCD BM800480-8545FTGE. - * written by Michael Lin, 2010-06-18 - */ - -#ifndef __LCD_HJ101NA__ -#define __LCD_HJ101NA__ - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define OUT_FACE OUT_P888 -#define DCLK 71000000 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 160 -#define H_VD 1280 -#define H_FP 16 - -#define V_PW 3 -#define V_BP 23 -#define V_VD 800 -#define V_FP 12 - - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define LCD_WIDTH 216 //need modify -#define LCD_HEIGHT 135 - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hl070vm4.c b/drivers/video/rockchip/screen/lcd_hl070vm4.c deleted file mode 100755 index a0247ee5c93e..000000000000 --- a/drivers/video/rockchip/screen/lcd_hl070vm4.c +++ /dev/null @@ -1,171 +0,0 @@ -#ifndef _LCD_HL070VM_ -#define _LCD_HL070VM_ -#include -#include -#include -#include - - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 27000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 206 -#define H_VD 800 -#define H_FP 40 - -#define V_PW 10 -#define V_BP 25 -#define V_VD 480 -#define V_FP 10 - - -#define LCD_WIDTH 800 //need modify -#define LCD_HEIGHT 480 - -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin - -#define CS_OUT() gpio_direction_output(CS_PORT, 0) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 0) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - -static struct rk29lcd_info *gLcd_info = NULL; - -#define DRVDelayUs(i) udelay(i*2) -#define RK_SCREEN_INIT -int rk_lcd_init(void); -int rk_lcd_standby(u8 enable); - - -//void spi_screenreg_set(uint32 Addr, uint32 Data) -void spi_screenreg_set(u32 Data) -{ - u32 i; - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - - CS_CLR(); - for(i = 0; i < 16; i++) //reg - { - if(Data &(1<<(15-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - -/* - TXD_CLR(); //write - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - TXD_SET(); //highz - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - - //for(i = 0; i < 8; i++) //data - for(i = 0; i < 16; i++) - { - if(Data &(1<<(15-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } -*/ - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(2); - -} - - -int rk_lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); -/* -r0 00000010 11011011 -r1 00010001 01101111 -r2 00100000 10000000 -r3 00110000 00001000 -r4 01000001 10010000-->>01000001 10011111 -r5 01100001 11001110 -*/ - spi_screenreg_set(0x02db); - spi_screenreg_set(0x116f); - spi_screenreg_set(0x2080); - spi_screenreg_set(0x3008); - spi_screenreg_set(0x419f); - spi_screenreg_set(0x61ce); - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} - -int rk_lcd_standby(u8 enable) -{ - if(gLcd_info) - gLcd_info->io_init(); - if(!enable) { - rk_lcd_init(); - } //else { -// spi_screenreg_set(0x03, 0x5f); -// } - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} -#endif diff --git a/drivers/video/rockchip/screen/lcd_hsd100pxn.c b/drivers/video/rockchip/screen/lcd_hsd100pxn.c deleted file mode 100644 index 7e0485ca9541..000000000000 --- a/drivers/video/rockchip/screen/lcd_hsd100pxn.c +++ /dev/null @@ -1,130 +0,0 @@ - -#ifndef __LCD_HSD100PXN__ -#define __LCD_HSD100PXN__ -/* Base */ -#define SCREEN_TYPE SCREEN_LVDS -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666 -#define DCLK 65000000 -#define LCDC_ACLK 300000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 768 -#define V_FP 18 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#ifdef CONFIG_ONE_LCDC_DUAL_OUTPUT_INF -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK 64512000 -#define S_H_PW 114 -#define S_H_BP 210 -#define S_H_VD 1024 -#define S_H_FP 0 - -#define S_V_PW 4 -#define S_V_BP 10 -#define S_V_VD 768 -#define S_V_FP 0 - -#define S_H_ST 0 -#define S_V_ST 23 - -//1920*1080*50 -#define S1_OUT_CLK 53760000 -#define S1_H_PW 114 -#define S1_H_BP 210 -#define S1_H_VD 1024 -#define S1_H_FP 0 - -#define S1_V_PW 4 -#define S1_V_BP 10 -#define S1_V_VD 768 -#define S1_V_FP 0 - -#define S1_H_ST 0 -#define S1_V_ST 23 -//1280*720*60 -#define S2_OUT_CLK 64512000 -#define S2_H_PW 114 -#define S2_H_BP 210 -#define S2_H_VD 1024 -#define S2_H_FP 0 - -#define S2_V_PW 4 -#define S2_V_BP 10 -#define S2_V_VD 768 -#define S2_V_FP 0 - -#define S2_H_ST 0 -#define S2_V_ST 23 -//1280*720*50 - -#define S3_OUT_CLK 53760000 -#define S3_H_PW 114 -#define S3_H_BP 210 -#define S3_H_VD 1024 -#define S3_H_FP 0 - -#define S3_V_PW 4 -#define S3_V_BP 10 -#define S3_V_VD 768 -#define S3_V_FP 0 - -#define S3_H_ST 0 -#define S3_V_ST 23 - -//720*576*50 -#define S4_OUT_CLK 30000000 -#define S4_H_PW 1 -#define S4_H_BP 88 -#define S4_H_VD 800 -#define S4_H_FP 263 - -#define S4_V_PW 3 -#define S4_V_BP 9 -#define S4_V_VD 480 -#define S4_V_FP 28 - -#define S4_H_ST 0 -#define S4_V_ST 33 -//720*480*60 -#define S5_OUT_CLK 30000000 -#define S5_H_PW 1 -#define S5_H_BP 88 -#define S5_H_VD 800 -#define S5_H_FP 112 - -#define S5_V_PW 3 -#define S5_V_BP 9 -#define S5_V_VD 480 -#define S5_V_FP 28 - -#define S5_H_ST 0 -#define S5_V_ST 29 - -#define S_DCLK_POL 1 - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hsd100pxn_for_tdw851.c b/drivers/video/rockchip/screen/lcd_hsd100pxn_for_tdw851.c deleted file mode 100644 index 87563c0ddf44..000000000000 --- a/drivers/video/rockchip/screen/lcd_hsd100pxn_for_tdw851.c +++ /dev/null @@ -1,284 +0,0 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ -#include -#include -#include -#include - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_P888//OUT_D888_P666 //OUT_D888_P565 -#define DCLK 24000000 -#define LCDC_ACLK 456000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 10 -#define H_VD 480 -#define H_FP 12 - -#define V_PW 4 -#define V_BP 4 -#define V_VD 800 -#define V_FP 8 - -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define LCD_WIDTH 68//800 //need modify -#define LCD_HEIGHT 112//480 - -static struct rk29lcd_info *gLcd_info = NULL; - -#define RK_SCREEN_INIT //this screen need to init - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin -#define RST_PORT gLcd_info->reset_pin - - -#define CS_OUT() gpio_direction_output(CS_PORT, 1) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) - -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) - -#define TXD_OUT() gpio_direction_output(TXD_PORT, 1) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - -#define RST_OUT() gpio_direction_output(RST_PORT, 1) -#define RST_SET() gpio_set_value(RST_PORT, GPIO_HIGH) -#define RST_CLR() gpio_set_value(RST_PORT, GPIO_LOW) - -#define UDELAY_TIME 1 -#define MDELAY_TIME 120 -void Spi_Write_index(unsigned char index) -{ - int j; - CS_CLR(); - TXD_CLR(); //0 - udelay(UDELAY_TIME); - - CLK_CLR(); - udelay(3);// - - CLK_SET(); - udelay(UDELAY_TIME); - - TXD_CLR(); - CLK_CLR(); - - for(j=0;j<8;j++) - { - if(index&0x80) - { - TXD_SET(); - } - else - { - TXD_CLR(); - } - index<<=1; - - CLK_CLR(); - udelay(UDELAY_TIME); - CLK_SET(); - udelay(UDELAY_TIME); - } - CS_SET(); -} - -void Spi_Write_data(unsigned char data) -{ - int j; - CS_CLR(); - TXD_SET(); - udelay(UDELAY_TIME); - - CLK_CLR(); - udelay(3); - - CLK_SET(); - udelay(UDELAY_TIME); - - TXD_CLR(); - CLK_CLR(); - - for(j=0;j<8;j++) - { - if(data&0x80) - { - TXD_SET(); - } - else - { - TXD_CLR(); - } - data<<=1; - - CLK_CLR(); - udelay(UDELAY_TIME); - CLK_SET(); - udelay(UDELAY_TIME); - } - CS_SET(); -} - -void Lcd_WriteSpi_initial3(void) //HX8363A+IVO 20111128 canshu -{ - //FOR IVO5.2 + HX8363-A - //Set_EXTC - printk("Lcd_WriteSpi_initial3-------------\n"); - Spi_Write_index(0xB9); - Spi_Write_data(0xFF); - Spi_Write_data(0x83); - Spi_Write_data(0x63); - - //Set_VCOM - Spi_Write_index(0xB6); - Spi_Write_data(0x27);//09 - - - //Set_POWER - Spi_Write_index(0xB1); - Spi_Write_data(0x81); - Spi_Write_data(0x30); - Spi_Write_data(0x07);//04 - Spi_Write_data(0x33); - Spi_Write_data(0x02); - Spi_Write_data(0x13); - Spi_Write_data(0x11); - Spi_Write_data(0x00); - Spi_Write_data(0x24); - Spi_Write_data(0x2B); - Spi_Write_data(0x3F); - Spi_Write_data(0x3F); - - Spi_Write_index(0xBf); // - Spi_Write_data(0x00); - Spi_Write_data(0x10); - - //Sleep Out - Spi_Write_index(0x11); - mdelay(MDELAY_TIME); - - - //Set COLMOD - Spi_Write_index(0x3A); - Spi_Write_data(0x70); - - - //Set_RGBIF - Spi_Write_index(0xB3); - Spi_Write_data(0x01); - - - //Set_CYC - Spi_Write_index(0xB4); - Spi_Write_data(0x08); - Spi_Write_data(0x16); - Spi_Write_data(0x5C); - Spi_Write_data(0x0B); - Spi_Write_data(0x01); - Spi_Write_data(0x1E); - Spi_Write_data(0x7B); - Spi_Write_data(0x01); - Spi_Write_data(0x4D); - - //Set_PANEL - Spi_Write_index(0xCC); - //Spi_Write_data(0x01); - Spi_Write_data(0x09); - mdelay(5); - - - //Set Gamma 2.2 - Spi_Write_index(0xE0); - Spi_Write_data(0x00); - Spi_Write_data(0x1E); - Spi_Write_data(0x63); - Spi_Write_data(0x15); - Spi_Write_data(0x11); - Spi_Write_data(0x30); - Spi_Write_data(0x0C); - Spi_Write_data(0x8F); - Spi_Write_data(0x8F); - Spi_Write_data(0x15); - Spi_Write_data(0x17); - Spi_Write_data(0xD5); - Spi_Write_data(0x56); - Spi_Write_data(0x0e); - Spi_Write_data(0x15); - Spi_Write_data(0x00); - Spi_Write_data(0x1E); - Spi_Write_data(0x63); - Spi_Write_data(0x15); - Spi_Write_data(0x11); - Spi_Write_data(0x30); - Spi_Write_data(0x0C); - Spi_Write_data(0x8F); - Spi_Write_data(0x8F); - Spi_Write_data(0x15); - Spi_Write_data(0x17); - Spi_Write_data(0xD5); - Spi_Write_data(0x56); - Spi_Write_data(0x0e); - Spi_Write_data(0x15); - mdelay(5); - - //Display On - Spi_Write_index(0x29); - Spi_Write_index(0x2c); -} - - -static int rk_lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - - RST_CLR(); - CS_SET(); - CLK_SET(); - - mdelay(5); - RST_SET(); - mdelay(2); - - Lcd_WriteSpi_initial3(); - - return 0; -} -static int deinit(void) -{ - Spi_Write_index(0x10); - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; - -} -static int rk_lcd_standby(u8 enable) -{ - if(!enable) - rk_lcd_init(); - else - deinit(); - return 0; -} - diff --git a/drivers/video/rockchip/screen/lcd_hsd800x480.c b/drivers/video/rockchip/screen/lcd_hsd800x480.c deleted file mode 100755 index d08ddf710673..000000000000 --- a/drivers/video/rockchip/screen/lcd_hsd800x480.c +++ /dev/null @@ -1,207 +0,0 @@ -#ifndef __LCD_HSD800X480__ -#define __LCD_HSD800X480__ -#include -#include -#include -#include - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 33000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 8 //10 -#define H_BP 88 //100 -#define H_VD 800 //1024 -#define H_FP 40 //210 - -#define V_PW 3 //10 -#define V_BP 10 //10 -#define V_VD 480 //768 -#define V_FP 32 //18 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define LCD_WIDTH 154 //need modify -#define LCD_HEIGHT 85 - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin - -#define CS_OUT() gpio_direction_output(CS_PORT, 0) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 0) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - -static struct rk29lcd_info *gLcd_info = NULL; - -#define DRVDelayUs(i) udelay(i*2) -#define RK_SCREEN_INIT -int rk_lcd_init(void); -int rk_lcd_standby(u8 enable); - -void spi_screenreg_set(u32 Addr, u32 Data) -{ - u32 i; - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - - CS_CLR(); - for(i = 0; i < 6; i++) //reg - { - if(Addr &(1<<(5-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - TXD_CLR(); //write - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - TXD_SET(); //highz - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - - for(i = 0; i < 8; i++) //data - { - if(Data &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(2); - -} - - -int rk_lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); - - spi_screenreg_set(0x02, 0x07); - spi_screenreg_set(0x03, 0x5f); - spi_screenreg_set(0x04, 0x17); - spi_screenreg_set(0x05, 0x20); - spi_screenreg_set(0x06, 0x08); - spi_screenreg_set(0x07, 0x20); - spi_screenreg_set(0x08, 0x20); - spi_screenreg_set(0x09, 0x20); - spi_screenreg_set(0x0a, 0x20); - spi_screenreg_set(0x0b, 0x22); - spi_screenreg_set(0x0c, 0x22); - spi_screenreg_set(0x0d, 0x22); - spi_screenreg_set(0x0e, 0x10); - spi_screenreg_set(0x0f, 0x10); - spi_screenreg_set(0x10, 0x10); - - spi_screenreg_set(0x11, 0x15); - spi_screenreg_set(0x12, 0xAA); - spi_screenreg_set(0x13, 0xFF); - spi_screenreg_set(0x14, 0xb0); - spi_screenreg_set(0x15, 0x8e); - spi_screenreg_set(0x16, 0xd6); - spi_screenreg_set(0x17, 0xfe); - spi_screenreg_set(0x18, 0x28); - spi_screenreg_set(0x19, 0x52); - spi_screenreg_set(0x1A, 0x7c); - - spi_screenreg_set(0x1B, 0xe9); - spi_screenreg_set(0x1C, 0x42); - spi_screenreg_set(0x1D, 0x88); - spi_screenreg_set(0x1E, 0xb8); - spi_screenreg_set(0x1F, 0xFF); - spi_screenreg_set(0x20, 0xF0); - spi_screenreg_set(0x21, 0xF0); - spi_screenreg_set(0x22, 0x09); - - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} - -int rk_lcd_standby(u8 enable) -{ -#if 1 - if(gLcd_info) - gLcd_info->io_init(); - if(enable) { - spi_screenreg_set(0x03, 0xde); - } else { - spi_screenreg_set(0x03, 0x5f); - } - if(gLcd_info) - gLcd_info->io_deinit(); -#else - - GPIOSetPinDirection(GPIOPortB_Pin3, GPIO_OUT); - GPIOSetPinDirection(GPIOPortB_Pin2, GPIO_OUT); - - if(enable) - { - GPIOSetPinLevel(GPIOPortB_Pin3, GPIO_LOW); - GPIOSetPinLevel(GPIOPortB_Pin2, GPIO_HIGH); - } - else - { - GPIOSetPinLevel(GPIOPortB_Pin3, GPIO_HIGH); - GPIOSetPinLevel(GPIOPortB_Pin2, GPIO_LOW); - } -#endif - return 0; -} -#endif diff --git a/drivers/video/rockchip/screen/lcd_hv070wsa.c b/drivers/video/rockchip/screen/lcd_hv070wsa.c deleted file mode 100644 index b8e670933591..000000000000 --- a/drivers/video/rockchip/screen/lcd_hv070wsa.c +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef __LCD_HV070WSA__ -#define __LCD_HV070WSA__ - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_P888 -#define DCLK 50000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 100 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 120 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 600 -#define V_FP 15 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#endif diff --git a/drivers/video/rockchip/screen/lcd_hx8357.c b/drivers/video/rockchip/screen/lcd_hx8357.c deleted file mode 100755 index 2b3dc19683a6..000000000000 --- a/drivers/video/rockchip/screen/lcd_hx8357.c +++ /dev/null @@ -1,368 +0,0 @@ -#ifndef _LCD_HX8357_H_ -#define _LCD_HX8357_H_ - -#include -#include -#include -#include - - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 /*OUT_P888*/ -#define DCLK 10000000 //***27 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 8 -#define H_BP 6 -#define H_VD 320 //***800 -#define H_FP 60 - -#define V_PW 12 -#define V_BP 4 -#define V_VD 480 //***480 -#define V_FP 40 - -#define LCD_WIDTH 320 //need modify -#define LCD_HEIGHT 480 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -static struct rk29lcd_info *gLcd_info = NULL; -int rk_lcd_init(void); -int rk_lcd_standby(u8 enable); - - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin - -#define CS_OUT() gpio_direction_output(CS_PORT, 0) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 0) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - -#if 0 -static void screen_set_iomux(u8 enable) -{ - int ret=-1; - if(enable) - { - rk29_mux_api_set(GPIOH6_IQ_SEL_NAME, 0); - ret = gpio_request(RK29_PIN_PH6, NULL); - if(0)//(ret != 0) - { - gpio_free(RK29_PIN_PH6); - printk(">>>>>> lcd cs gpio_request err \n "); - goto pin_err; - } - - rk29_mux_api_set(GPIOE_I2C0_SEL_NAME, 1); - - ret = gpio_request(RK29_PIN_PE5, NULL); - if(0)//(ret != 0) - { - gpio_free(RK29_PIN_PE5); - printk(">>>>>> lcd clk gpio_request err \n "); - goto pin_err; - } - - ret = gpio_request(RK29_PIN_PE4, NULL); - if(0)//(ret != 0) - { - gpio_free(RK29_PIN_PE4); - printk(">>>>>> lcd txd gpio_request err \n "); - goto pin_err; - } - } - else - { - gpio_free(RK29_PIN_PH6); - // rk29_mux_api_set(CXGPIO_HSADC_SEL_NAME, 1); - - gpio_free(RK29_PIN_PE5); - gpio_free(RK29_PIN_PE4); - rk29_mux_api_set(GPIOE_I2C0_SEL_NAME, 0); - } - return ; -pin_err: - return ; - -} -#endif - -void spi_screenreg_set(u32 Addr, u32 Data) -{ -#define DRVDelayUs(i) udelay(i*2) - - u32 i; - u32 control_bit; - - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - - CS_CLR(); - control_bit = 0x70<<8; - Addr = (control_bit | Addr); - //printk("addr is 0x%x \n", Addr); - for(i = 0; i < 16; i++) //reg - { - if(Addr &(1<<(15-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - CS_CLR(); - - control_bit = 0x72<<8; - Data = (control_bit | Data); - //printk("data is 0x%x \n", Data); - for(i = 0; i < 16; i++) //data - { - if(Data &(1<<(15-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(2); -} - - - -int rk_lcd_init(void) -{ - - if(gLcd_info) - gLcd_info->io_init(); - -#if 0 //***Õâ¾ä´úÂëÊDz»ÊÇд´íÁË - spi_screenreg_set(0x02, 0x07); - spi_screenreg_set(0x03, 0x5f); - spi_screenreg_set(0x04, 0x17); - spi_screenreg_set(0x05, 0x20); - spi_screenreg_set(0x06, 0x08); - spi_screenreg_set(0x07, 0x20); - spi_screenreg_set(0x08, 0x20); - spi_screenreg_set(0x09, 0x20); - spi_screenreg_set(0x0a, 0x20); - spi_screenreg_set(0x0b, 0x22); - spi_screenreg_set(0x0c, 0x22); - spi_screenreg_set(0x0d, 0x22); - spi_screenreg_set(0x0e, 0x10); - spi_screenreg_set(0x0f, 0x10); - spi_screenreg_set(0x10, 0x10); - - spi_screenreg_set(0x11, 0x15); - spi_screenreg_set(0x12, 0xAA); - spi_screenreg_set(0x13, 0xFF); - spi_screenreg_set(0x14, 0xb0); - spi_screenreg_set(0x15, 0x8e); - spi_screenreg_set(0x16, 0xd6); - spi_screenreg_set(0x17, 0xfe); - spi_screenreg_set(0x18, 0x28); - spi_screenreg_set(0x19, 0x52); - spi_screenreg_set(0x1A, 0x7c); - - spi_screenreg_set(0x1B, 0xe9); - spi_screenreg_set(0x1C, 0x42); - spi_screenreg_set(0x1D, 0x88); - spi_screenreg_set(0x1E, 0xb8); - spi_screenreg_set(0x1F, 0xFF); - spi_screenreg_set(0x20, 0xF0); - spi_screenreg_set(0x21, 0xF0); - spi_screenreg_set(0x22, 0x09); -#else - spi_screenreg_set(0xff, 0x00); - spi_screenreg_set(0x16, 0x08); - spi_screenreg_set(0x01, 0x02); - spi_screenreg_set(0xe2, 0x00); - spi_screenreg_set(0xe3, 0x00); - spi_screenreg_set(0xf2, 0x00); - spi_screenreg_set(0xe4, 0x1c); - spi_screenreg_set(0xe5, 0x1c); - spi_screenreg_set(0xe6, 0x00); - spi_screenreg_set(0xe7, 0x1c); - - spi_screenreg_set(0x19, 0x01); - mdelay(10); - spi_screenreg_set(0x2a, 0x00); - spi_screenreg_set(0x2b, 0x13); - spi_screenreg_set(0x2f, 0x01); - spi_screenreg_set(0x02, 0x00); - spi_screenreg_set(0x03, 0x00); - spi_screenreg_set(0x04, 0x01); - spi_screenreg_set(0x05, 0x3f); - spi_screenreg_set(0x06, 0x00); - spi_screenreg_set(0x07, 0x00); - - spi_screenreg_set(0x08, 0x01); - spi_screenreg_set(0x09, 0xdf); - spi_screenreg_set(0x24, 0x91); - spi_screenreg_set(0x25, 0x8a); - spi_screenreg_set(0x29, 0x01); - spi_screenreg_set(0x18, 0x22); - spi_screenreg_set(0x1b, 0x30); - mdelay(10); - spi_screenreg_set(0x1d, 0x22); - mdelay(10); - spi_screenreg_set(0x40, 0x00); - spi_screenreg_set(0x41, 0x3c); - spi_screenreg_set(0x42, 0x38); - spi_screenreg_set(0x43, 0x34); - spi_screenreg_set(0x44, 0x2e); - spi_screenreg_set(0x45, 0x2f); - spi_screenreg_set(0x46, 0x41); - spi_screenreg_set(0x47, 0x7d); - spi_screenreg_set(0x48, 0x0b); - spi_screenreg_set(0x49, 0x05); - spi_screenreg_set(0x4a, 0x06); - spi_screenreg_set(0x4b, 0x12); - spi_screenreg_set(0x4c, 0x16); - spi_screenreg_set(0x50, 0x10); - spi_screenreg_set(0x51, 0x11); - spi_screenreg_set(0x52, 0x0b); - spi_screenreg_set(0x53, 0x07); - spi_screenreg_set(0x54, 0x03); - spi_screenreg_set(0x55, 0x3f); - spi_screenreg_set(0x56, 0x02); - spi_screenreg_set(0x57, 0x3e); - spi_screenreg_set(0x58, 0x09); - spi_screenreg_set(0x59, 0x0d); - spi_screenreg_set(0x5a, 0x19); - spi_screenreg_set(0x5b, 0x1a); - spi_screenreg_set(0x5c, 0x14); - spi_screenreg_set(0x5d, 0xc0); - spi_screenreg_set(0x1a, 0x05); - mdelay(10); - - spi_screenreg_set(0x1c, 0x03); - mdelay(10); - spi_screenreg_set(0x1f, 0x90); - mdelay(10); - spi_screenreg_set(0x1f, 0xd2); - mdelay(10); - spi_screenreg_set(0x28, 0x04); - mdelay(40); - spi_screenreg_set(0x28, 0x38); - mdelay(40); - spi_screenreg_set(0x28, 0x3c); - mdelay(40); - spi_screenreg_set(0x80, 0x00); - spi_screenreg_set(0x81, 0x00); - spi_screenreg_set(0x82, 0x00); - spi_screenreg_set(0x83, 0x00); - - spi_screenreg_set(0x60, 0x08); - spi_screenreg_set(0x31, 0x02); - spi_screenreg_set(0x32, 0x08 /*0x00*/); - spi_screenreg_set(0x17, 0x60); //***RGB666 - spi_screenreg_set(0x2d, 0x1f); - spi_screenreg_set(0xe8, 0x90); -#endif - if(gLcd_info) - gLcd_info->io_deinit(); - - return 0; -} - -int rk_lcd_standby(u8 enable) //***enable =1 means suspend, 0 means resume -{ - - if(gLcd_info) - gLcd_info->io_init(); - if(enable) { - //printk("---------hx8357 screen suspend--------------\n"); - #if 0 - spi_screenreg_set(0x03, 0xde); - #else - //modify by robert - #if 0 - spi_screenreg_set(0x1f, 0x91); - spi_screenreg_set(0x19, 0x00); - #else - spi_screenreg_set(0x28, 0x38); - msleep(10); - spi_screenreg_set(0x28, 0x24); - msleep(10); - spi_screenreg_set(0x28, 0x04); - #endif - //modify end - #endif - } else { - //printk("--------- hx8357 screen resume--------------\n "); - #if 0 - spi_screenreg_set(0x03, 0x5f); - #else - //modify by robert - #if 0 - spi_screenreg_set(0x19, 0x01); - spi_screenreg_set(0x1f, 0x90); - mdelay(10); - spi_screenreg_set(0x1f, 0xd2); - #else - spi_screenreg_set(0x28, 0x38); - msleep(10); - spi_screenreg_set(0x28, 0x3c); - msleep(10); - spi_screenreg_set(0x80, 0x00); - spi_screenreg_set(0x81, 0x00); - spi_screenreg_set(0x82, 0x00); - spi_screenreg_set(0x83, 0x00); - - #endif - //modify end - #endif - } - - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} -#endif diff --git a/drivers/video/rockchip/screen/lcd_ili9803_cpt4_3.c b/drivers/video/rockchip/screen/lcd_ili9803_cpt4_3.c deleted file mode 100644 index aba60562dbc3..000000000000 --- a/drivers/video/rockchip/screen/lcd_ili9803_cpt4_3.c +++ /dev/null @@ -1,380 +0,0 @@ -/* - * Copyright (C) 2011 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2011-05-14 - * route:drivers/video/display/screen/lcd_ili9803_cpt4_3.c - driver for rk29 phone sdk or rk29 a22 - * station:haven been tested in a22 hardware platform - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - - - -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include -#include "screen.h" - - -/* Base */ -#define OUT_TYPE SCREEN_RGB -#define OUT_FACE OUT_P666 -#define OUT_CLK 26000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA - -/* Timing */ -#define H_PW 8 -#define H_BP 6 -#define H_VD 480 -#define H_FP 60 - -#define V_PW 2 -#define V_BP 12 -#define V_VD 800 -#define V_FP 4 - - -#define LCD_WIDTH 480 //need modify -#define LCD_HEIGHT 800 - -/* Other */ -#define DCLK_POL 1 -#define SWAP_RB 0 - - -/* define spi write command and data interface function */ - -#define SIMULATION_SPI 1 -#ifdef SIMULATION_SPI - - #define TXD_PORT gLcd_info->txd_pin - #define CLK_PORT gLcd_info->clk_pin - #define CS_PORT gLcd_info->cs_pin - #define LCD_RST_PORT RK29_PIN6_PC6 - - #define CS_OUT() gpio_direction_output(CS_PORT, 0) - #define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) - #define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) - #define CLK_OUT() gpio_direction_output(CLK_PORT, 0) - #define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) - #define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) - #define TXD_OUT() gpio_direction_output(TXD_PORT, 0) - #define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) - #define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - #define LCD_RST_OUT() gpio_direction_output(LCD_RST_PORT, 0) - #define LCD_RST(i) gpio_set_value(LCD_RST_PORT, i) - - #define bits_9 - #ifdef bits_9 //9bits - - #define LCD_ILI9803_CMD(cmd) spi_write_9bit(0, cmd) - #define LCD_ILI9803_Parameter(dat) spi_write_9bit(1, dat) - #else //16bits - #define LCD_ILI9803_CMD(cmd) spi_write_16bit(0, cmd) - #define LCD_ILI9803_Parameter(dat) spi_write_16bit(1, dat) - #endif - #define Lcd_EnvidOnOff(i) - -#else - - #define bits_9 1 - #ifdef bits_9 //9bits - #define LCD_ILI9803_CMD(cmd) - #define LCD_ILI9803_Parameter(dat) - #else //16bits - #define LCD_ILI9803_CMD(cmd) - #define LCD_ILI9803_Parameter(dat) - #endif - -#endif - - -/* define lcd command */ -#define ENTER_SLEEP_MODE 0x10 -#define EXIT_SLEEP_MODE 0x11 -#define SET_COLUMN_ADDRESS 0x2a -#define SET_PAGE_ADDRESS 0x2b -#define WRITE_MEMORY_START 0x2c -#define SET_DISPLAY_ON 0x29 -#define SET_DISPLAY_OFF 0x28 -#define SET_ADDRESS_MODE 0x36 -#define SET_PIXEL_FORMAT 0x3a - - -#define DRVDelayUs(i) udelay(i*2) - -static struct rk29lcd_info *gLcd_info = NULL; -int lcd_init(void); -int lcd_standby(u8 enable); - - -/* spi write a data frame,type mean command or data */ -int spi_write_9bit(u32 type, u32 value) -{ - u32 i = 0; - - if(type != 0 && type != 1) - { - return -1; - } - /*make a data frame of 9 bits,the 8th bit 0:mean command,1:mean data*/ - value &= 0xff; - value |= (type << 8); -// if(0 == type){ - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - CS_CLR(); -// } - - for(i = 0; i < 9; i++) //reg - { - - CLK_CLR(); - DRVDelayUs(2); - if(value & (1 << (8-i))) - { - TXD_SET(); - } - else - { - TXD_CLR(); - } - CLK_SET(); - DRVDelayUs(2); - } - -// if(0 == type){ - CS_SET(); - CLK_CLR(); - TXD_CLR(); -// } - - DRVDelayUs(2); - return 0; -} - - -int lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); - printk("*****lcd_init...*****\n"); -/* reset lcd to start init lcd by software if there is no hardware reset circuit for the lcd */ -#ifdef LCD_RST_PORT - gpio_request(LCD_RST_PORT, NULL); - LCD_RST_OUT(); - LCD_RST(1); - msleep(1); - LCD_RST(0); - msleep(10); - LCD_RST(1); - msleep(120); - -#endif - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - CS_SET(); - TXD_SET(); - CLK_SET(); - - LCD_ILI9803_CMD(0xB1); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_CMD(0xB2); - LCD_ILI9803_Parameter(0x10); - LCD_ILI9803_Parameter(0xC7); - LCD_ILI9803_CMD(0xB3); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_CMD(0xB4); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_CMD(0xB9); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_CMD(0xC3); - LCD_ILI9803_Parameter(0x07); - LCD_ILI9803_CMD(0xB2); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_Parameter(0x0B); - LCD_ILI9803_Parameter(0x0B); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x07); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_CMD(0xC5); - LCD_ILI9803_Parameter(0x6E); - LCD_ILI9803_CMD(0xC2); - LCD_ILI9803_Parameter(0x20); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x10); - msleep(20); - LCD_ILI9803_CMD(0xC8); - LCD_ILI9803_Parameter(0xA3); - LCD_ILI9803_CMD(0xC9); - LCD_ILI9803_Parameter(0x32); - LCD_ILI9803_Parameter(0x06); - LCD_ILI9803_CMD(0xD7); - LCD_ILI9803_Parameter(0x03); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x0F); - LCD_ILI9803_Parameter(0x0F); - LCD_ILI9803_CMD(0xCF); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x08); - LCD_ILI9803_CMD(0xB6); - LCD_ILI9803_Parameter(0x20); - LCD_ILI9803_Parameter(0xC2); - LCD_ILI9803_Parameter(0xFF); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_CMD(0xEA); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_CMD(0x2A); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x01); - LCD_ILI9803_Parameter(0xDF); - LCD_ILI9803_CMD(0x2B); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x03); - LCD_ILI9803_Parameter(0xEF); - LCD_ILI9803_CMD(0xB0); - LCD_ILI9803_Parameter(0x01); - LCD_ILI9803_CMD(0x0C); - LCD_ILI9803_Parameter(0x50); - LCD_ILI9803_CMD(0x36); - LCD_ILI9803_Parameter(0x48); - LCD_ILI9803_CMD(0x3A); - LCD_ILI9803_Parameter(0x66); - LCD_ILI9803_CMD(0xE0); - LCD_ILI9803_Parameter(0x05); - LCD_ILI9803_Parameter(0x07); - LCD_ILI9803_Parameter(0x0B); - LCD_ILI9803_Parameter(0x14); - LCD_ILI9803_Parameter(0x11); - LCD_ILI9803_Parameter(0x14); - LCD_ILI9803_Parameter(0x0A); - LCD_ILI9803_Parameter(0x07); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_Parameter(0x0B); - LCD_ILI9803_Parameter(0x02); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_Parameter(0x33); - LCD_ILI9803_Parameter(0x36); - LCD_ILI9803_Parameter(0x1F); - LCD_ILI9803_CMD(0xE1); - LCD_ILI9803_Parameter(0x1F); - LCD_ILI9803_Parameter(0x36); - LCD_ILI9803_Parameter(0x33); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_Parameter(0x00); - LCD_ILI9803_Parameter(0x02); - LCD_ILI9803_Parameter(0x0B); - LCD_ILI9803_Parameter(0x04); - LCD_ILI9803_Parameter(0x07); - LCD_ILI9803_Parameter(0x0A); - LCD_ILI9803_Parameter(0x14); - LCD_ILI9803_Parameter(0x11); - LCD_ILI9803_Parameter(0x14); - LCD_ILI9803_Parameter(0x0B); - LCD_ILI9803_Parameter(0x07); - LCD_ILI9803_Parameter(0x05); - LCD_ILI9803_CMD(EXIT_SLEEP_MODE); - msleep(70); - LCD_ILI9803_CMD(SET_DISPLAY_ON); - msleep(10); - LCD_ILI9803_CMD(WRITE_MEMORY_START); - - if(gLcd_info) - gLcd_info->io_deinit(); - - return 0; -} - -extern void rk29_lcd_spim_spin_lock(void); -extern void rk29_lcd_spim_spin_unlock(void); -int lcd_standby(u8 enable) -{ - rk29_lcd_spim_spin_lock(); - if(gLcd_info) - gLcd_info->io_init(); - - if(enable) { - LCD_ILI9803_CMD(ENTER_SLEEP_MODE); - msleep(150); - printk("lcd enter sleep mode\n"); - } else { - LCD_ILI9803_CMD(EXIT_SLEEP_MODE); - msleep(150); - printk("lcd exit sleep mode\n"); - } - - if(gLcd_info) - gLcd_info->io_deinit(); - rk29_lcd_spim_spin_unlock(); - - return 0; -} - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - if(lcd_info) - gLcd_info = lcd_info; -} - - - diff --git a/drivers/video/rockchip/screen/lcd_ips1p5680_v1_e.c b/drivers/video/rockchip/screen/lcd_ips1p5680_v1_e.c deleted file mode 100644 index 4dafd4d5db69..000000000000 --- a/drivers/video/rockchip/screen/lcd_ips1p5680_v1_e.c +++ /dev/null @@ -1,239 +0,0 @@ -/* - * Copyright (C) 2011 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2011-03-07 - * route:drivers/video/display/screen/lcd_ips1p5680_v1_e.c - driver for rk29 phone sdk - * station:haven't been tested in any hardware platform - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include "screen.h" - -/* Base */ -#define OUT_TYPE SCREEN_MCU -#define OUT_FACE OUT_P565 - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 320 -#define H_FP 5 - -#define V_PW 1 -#define V_BP 1 -#define V_VD 480 -#define V_FP 1 - -#define LCD_WIDTH 320 //need modify -#define LCD_HEIGHT 480 - -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -#define P_WR 27 -#define USE_FMARK 0 //2 ÊÇ·ñʹÓÃFMK (0:²»Ö§³Ö 1:ºáÆÁÖ§³Ö 2:ºáÊúÆÁ¶ŒÖ§³Ö) -#define FRMRATE 60 //MCUÆÁµÄË¢ÐÂÂÊ (FMKÓÐЧʱÓÃ) - - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - - -/* define lcd command */ -#define ENTER_SLEEP_MODE 0x10 -#define EXIT_SLEEP_MODE 0x11 -#define SET_COLUMN_ADDRESS 0x2a -#define SET_PAGE_ADDRESS 0x2b -#define WRITE_MEMORY_START 0x2c -#define SET_DISPLAY_ON 0x29 -#define SET_DISPLAY_OFF 0x28 -#define SET_ADDRESS_MODE 0x36 -#define SET_PIXEL_FORMAT 0x3a - - -/* initialize the lcd registers to make it function noamally*/ - -int lcd_init(void) -{ - int i =0; - mcu_ioctl(MCU_SETBYPASS, 1); - msleep(5); - mcu_ioctl(MCU_WRCMD, SET_ADDRESS_MODE); //set address normal mode - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRCMD, SET_PIXEL_FORMAT); //set 16 bits per pixel - mcu_ioctl(MCU_WRDATA, 0x55); - mcu_ioctl(MCU_WRCMD, EXIT_SLEEP_MODE); //set lcd exit sleep mode,because the lcd is in sleep mode when power on - msleep(1000*6 / FRMRATE + 10); //wait for about 6 frames' time - mcu_ioctl(MCU_WRCMD, SET_DISPLAY_ON); //set display on - msleep(1000/FRMRATE); - - /*init lcd internal ram,so lcd won't display randomly*/ - mcu_ioctl(MCU_WRCMD, SET_COLUMN_ADDRESS); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, (LCD_WIDTH >> 8) & 0x0003); - mcu_ioctl(MCU_WRDATA, LCD_WIDTH & 0x00ff); - msleep(10); - mcu_ioctl(MCU_WRCMD, SET_PAGE_ADDRESS); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, (LCD_HEIGHT >> 8) & 0x0003); - mcu_ioctl(MCU_WRDATA, LCD_HEIGHT & 0x00ff); - msleep(10); - mcu_ioctl(MCU_WRCMD, WRITE_MEMORY_START); - - for(i = 0; i < LCD_WIDTH*LCD_HEIGHT; i++) - { - mcu_ioctl(MCU_WRDATA, 0x00000000); - } - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - -/* set lcd to sleep mode or not */ - -int lcd_standby(u8 enable) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - if(enable) { - mcu_ioctl(MCU_WRCMD, ENTER_SLEEP_MODE); - } else { - mcu_ioctl(MCU_WRCMD, EXIT_SLEEP_MODE); - } - - mcu_ioctl(MCU_SETBYPASS, 0); - - return 0; -} - -/* set lcd to write memory mode, so the lcdc of RK29xx can send the fb content to the lcd internal ram in hold mode*/ - -int lcd_refresh(u8 arg) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - switch(arg) - { - case REFRESH_PRE: //start to write the image data to lcd ram - mcu_ioctl(MCU_WRCMD, SET_COLUMN_ADDRESS); //set - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, (LCD_WIDTH >> 8) & 0x0003); - mcu_ioctl(MCU_WRDATA, LCD_WIDTH & 0x00ff); - msleep(10); - mcu_ioctl(MCU_WRCMD, SET_PAGE_ADDRESS); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, (LCD_HEIGHT >> 8) & 0x0003); - mcu_ioctl(MCU_WRDATA, LCD_HEIGHT & 0x00ff); - msleep(10); - mcu_ioctl(MCU_WRCMD, WRITE_MEMORY_START); - break; - - case REFRESH_END: //set display on - mcu_ioctl(MCU_WRCMD, SET_DISPLAY_ON); - break; - - default: - break; - } - - mcu_ioctl(MCU_SETBYPASS, 0); - - return 0; -} - - -/* not used */ - -int lcd_scandir(u16 dir) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - -// mcu_ioctl(MCU_WRCMD, SET_DISPLAY_OFF); - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - - -/* not used */ - -int lcd_disparea(u8 area) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - mcu_ioctl(MCU_SETBYPASS, 0); - return (0); -} - - -/* set real information about lcd which we use in this harware platform */ - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - screen->mcu_wrperiod = P_WR; - screen->mcu_usefmk = USE_FMARK; - screen->mcu_frmrate = FRMRATE; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - screen->scandir = lcd_scandir; - screen->refresh = lcd_refresh; - screen->disparea = lcd_disparea; -} - - - - - - diff --git a/drivers/video/rockchip/screen/lcd_mcu_tft480800_25_e.c b/drivers/video/rockchip/screen/lcd_mcu_tft480800_25_e.c deleted file mode 100644 index f88c493a184f..000000000000 --- a/drivers/video/rockchip/screen/lcd_mcu_tft480800_25_e.c +++ /dev/null @@ -1,556 +0,0 @@ -/* - * Copyright (C) 2011 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2011-03-11 - * route:drivers/video/display/screen/lcd_mcu_tft480800_25_e.c - driver for rk29 phone sdk - * station:haven't been tested in any hardware platform - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include "screen.h" - -/* Base */ -#define OUT_TYPE SCREEN_MCU -#define OUT_FACE OUT_P888 - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 480 -#define H_FP 5 - -#define V_PW 1 -#define V_BP 1 -#define V_VD 800 -#define V_FP 1 - -#define LCD_WIDTH 480 //need modify -#define LCD_HEIGHT 800 - -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -#define P_WR 27 -#define USE_FMARK 0 //2 ÊÇ·ñʹÓÃFMK (0:²»Ö§³Ö 1:ºáÆÁÖ§³Ö 2:ºáÊúÆÁ¶ŒÖ§³Ö) -#define FRMRATE 60 //MCUÆÁµÄË¢ÐÂÂÊ (FMKÓÐЧʱÓÃ) - - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - - -/* define lcd command */ -#define ENTER_SLEEP_MODE 0x10 -#define EXIT_SLEEP_MODE 0x11 -#define SET_COLUMN_ADDRESS 0x2a -#define SET_PAGE_ADDRESS 0x2b -#define WRITE_MEMORY_START 0x2c -#define SET_DISPLAY_ON 0x29 -#define SET_DISPLAY_OFF 0x28 -#define SET_ADDRESS_MODE 0x36 -#define SET_PIXEL_FORMAT 0x3a - - -#define WMLCDCOM(command) mcu_ioctl(MCU_WRCMD,command) -#define WMLCDDATA(data) mcu_ioctl(MCU_WRDATA,data) - - - - -/* initialize the lcd registers to make it function noamally*/ - -int lcd_init(void) -{ - int k = 0; - mcu_ioctl(MCU_SETBYPASS, 1); - -#if 1 //HX8369-A - - WMLCDCOM(0xB9); // SET password - WMLCDDATA(0xFF); - WMLCDDATA(0x83); - WMLCDDATA(0x69); - - WMLCDCOM(0xB0); //Enable internal oscillator - WMLCDDATA(0x01); - WMLCDDATA(0x0B); - - - WMLCDCOM(0xB1); //Set Power - WMLCDDATA(0x85); - WMLCDDATA(0x00); - WMLCDDATA(0x34); - WMLCDDATA(0x0A); - WMLCDDATA(0x00); - WMLCDDATA(0x0F); - WMLCDDATA(0x0F); - WMLCDDATA(0x2A); - WMLCDDATA(0x32); - WMLCDDATA(0x3F); - WMLCDDATA(0x3F); - WMLCDDATA(0x01); //update VBIAS - WMLCDDATA(0x23); - WMLCDDATA(0x01); - WMLCDDATA(0xE6); - WMLCDDATA(0xE6); - WMLCDDATA(0xE6); - WMLCDDATA(0xE6); - WMLCDDATA(0xE6); - - - WMLCDCOM(0xB2); // SET Display 480x800 - WMLCDDATA(0x00); - WMLCDDATA(0x20); - WMLCDDATA(0x05); - WMLCDDATA(0x05); - WMLCDDATA(0x70); //70 - WMLCDDATA(0x00); //00 - WMLCDDATA(0xFF); //FF - WMLCDDATA(0x00); - WMLCDDATA(0x00); - WMLCDDATA(0x00); - WMLCDDATA(0x00); //1 - WMLCDDATA(0x03); - WMLCDDATA(0x03); - WMLCDDATA(0x00); - WMLCDDATA(0x01); - - - - WMLCDCOM(0xB4); // SET Display 480x800 - WMLCDDATA(0x00); //00 - WMLCDDATA(0x18); //18 - WMLCDDATA(0x80); //80 - WMLCDDATA(0x06); - WMLCDDATA(0x02); - - WMLCDCOM(0xB6); // SET VCOM - WMLCDDATA(0x3A); // Update VCOM - WMLCDDATA(0x3A); - - - /************CABC test ***************/ - - WMLCDCOM(0X51);//Write Display Brightness - WMLCDDATA(0Xff);//DBV[7:0]=0XE4 - msleep(20); - - /* - WMLCDCOM(0XC9);//SETCABC - WMLCDDATA(0X5F);//PWM_DIV="110" PWM_CLK 64·ÖƵ INVPULS="1" - WMLCDDATA(0X7F);//WMLCDDATA(0X7F); - WMLCDDATA(0X20);//PWM_EPERIOD - WMLCDDATA(0X00);//SAVEPOWER[6:0] - WMLCDDATA(0X20);//DIM_FRAM[6:0] - WMLCDDATA(0X00);// - WMLCDDATA(0X03);//CABC_FLM - WMLCDDATA(0X20);// - msleep(20); - */ - - WMLCDCOM(0X53);//WRITE CTRL DISPLAY - WMLCDDATA(0X24);//WMLCDDATA(0X26) BCTRL="1" BL="1" DD="1"/"0" - msleep(20); - - WMLCDCOM(0X55); - WMLCDDATA(0X02);//STILL PICTURE - msleep(20); - - //WMLCDCOM(0X5E);//Write CABC minimum brightness (5Eh) - //WMLCDDATA(0X00);//CMB[7:0=0X00 - //msleep(20); - - - /***************************************/ - - WMLCDCOM(0x2A); //set window - WMLCDDATA(0x00); - WMLCDDATA(0x00); - WMLCDDATA(0x0); - WMLCDDATA(0xF0); - - WMLCDCOM(0x2B); - WMLCDDATA(0x00); - WMLCDDATA(0x00); - WMLCDDATA(0x01); - WMLCDDATA(0x40); - - WMLCDCOM(0xD5); //Set GIP - WMLCDDATA(0x00); - WMLCDDATA(0x04); - WMLCDDATA(0x03); - WMLCDDATA(0x00); - WMLCDDATA(0x01); - WMLCDDATA(0x05); - WMLCDDATA(0x28); - WMLCDDATA(0x70); - WMLCDDATA(0x01); - WMLCDDATA(0x03); - WMLCDDATA(0x00); - WMLCDDATA(0x00); - WMLCDDATA(0x40); - WMLCDDATA(0x06); - WMLCDDATA(0x51); - WMLCDDATA(0x07); - WMLCDDATA(0x00); - WMLCDDATA(0x00); - WMLCDDATA(0x41); - WMLCDDATA(0x06); - WMLCDDATA(0x50); - WMLCDDATA(0x07); - WMLCDDATA(0x07); - WMLCDDATA(0x0F); - WMLCDDATA(0x04); - WMLCDDATA(0x00); - - - //Gamma2.2 - WMLCDCOM(0xE0); - WMLCDDATA(0x00); - WMLCDDATA(0x13); - WMLCDDATA(0x19); - WMLCDDATA(0x38); - WMLCDDATA(0x3D); - WMLCDDATA(0x3F); - WMLCDDATA(0x28); - WMLCDDATA(0x46); - WMLCDDATA(0x07); - WMLCDDATA(0x0D); - WMLCDDATA(0x0E); - WMLCDDATA(0x12); - WMLCDDATA(0x15); - WMLCDDATA(0x12); - WMLCDDATA(0x14); - WMLCDDATA(0x0F); - WMLCDDATA(0x17); - WMLCDDATA(0x00); - WMLCDDATA(0x13); - WMLCDDATA(0x19); - WMLCDDATA(0x38); - WMLCDDATA(0x3D); - WMLCDDATA(0x3F); - WMLCDDATA(0x28); - WMLCDDATA(0x46); - WMLCDDATA(0x07); - WMLCDDATA(0x0D); - WMLCDDATA(0x0E); - WMLCDDATA(0x12); - WMLCDDATA(0x15); - WMLCDDATA(0x12); - WMLCDDATA(0x14); - WMLCDDATA(0x0F); - WMLCDDATA(0x17); - msleep(10); - - //DGC Setting - WMLCDCOM(0xC1); - WMLCDDATA(0x01); - - //R - WMLCDDATA(0x00); - WMLCDDATA(0x04); - WMLCDDATA(0x11); - WMLCDDATA(0x19); - WMLCDDATA(0x20); - WMLCDDATA(0x29); - WMLCDDATA(0x30); - WMLCDDATA(0x37); - WMLCDDATA(0x40); - WMLCDDATA(0x4A); - WMLCDDATA(0x52); - WMLCDDATA(0x59); - WMLCDDATA(0x60); - WMLCDDATA(0x68); - WMLCDDATA(0x70); - WMLCDDATA(0x79); - WMLCDDATA(0x81); - WMLCDDATA(0x89); - WMLCDDATA(0x91); - WMLCDDATA(0x99); - WMLCDDATA(0xA1); - WMLCDDATA(0xA8); - WMLCDDATA(0xB0); - WMLCDDATA(0xB8); - WMLCDDATA(0xC1); - WMLCDDATA(0xC9); - WMLCDDATA(0xD0); - WMLCDDATA(0xD8); - WMLCDDATA(0xE1); - WMLCDDATA(0xE8); - WMLCDDATA(0xF1); - WMLCDDATA(0xF8); - WMLCDDATA(0xFF); - WMLCDDATA(0x31); - WMLCDDATA(0x9C); - WMLCDDATA(0x57); - WMLCDDATA(0xED); - WMLCDDATA(0x57); - WMLCDDATA(0x7F); - WMLCDDATA(0x61); - WMLCDDATA(0xAD); - WMLCDDATA(0xC0); -//G - WMLCDDATA(0x00); - WMLCDDATA(0x04); - WMLCDDATA(0x11); - WMLCDDATA(0x19); - WMLCDDATA(0x20); - WMLCDDATA(0x29); - WMLCDDATA(0x30); - WMLCDDATA(0x37); - WMLCDDATA(0x40); - WMLCDDATA(0x4A); - WMLCDDATA(0x52); - WMLCDDATA(0x59); - WMLCDDATA(0x60); - WMLCDDATA(0x68); - WMLCDDATA(0x70); - WMLCDDATA(0x79); - WMLCDDATA(0x81); - WMLCDDATA(0x89); - WMLCDDATA(0x91); - WMLCDDATA(0x99); - WMLCDDATA(0xA1); - WMLCDDATA(0xA8); - WMLCDDATA(0xB0); - WMLCDDATA(0xB8); - WMLCDDATA(0xC1); - WMLCDDATA(0xC9); - WMLCDDATA(0xD0); - WMLCDDATA(0xD8); - WMLCDDATA(0xE1); - WMLCDDATA(0xE8); - WMLCDDATA(0xF1); - WMLCDDATA(0xF8); - WMLCDDATA(0xFF); - WMLCDDATA(0x31); - WMLCDDATA(0x9C); - WMLCDDATA(0x57); - WMLCDDATA(0xED); - WMLCDDATA(0x57); - WMLCDDATA(0x7F); - WMLCDDATA(0x61); - WMLCDDATA(0xAD); - WMLCDDATA(0xC0); - //B - WMLCDDATA(0x00); - WMLCDDATA(0x04); - WMLCDDATA(0x11); - WMLCDDATA(0x19); - WMLCDDATA(0x20); - WMLCDDATA(0x29); - WMLCDDATA(0x30); - WMLCDDATA(0x37); - WMLCDDATA(0x40); - WMLCDDATA(0x4A); - WMLCDDATA(0x52); - WMLCDDATA(0x59); - WMLCDDATA(0x60); - WMLCDDATA(0x68); - WMLCDDATA(0x70); - WMLCDDATA(0x79); - WMLCDDATA(0x81); - WMLCDDATA(0x89); - WMLCDDATA(0x91); - WMLCDDATA(0x99); - WMLCDDATA(0xA1); - WMLCDDATA(0xA8); - WMLCDDATA(0xB0); - WMLCDDATA(0xB8); - WMLCDDATA(0xC1); - WMLCDDATA(0xC9); - WMLCDDATA(0xD0); - WMLCDDATA(0xD8); - WMLCDDATA(0xE1); - WMLCDDATA(0xE8); - WMLCDDATA(0xF1); - WMLCDDATA(0xF8); - WMLCDDATA(0xFF); - WMLCDDATA(0x31); - WMLCDDATA(0x9C); - WMLCDDATA(0x57); - WMLCDDATA(0xED); - WMLCDDATA(0x57); - WMLCDDATA(0x7F); - WMLCDDATA(0x61); - WMLCDDATA(0xAD); - WMLCDDATA(0xC0); - WMLCDCOM(0x2D);//Look up table - - for(k = 0; k < 64; k++) //RED - { - WMLCDDATA(8*k); - } - for(k = 0; k < 64; k++) //GREEN - { - WMLCDDATA(4*k); - } - for(k = 0; k < 64; k++) //BLUE - { - WMLCDDATA(8*k); - } - - msleep(10); - WMLCDCOM(SET_PIXEL_FORMAT); //pixel format setting - WMLCDDATA(0x77); - - WMLCDCOM(EXIT_SLEEP_MODE); - msleep(120); - - WMLCDCOM(SET_DISPLAY_ON); //Display on - WMLCDCOM(WRITE_MEMORY_START); - -#endif - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - -/* set lcd to sleep mode or not */ - -int lcd_standby(u8 enable) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - if(enable) { - mcu_ioctl(MCU_WRCMD, ENTER_SLEEP_MODE); - msleep(10); - } else { - mcu_ioctl(MCU_WRCMD, EXIT_SLEEP_MODE); - msleep(20); - } - - mcu_ioctl(MCU_SETBYPASS, 0); - - return 0; -} - -/* set lcd to write memory mode, so the lcdc of RK29xx can send the fb content to the lcd internal ram in hold mode*/ - -int lcd_refresh(u8 arg) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - switch(arg) - { - case REFRESH_PRE: //start to write the image data to lcd ram - mcu_ioctl(MCU_WRCMD, SET_COLUMN_ADDRESS); //set - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, (LCD_WIDTH >> 8) & 0x00ff); - mcu_ioctl(MCU_WRDATA, LCD_WIDTH & 0x00ff); - msleep(1); - mcu_ioctl(MCU_WRCMD, SET_PAGE_ADDRESS); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, 0); - mcu_ioctl(MCU_WRDATA, (LCD_HEIGHT >> 8) & 0x00ff); - mcu_ioctl(MCU_WRDATA, LCD_HEIGHT & 0x00ff); - msleep(1); - mcu_ioctl(MCU_WRCMD, WRITE_MEMORY_START); - break; - - case REFRESH_END: //set display on - mcu_ioctl(MCU_WRCMD, SET_DISPLAY_ON); - break; - - default: - break; - } - - mcu_ioctl(MCU_SETBYPASS, 0); - - return 0; -} - - -/* not used */ - -int lcd_scandir(u16 dir) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - -// mcu_ioctl(MCU_WRCMD, SET_DISPLAY_OFF); - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - - -/* not used */ - -int lcd_disparea(u8 area) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - mcu_ioctl(MCU_SETBYPASS, 0); - return (0); -} - - -/* set real information about lcd which we use in this harware platform */ - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - screen->mcu_wrperiod = P_WR; - screen->mcu_usefmk = USE_FMARK; - screen->mcu_frmrate = FRMRATE; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - screen->scandir = lcd_scandir; - screen->refresh = lcd_refresh; - screen->disparea = lcd_disparea; -} - - - - - - diff --git a/drivers/video/rockchip/screen/lcd_mq0801d.c b/drivers/video/rockchip/screen/lcd_mq0801d.c deleted file mode 100644 index 5ddaadc1b38f..000000000000 --- a/drivers/video/rockchip/screen/lcd_mq0801d.c +++ /dev/null @@ -1,186 +0,0 @@ - -#ifndef __LCD_H__ -#define __LCD_H__ - -#if defined(CONFIG_RK610_LVDS) -#include "../transmitter/rk610_lcd.h" -#endif - - -#ifdef CONFIG_RK610_LVDS -#define SCREEN_TYPE SCREEN_LVDS -#else -#define SCREEN_TYPE SCREEN_RGB -#endif -#define LVDS_FORMAT LVDS_8BIT_1 - -#define OUT_FACE OUT_P888 -#define DCLK 67000000 // 65000000 -#define LCDC_ACLK 312000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 10 -#define H_VD 1024 -#define H_FP 300 - -#define V_PW 4 -#define V_BP 4 -#define V_VD 768 -#define V_FP 30 - -#define LCD_WIDTH 162 -#define LCD_HEIGHT 121 -/* Other */ -#ifdef CONFIG_RK610_LVDS -#define DCLK_POL 1 -#else -#define DCLK_POL 0 -#endif - -#define SWAP_RB 0 - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -#define USE_RK_DSP_LUT -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,54000000) -#define S_H_PW 20 -#define S_H_BP 20 -#define S_H_VD 1024 -#define S_H_FP 61 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 768 -#define S_V_FP 12 - -#define S_H_ST 0 -#define S_V_ST 12 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,53035713) -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1024 -#define S1_H_FP 282 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 768 -#define S1_V_FP 11 - -#define S1_H_ST 1145 -#define S1_V_ST 11 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,54000000) -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1024 -#define S2_H_FP 81 - -#define S2_V_PW 8 -#define S2_V_BP 7 -#define S2_V_VD 768 -#define S2_V_FP 15 - -#define S2_H_ST 0 -#define S2_V_ST 12 - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,52117790) -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1024 -#define S3_H_FP 259 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 768 -#define S3_V_FP 8 - -#define S3_H_ST 1040 -#define S3_V_ST 7 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,52125000) -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1024 -#define S4_H_FP 207 - -#define S4_V_PW 15 -#define S4_V_BP 12 -#define S4_V_VD 768 -#define S4_V_FP 10 - -#define S4_H_ST 417 -#define S4_V_ST 25 - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,58153847) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1024 -#define S5_H_FP 111 - -#define S5_V_PW 4 -#define S5_V_BP 3 -#define S5_V_VD 768 -#define S5_V_FP 31 - -#define S5_H_ST 693 -#define S5_V_ST 35 - -#define S_DCLK_POL 1 - -#endif - -#endif diff --git a/drivers/video/rockchip/screen/lcd_nt35510.c b/drivers/video/rockchip/screen/lcd_nt35510.c deleted file mode 100644 index 95f5f06248bb..000000000000 --- a/drivers/video/rockchip/screen/lcd_nt35510.c +++ /dev/null @@ -1,1600 +0,0 @@ - -#ifndef __LCD_NT35510__ -#define __LCD_NT35510__ - -#include -#include -#include -#include -#include - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define OUT_FACE OUT_P888 -#define LVDS_FORMAT LVDS_8BIT_1 -#define DCLK 26*1000*1000 //***27 -#define LCDC_ACLK 300000000 //29 lcdc axi DMA Ƶ�� //rk29 - -/* Timing */ -#define H_PW 4 //8Ç°ÏûÓ° -#define H_BP 8//6 -#define H_VD 480//320 //***800 -#define H_FP 8//60 - -#define V_PW 4//12 -#define V_BP 8// 4 -#define V_VD 800//480 //***480 -#define V_FP 8//40 - -#define LCD_WIDTH 57 //lcd size *mm -#define LCD_HEIGHT 94 - -/* Other */ -#define DCLK_POL 1//0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -static struct rk29lcd_info *gLcd_info = NULL; - -int rk_lcd_init(void); -int rk_lcd_standby(u8 enable); - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin - -#define CS_OUT() gpio_direction_output(CS_PORT, 1) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 1) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - - -#define DRVDelayUs(i) udelay(i*4) -#if 0 -void spi_screenreg_cmd(u8 Addr) -{ - u32 i; - u32 control_bit; - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_CLR(); - DRVDelayUs(30); - - CS_CLR(); - control_bit = 0x0000; - Addr = (control_bit | Addr);//spi_screenreg_set(0x36, 0x0000, 0xffff); - //printk("addr is 0x%x \n", Addr); - for(i = 0; i < 9; i++) //reg - { - if(Addr &(1<<(8-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_SET(); - DRVDelayUs(2); - CLK_CLR(); - DRVDelayUs(2); - } - - CS_SET(); - TXD_SET(); - CLK_CLR(); - DRVDelayUs(10); -} - - -void spi_screenreg_param(u8 Param) -{ - - u32 i; - u32 control_bit; - - CS_CLR(); - - control_bit = 0x0100; - Param = (control_bit | Param); - //printk("data0 is 0x%x \n", Data); - for(i = 0; i < 9; i++) //data - { - if(Param &(1<<(8-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_SET(); - DRVDelayUs(2); - CLK_CLR(); - DRVDelayUs(2); - } - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(10); -} -#endif - - - -void WriteCommand( int Command) -{ - unsigned char i,count1, count2,count3,count4; - count1= Command>>8; - count2= Command; - count3=0x20;//00100000 //дÃüÁî¸ßλ - count4=0x00;//00000000 //дÃüÁîµÍλ======¾ßÌåÇë¿´ICµÄDatasheet - CS_CLR(); - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count3 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count3<<=1; - } - - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count1 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count1<<=1; - } - - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count4 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count4<<=1; - } - - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count2 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count2<<=1; - } - - CS_SET(); - -} - - - -void WriteParameter(char DH) -{ - unsigned char i, count1, count2,count3,count4; - count1=DH>>8; - count2=DH; - count3=0x60;//дÊý¾Ý¸ßλ - count4=0x40;//дÊý¾ÝµÍλ - - CS_CLR(); - /* - TXD_CLR(); CLK_CLR(); CLK_SET(); //WRITE - TXD_SET(); CLK_CLR(); CLK_SET(); //DATA - TXD_SET(); CLK_CLR(); CLK_SET(); //HIGH BYTE - TXD_CLR(); CLK_CLR(); CLK_SET(); - TXD_CLR(); CLK_CLR(); CLK_SET(); - TXD_CLR(); CLK_CLR(); CLK_SET(); - TXD_CLR(); CLK_CLR(); CLK_SET(); - TXD_CLR(); CLK_CLR(); CLK_SET(); - */ - /* - //ÒòΪÊý¾ÝµÄ¸ßλ»ù±¾ÊDz»Óõģ¬¿ÉÒÔ²»´«¸ßλ£¬Ö±½Ó´«µÍλ - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count3 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count3<<=1; - } - - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count1 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count1<<=1; - } - */ - - - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count4 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count4<<=1; - } - - for(i=0;i<8;i++) - { - CLK_CLR(); - if (count2 & 0x80) TXD_SET(); - else TXD_CLR(); - CLK_SET(); - count2<<=1; - } - - CS_SET(); - -} - - -void init_nt35510(void) -{ - WriteCommand(0X1100); - usleep_range(10*1000, 10*1000); - - WriteCommand(0X1300); - - WriteCommand(0XF000); - WriteParameter(0x55); - - WriteCommand(0XF001); - WriteParameter(0xAA); - - WriteCommand(0XF002); - WriteParameter(0x52); - - WriteCommand(0XF003); - WriteParameter(0x08); - - WriteCommand(0XF004); - WriteParameter(0x01); - - //Gamma setting Red - WriteCommand(0XD100); - WriteParameter(0x00); - - WriteCommand(0XD101); - WriteParameter(0x20); - - WriteCommand(0XD102); - WriteParameter(0x00); - - WriteCommand(0XD103); - WriteParameter(0x2B); - - WriteCommand(0XD104); - WriteParameter(0x00); - - WriteCommand(0XD105); - WriteParameter(0x3C); - - WriteCommand(0XD106); - WriteParameter(0x00); - - WriteCommand(0XD107); - WriteParameter(0x56); - - WriteCommand(0XD108); - WriteParameter(0x00); - - WriteCommand(0XD109); - WriteParameter(0x68); - - WriteCommand(0XD10a); - WriteParameter(0x00); - - WriteCommand(0XD10b); - WriteParameter(0x87); - - WriteCommand(0XD10c); - WriteParameter(0x00); - - WriteCommand(0XD10d); - WriteParameter(0x9E); - - WriteCommand(0XD10e); - WriteParameter(0x00); - - WriteCommand(0XD10f); - WriteParameter(0xC6); - - WriteCommand(0XD110); - WriteParameter(0x00); - - WriteCommand(0XD111); - WriteParameter(0xE4); - - WriteCommand(0XD112); - WriteParameter(0x01); - - WriteCommand(0XD113); - WriteParameter(0x12); - - WriteCommand(0XD114); - WriteParameter(0x01); - - WriteCommand(0XD115); - WriteParameter(0x37); - - WriteCommand(0XD116); - WriteParameter(0x01); - - WriteCommand(0XD117); - WriteParameter(0x75); - - WriteCommand(0XD118); - WriteParameter(0x01); - - WriteCommand(0XD119); - WriteParameter(0xA5); - - WriteCommand(0XD11a); - WriteParameter(0x01); - - WriteCommand(0XD11b); - WriteParameter(0xA6); - - WriteCommand(0XD11c); - WriteParameter(0x01); - - WriteCommand(0XD11d); - WriteParameter(0xD0); - - WriteCommand(0XD11e); - WriteParameter(0x01); - - WriteCommand(0XD11f); - WriteParameter(0xF5); - - WriteCommand(0XD120); - WriteParameter(0x02); - - WriteCommand(0XD121); - WriteParameter(0x0A); - - WriteCommand(0XD122); - WriteParameter(0x02); - - WriteCommand(0XD123); - WriteParameter(0x26); - - WriteCommand(0XD124); - WriteParameter(0x02); - - WriteCommand(0XD125); - WriteParameter(0x3B); - - WriteCommand(0XD126); - WriteParameter(0x02); - - WriteCommand(0XD127); - WriteParameter(0x6B); - - WriteCommand(0XD128); - WriteParameter(0x02); - - WriteCommand(0XD129); - WriteParameter(0x99); - - WriteCommand(0XD12a); - WriteParameter(0x02); - - WriteCommand(0XD12b); - WriteParameter(0xDD); - - WriteCommand(0XD12C); - WriteParameter(0x03); - - WriteCommand(0XD12D); - WriteParameter(0x10); - - WriteCommand(0XD12E); - WriteParameter(0x03); - - WriteCommand(0XD12F); - WriteParameter(0x26); - - WriteCommand(0XD130); - WriteParameter(0x03); - - WriteCommand(0XD131); - WriteParameter(0x32); - - WriteCommand(0XD132); - WriteParameter(0x03); - - WriteCommand(0XD133); - WriteParameter(0x9A); - - //Gamma setting Green - WriteCommand(0XD200); - WriteParameter(0x00); - - WriteCommand(0XD201); - WriteParameter(0xa0); - - WriteCommand(0XD202); - WriteParameter(0x00); - - WriteCommand(0XD203); - WriteParameter(0xa9); - - WriteCommand(0XD204); - WriteParameter(0x00); - - WriteCommand(0XD205); - WriteParameter(0xb5); - - WriteCommand(0XD206); - WriteParameter(0x00); - - WriteCommand(0XD207); - WriteParameter(0xbf); - - WriteCommand(0XD208); - WriteParameter(0x00); - - WriteCommand(0XD209); - WriteParameter(0xc9); - - WriteCommand(0XD20a); - WriteParameter(0x00); - - WriteCommand(0XD20b); - WriteParameter(0xdc); - - WriteCommand(0XD20c); - WriteParameter(0x00); - - WriteCommand(0XD20d); - WriteParameter(0xEE); - - WriteCommand(0XD20e); - WriteParameter(0x01); - - WriteCommand(0XD20f); - WriteParameter(0x0A); - - WriteCommand(0XD210); - WriteParameter(0x01); - - WriteCommand(0XD211); - WriteParameter(0x21); - - WriteCommand(0XD212); - WriteParameter(0x01); - - WriteCommand(0XD213); - WriteParameter(0x48); - - WriteCommand(0XD214); - WriteParameter(0x01); - - WriteCommand(0XD215); - WriteParameter(0x67); - - WriteCommand(0XD216); - WriteParameter(0x01); - - WriteCommand(0XD217); - WriteParameter(0x97); - - WriteCommand(0XD218); - WriteParameter(0x01); - - WriteCommand(0XD219); - WriteParameter(0xBE); - - WriteCommand(0XD21a); - WriteParameter(0x01); - - WriteCommand(0XD21b); - WriteParameter(0xC0); - - WriteCommand(0XD21c); - WriteParameter(0x01); - - WriteCommand(0XD21d); - WriteParameter(0xE1); - - WriteCommand(0XD21e); - WriteParameter(0x02); - - WriteCommand(0XD21f); - WriteParameter(0x04); - - WriteCommand(0XD220); - WriteParameter(0x02); - - WriteCommand(0XD221); - WriteParameter(0x17); - - WriteCommand(0XD222); - WriteParameter(0x02); - - WriteCommand(0XD223); - WriteParameter(0x36); - - WriteCommand(0XD224); - WriteParameter(0x02); - - WriteCommand(0XD225); - WriteParameter(0x50); - - WriteCommand(0XD226); - WriteParameter(0x02); - - WriteCommand(0XD227); - WriteParameter(0x7E); - - WriteCommand(0XD228); - WriteParameter(0x02); - - WriteCommand(0XD229); - WriteParameter(0xAC); - - WriteCommand(0XD22a); - WriteParameter(0x02); - - WriteCommand(0XD22b); - WriteParameter(0xF1); - - WriteCommand(0XD22C); - WriteParameter(0x03); - - WriteCommand(0XD22D); - WriteParameter(0x20); - - WriteCommand(0XD22E); - WriteParameter(0x03); - - WriteCommand(0XD22F); - WriteParameter(0x38); - - WriteCommand(0XD230); - WriteParameter(0x03); - - WriteCommand(0XD231); - WriteParameter(0x43); - - WriteCommand(0XD232); - WriteParameter(0x03); - - WriteCommand(0XD233); - WriteParameter(0x9A); - - - //Gamma setting Blue - WriteCommand(0XD300); - WriteParameter(0x00); - - WriteCommand(0XD301); - WriteParameter(0x50); - - WriteCommand(0XD302); - WriteParameter(0x00); - - WriteCommand(0XD303); - WriteParameter(0x53); - - WriteCommand(0XD304); - WriteParameter(0x00); - - WriteCommand(0XD305); - WriteParameter(0x73); - - WriteCommand(0XD306); - WriteParameter(0x00); - - WriteCommand(0XD307); - WriteParameter(0x89); - - WriteCommand(0XD308); - WriteParameter(0x00); - - WriteCommand(0XD309); - WriteParameter(0x9f); - - WriteCommand(0XD30a); - WriteParameter(0x00); - - WriteCommand(0XD30b); - WriteParameter(0xc1); - - WriteCommand(0XD30c); - WriteParameter(0x00); - - WriteCommand(0XD30d); - WriteParameter(0xda); - - WriteCommand(0XD30e); - WriteParameter(0x01); - - WriteCommand(0XD30f); - WriteParameter(0x02); - - WriteCommand(0XD310); - WriteParameter(0x01); - - WriteCommand(0XD311); - WriteParameter(0x23); - - WriteCommand(0XD312); - WriteParameter(0x01); - - WriteCommand(0XD313); - WriteParameter(0x50); - - WriteCommand(0XD314); - WriteParameter(0x01); - - WriteCommand(0XD315); - WriteParameter(0x6f); - - WriteCommand(0XD316); - WriteParameter(0x01); - - WriteCommand(0XD317); - WriteParameter(0x9f); - - WriteCommand(0XD318); - WriteParameter(0x01); - - WriteCommand(0XD319); - WriteParameter(0xc5); - - WriteCommand(0XD31a); - WriteParameter(0x01); - - WriteCommand(0XD31b); - WriteParameter(0xC6); - - WriteCommand(0XD31c); - WriteParameter(0x01); - - WriteCommand(0XD31d); - WriteParameter(0xE3); - - WriteCommand(0XD31e); - WriteParameter(0x02); - - WriteCommand(0XD31f); - WriteParameter(0x08); - - WriteCommand(0XD320); - WriteParameter(0x02); - - WriteCommand(0XD321); - WriteParameter(0x16); - - WriteCommand(0XD322); - WriteParameter(0x02); - - WriteCommand(0XD323); - WriteParameter(0x2b); - - WriteCommand(0XD324); - WriteParameter(0x02); - - WriteCommand(0XD325); - WriteParameter(0x4d); - - WriteCommand(0XD326); - WriteParameter(0x02); - - WriteCommand(0XD327); - WriteParameter(0x6f); - - WriteCommand(0XD328); - WriteParameter(0x02); - - WriteCommand(0XD329); - WriteParameter(0x8C); - - WriteCommand(0XD32a); - WriteParameter(0x02); - - WriteCommand(0XD32b); - WriteParameter(0xd6); - - WriteCommand(0XD32C); - WriteParameter(0x03); - - WriteCommand(0XD32D); - WriteParameter(0x12); - - WriteCommand(0XD32E); - WriteParameter(0x03); - - WriteCommand(0XD32F); - WriteParameter(0x28); - - WriteCommand(0XD330); - WriteParameter(0x03); - - WriteCommand(0XD331); - WriteParameter(0x3e); - - WriteCommand(0XD332); - WriteParameter(0x03); - - WriteCommand(0XD333); - WriteParameter(0x9A); - - //Gamma setting Red - WriteCommand(0XD400); - WriteParameter(0x00); - - WriteCommand(0XD401); - WriteParameter(0x20); - - WriteCommand(0XD402); - WriteParameter(0x00); - - WriteCommand(0XD403); - WriteParameter(0x2b); - - WriteCommand(0XD404); - WriteParameter(0x00); - - WriteCommand(0XD405); - WriteParameter(0x3c); - - WriteCommand(0XD406); - WriteParameter(0x00); - - WriteCommand(0XD407); - WriteParameter(0x56); - - WriteCommand(0XD408); - WriteParameter(0x00); - - WriteCommand(0XD409); - WriteParameter(0x68); - - WriteCommand(0XD40a); - WriteParameter(0x00); - - WriteCommand(0XD40b); - WriteParameter(0x87); - - WriteCommand(0XD40c); - WriteParameter(0x00); - - WriteCommand(0XD40d); - WriteParameter(0x9e); - - WriteCommand(0XD40e); - WriteParameter(0x00); - - WriteCommand(0XD40f); - WriteParameter(0xc6); - - WriteCommand(0XD410); - WriteParameter(0x00); - - WriteCommand(0XD411); - WriteParameter(0xe4); - - WriteCommand(0XD412); - WriteParameter(0x01); - - WriteCommand(0XD413); - WriteParameter(0x12); - - WriteCommand(0XD414); - WriteParameter(0x01); - - WriteCommand(0XD415); - WriteParameter(0x37); - - WriteCommand(0XD416); - WriteParameter(0x01); - - WriteCommand(0XD417); - WriteParameter(0x75); - - WriteCommand(0XD418); - WriteParameter(0x01); - - WriteCommand(0XD419); - WriteParameter(0xa5); - - WriteCommand(0XD41a); - WriteParameter(0x01); - - WriteCommand(0XD41b); - WriteParameter(0xa6); - - WriteCommand(0XD41c); - WriteParameter(0x01); - - WriteCommand(0XD41d); - WriteParameter(0xd0); - - WriteCommand(0XD41e); - WriteParameter(0x01); - - WriteCommand(0XD41f); - WriteParameter(0xf5); - - WriteCommand(0XD420); - WriteParameter(0x02); - - WriteCommand(0XD421); - WriteParameter(0x0a); - - WriteCommand(0XD422); - WriteParameter(0x02); - - WriteCommand(0XD423); - WriteParameter(0x26); - - WriteCommand(0XD424); - WriteParameter(0x02); - - WriteCommand(0XD425); - WriteParameter(0x3b); - - WriteCommand(0XD426); - WriteParameter(0x02); - - WriteCommand(0XD427); - WriteParameter(0x6b); - - WriteCommand(0XD428); - WriteParameter(0x02); - - WriteCommand(0XD429); - WriteParameter(0x99); - - WriteCommand(0XD42a); - WriteParameter(0x02); - - WriteCommand(0XD42b); - WriteParameter(0xdd); - - WriteCommand(0XD42C); - WriteParameter(0x03); - - WriteCommand(0XD42D); - WriteParameter(0x10); - - WriteCommand(0XD42E); - WriteParameter(0x03); - - WriteCommand(0XD42F); - WriteParameter(0x26); - - WriteCommand(0XD430); - WriteParameter(0x03); - - WriteCommand(0XD431); - WriteParameter(0x32); - - WriteCommand(0XD432); - WriteParameter(0x03); - - WriteCommand(0XD433); - WriteParameter(0x9A); - - //Gamma setting Green - WriteCommand(0XD500); - WriteParameter(0x00); - - WriteCommand(0XD501); - WriteParameter(0xa0); - - WriteCommand(0XD502); - WriteParameter(0x00); - - WriteCommand(0XD503); - WriteParameter(0xa9); - - WriteCommand(0XD504); - WriteParameter(0x00); - - WriteCommand(0XD505); - WriteParameter(0xb5); - - WriteCommand(0XD506); - WriteParameter(0x00); - - WriteCommand(0XD507); - WriteParameter(0xbf); - - WriteCommand(0XD508); - WriteParameter(0x00); - - WriteCommand(0XD509); - WriteParameter(0xc9); - - WriteCommand(0XD50a); - WriteParameter(0x00); - - WriteCommand(0XD50b); - WriteParameter(0xdc); - - WriteCommand(0XD50c); - WriteParameter(0x00); - - WriteCommand(0XD50d); - WriteParameter(0xee); - - WriteCommand(0XD50e); - WriteParameter(0x01); - - WriteCommand(0XD50f); - WriteParameter(0x0a); - - WriteCommand(0XD510); - WriteParameter(0x01); - - WriteCommand(0XD511); - WriteParameter(0x21); - - WriteCommand(0XD512); - WriteParameter(0x01); - - WriteCommand(0XD513); - WriteParameter(0x48); - - WriteCommand(0XD514); - WriteParameter(0x01); - - WriteCommand(0XD515); - WriteParameter(0x67); - - WriteCommand(0XD516); - WriteParameter(0x01); - - WriteCommand(0XD517); - WriteParameter(0x97); - - WriteCommand(0XD518); - WriteParameter(0x01); - - WriteCommand(0XD519); - WriteParameter(0xbe); - - WriteCommand(0XD51a); - WriteParameter(0x01); - - WriteCommand(0XD51b); - WriteParameter(0xc0); - - WriteCommand(0XD51c); - WriteParameter(0x01); - - WriteCommand(0XD51d); - WriteParameter(0xe1); - - WriteCommand(0XD51e); - WriteParameter(0x02); - - WriteCommand(0XD51f); - WriteParameter(0x04); - - WriteCommand(0XD520); - WriteParameter(0x02); - - WriteCommand(0XD521); - WriteParameter(0x17); - - WriteCommand(0XD522); - WriteParameter(0x02); - - WriteCommand(0XD523); - WriteParameter(0x36); - - WriteCommand(0XD524); - WriteParameter(0x02); - - WriteCommand(0XD525); - WriteParameter(0x50); - - WriteCommand(0XD526); - WriteParameter(0x02); - - WriteCommand(0XD527); - WriteParameter(0x7e); - - WriteCommand(0XD528); - WriteParameter(0x02); - - WriteCommand(0XD529); - WriteParameter(0xac); - - WriteCommand(0XD52a); - WriteParameter(0x02); - - WriteCommand(0XD52b); - WriteParameter(0xf1); - - WriteCommand(0XD52C); - WriteParameter(0x03); - - WriteCommand(0XD52D); - WriteParameter(0x20); - - WriteCommand(0XD52E); - WriteParameter(0x03); - - WriteCommand(0XD52F); - WriteParameter(0x38); - - WriteCommand(0XD530); - WriteParameter(0x03); - - WriteCommand(0XD531); - WriteParameter(0x43); - - WriteCommand(0XD532); - WriteParameter(0x03); - - WriteCommand(0XD533); - WriteParameter(0x9A); - - //Gamma setting Blue - WriteCommand(0XD600); - WriteParameter(0x00); - - WriteCommand(0XD601); - WriteParameter(0x50); - - WriteCommand(0XD602); - WriteParameter(0x00); - - WriteCommand(0XD603); - WriteParameter(0x53); - - WriteCommand(0XD604); - WriteParameter(0x00); - - WriteCommand(0XD605); - WriteParameter(0x73); - - WriteCommand(0XD606); - WriteParameter(0x00); - - WriteCommand(0XD607); - WriteParameter(0x89); - - WriteCommand(0XD608); - WriteParameter(0x00); - - WriteCommand(0XD609); - WriteParameter(0x9f); - - WriteCommand(0XD60a); - WriteParameter(0x00); - - WriteCommand(0XD60b); - WriteParameter(0xc1); - - WriteCommand(0XD60c); - WriteParameter(0x00); - - WriteCommand(0XD60d); - WriteParameter(0xda); - - WriteCommand(0XD60e); - WriteParameter(0x01); - - WriteCommand(0XD60f); - WriteParameter(0x02); - - WriteCommand(0XD610); - WriteParameter(0x01); - - WriteCommand(0XD611); - WriteParameter(0x23); - - WriteCommand(0XD612); - WriteParameter(0x01); - - WriteCommand(0XD613); - WriteParameter(0x50); - - WriteCommand(0XD614); - WriteParameter(0x01); - - WriteCommand(0XD615); - WriteParameter(0x6f); - - WriteCommand(0XD616); - WriteParameter(0x01); - - WriteCommand(0XD617); - WriteParameter(0x9f); - - WriteCommand(0XD618); - WriteParameter(0x01); - - WriteCommand(0XD619); - WriteParameter(0xc5); - - WriteCommand(0XD61a); - WriteParameter(0x01); - - WriteCommand(0XD61b); - WriteParameter(0xc6); - - WriteCommand(0XD61c); - WriteParameter(0x01); - - WriteCommand(0XD61d); - WriteParameter(0xe3); - - WriteCommand(0XD61e); - WriteParameter(0x02); - - WriteCommand(0XD61f); - WriteParameter(0x08); - - WriteCommand(0XD620); - WriteParameter(0x02); - - WriteCommand(0XD621); - WriteParameter(0x16); - - WriteCommand(0XD622); - WriteParameter(0x02); - - WriteCommand(0XD623); - WriteParameter(0x2b); - - WriteCommand(0XD624); - WriteParameter(0x02); - - WriteCommand(0XD625); - WriteParameter(0x4d); - - WriteCommand(0XD626); - WriteParameter(0x02); - - WriteCommand(0XD627); - WriteParameter(0x6f); - - WriteCommand(0XD628); - WriteParameter(0x02); - - WriteCommand(0XD629); - WriteParameter(0x8c); - - WriteCommand(0XD62a); - WriteParameter(0x02); - - WriteCommand(0XD62b); - WriteParameter(0xd6); - - WriteCommand(0XD62C); - WriteParameter(0x03); - - WriteCommand(0XD62D); - WriteParameter(0x12); - - WriteCommand(0XD62E); - WriteParameter(0x03); - - WriteCommand(0XD62F); - WriteParameter(0x28); - - WriteCommand(0XD630); - WriteParameter(0x03); - - WriteCommand(0XD631); - WriteParameter(0x3e); - - WriteCommand(0XD632); - WriteParameter(0x03); - - WriteCommand(0XD633); - WriteParameter(0x9A); - - WriteCommand(0XBA00); - WriteParameter(0x14); - - WriteCommand(0XBA01); - WriteParameter(0x14); - - WriteCommand(0XBA02); - WriteParameter(0x14); - - WriteCommand(0XBF00); - WriteParameter(0x01); - - WriteCommand(0XB300); - WriteParameter(0x07); - - WriteCommand(0XB301); - WriteParameter(0x07); - - WriteCommand(0XB302); - WriteParameter(0x07); - - WriteCommand(0XB900); - WriteParameter(0x25); - - WriteCommand(0XB901); - WriteParameter(0x25); - - WriteCommand(0XB902); - WriteParameter(0x25); - - - - WriteCommand(0XBC01); - WriteParameter(0xA0); - - WriteCommand(0XBC02); - WriteParameter(0x00); - - WriteCommand(0XBD01); - WriteParameter(0xA0); - - WriteCommand(0XBD02); - WriteParameter(0x00); - - - WriteCommand(0XF000); - WriteParameter(0x55); - - WriteCommand(0XF001); - WriteParameter(0xAA); - - WriteCommand(0XF002); - WriteParameter(0x52); - - WriteCommand(0XF003); - WriteParameter(0x08); - - WriteCommand(0XF004); - WriteParameter(0x00); - - WriteCommand(0XB100); - WriteParameter(0xCC); - - WriteCommand(0XBC00); - WriteParameter(0x05); - - WriteCommand(0XBC01); - WriteParameter(0x05); - - WriteCommand(0XBC02); - WriteParameter(0x05); - - - WriteCommand(0XBD02); - WriteParameter(0x07); - WriteCommand(0XBD03); - WriteParameter(0x31); - - WriteCommand(0XBE02); - WriteParameter(0x07); - WriteCommand(0XBE03); - WriteParameter(0x31); - - WriteCommand(0XBF02); - WriteParameter(0x07); - WriteCommand(0XBF03); - WriteParameter(0x31); -/* - WriteCommand(0XFF00); - WriteParameter(0xAA); - WriteCommand(0XFF01); - WriteParameter(0x55); - WriteCommand(0XFF02); - WriteParameter(0x25); - WriteCommand(0XFF03); - WriteParameter(0x01); -*/ -/*****************************************************************/ - WriteCommand(0XF000);WriteParameter(0x55);//ENABLE High Mode - WriteCommand(0XF001);WriteParameter(0xAA); - WriteCommand(0XF002);WriteParameter(0x52); - WriteCommand(0XF003);WriteParameter(0x08); - WriteCommand(0XF004);WriteParameter(0x00); - - WriteCommand(0XB400);WriteParameter(0x10); - - WriteCommand(0XFF00);WriteParameter(0xAA);//ENABLE LV3 - WriteCommand(0XFF01);WriteParameter(0x55); - WriteCommand(0XFF02);WriteParameter(0x25); - WriteCommand(0XFF03);WriteParameter(0x01); - - WriteCommand(0XF900);WriteParameter(0x14);//ÖеÈÔöÑÞÏÔʾЧ¹û - WriteCommand(0XF901);WriteParameter(0x00); - WriteCommand(0XF902);WriteParameter(0x0A); - WriteCommand(0XF903);WriteParameter(0x11); - WriteCommand(0XF904);WriteParameter(0x17); - WriteCommand(0XF905);WriteParameter(0x1D); - WriteCommand(0XF906);WriteParameter(0x24); - WriteCommand(0XF907);WriteParameter(0x2A); - WriteCommand(0XF908);WriteParameter(0x31); - WriteCommand(0XF909);WriteParameter(0x37); - WriteCommand(0XF90A);WriteParameter(0x3D); -/* - WriteCommand(0XF900);WriteParameter(0x14);//¸ßµÈÔöÑÞÏÔʾЧ¹û - WriteCommand(0XF901);WriteParameter(0x00); - WriteCommand(0XF902);WriteParameter(0x0D); - WriteCommand(0XF903);WriteParameter(0x1A); - WriteCommand(0XF904);WriteParameter(0x26); - WriteCommand(0XF905);WriteParameter(0x33); - WriteCommand(0XF906);WriteParameter(0x40); - WriteCommand(0XF907);WriteParameter(0x4D); - WriteCommand(0XF908);WriteParameter(0x5A); - WriteCommand(0XF909);WriteParameter(0x66); - WriteCommand(0XF90A);WriteParameter(0x73); -*/ -/******************************************************************/ - WriteCommand(0X3500); - WriteParameter(0x00); - - WriteCommand(0X3a00); - -if(OUT_FACE == OUT_P888) - WriteParameter(0x70); //24bit -else if(OUT_FACE == OUT_P666) - WriteParameter(0x60);//18bit - - WriteCommand(0X3600); - WriteParameter(0x00);//R<->B - - WriteCommand(0X2000); // - - WriteCommand(0X1100); - usleep_range(120*1000, 120*1000); - - WriteCommand(0X2900); - - usleep_range(100*1000, 100*1000); - WriteCommand(0X2C00); -} - - -void resume_nt35510(void) -{ - WriteCommand(0X1100); - msleep(120); - - WriteCommand(0X1300); - - WriteCommand(0XF000); - WriteParameter(0x55); - - WriteCommand(0XF001); - WriteParameter(0xAA); - - WriteCommand(0XF002); - WriteParameter(0x52); - - WriteCommand(0XF003); - WriteParameter(0x08); - - WriteCommand(0XF004); - WriteParameter(0x01); - - - /**************/ - WriteCommand(0XBA00); - WriteParameter(0x14); - - WriteCommand(0XBA01); - WriteParameter(0x14); - - WriteCommand(0XBA02); - WriteParameter(0x14); - - WriteCommand(0XBF00); - WriteParameter(0x01); - - WriteCommand(0XB300); - WriteParameter(0x07); - - WriteCommand(0XB301); - WriteParameter(0x07); - - WriteCommand(0XB302); - WriteParameter(0x07); - - WriteCommand(0XB900); - WriteParameter(0x25); - - WriteCommand(0XB901); - WriteParameter(0x25); - - WriteCommand(0XB902); - WriteParameter(0x25); - - - - WriteCommand(0XBC01); - WriteParameter(0xA0); - - WriteCommand(0XBC02); - WriteParameter(0x00); - - WriteCommand(0XBD01); - WriteParameter(0xA0); - - WriteCommand(0XBD02); - WriteParameter(0x00); - - - WriteCommand(0XF000); - WriteParameter(0x55); - - WriteCommand(0XF001); - WriteParameter(0xAA); - - WriteCommand(0XF002); - WriteParameter(0x52); - - WriteCommand(0XF003); - WriteParameter(0x08); - - WriteCommand(0XF004); - WriteParameter(0x00); - - WriteCommand(0XB100); - WriteParameter(0xCC); - - WriteCommand(0XBC00); - WriteParameter(0x05); - - WriteCommand(0XBC01); - WriteParameter(0x05); - - WriteCommand(0XBC02); - WriteParameter(0x05); - - - WriteCommand(0XBD02); - WriteParameter(0x07); - WriteCommand(0XBD03); - WriteParameter(0x31); - - WriteCommand(0XBE02); - WriteParameter(0x07); - WriteCommand(0XBE03); - WriteParameter(0x31); - - WriteCommand(0XBF02); - WriteParameter(0x07); - WriteCommand(0XBF03); - WriteParameter(0x31); - - WriteCommand(0XFF00); - WriteParameter(0xAA); - WriteCommand(0XFF01); - WriteParameter(0x55); - WriteCommand(0XFF02); - WriteParameter(0x25); - WriteCommand(0XFF03); - WriteParameter(0x01); - - - WriteCommand(0X3500); - WriteParameter(0x00); - - WriteCommand(0X3a00); - -if(OUT_FACE == OUT_P888) - WriteParameter(0x70); //24bit -else if(OUT_FACE == OUT_P666) - WriteParameter(0x60);//18bit - - WriteCommand(0X3600); - WriteParameter(0x00);//R<->B - - WriteCommand(0X2000); // - - WriteCommand(0X1100); - msleep(120); - - WriteCommand(0X2900); - - msleep(100); - WriteCommand(0X2C00); -} - -static DEFINE_MUTEX(lcd_mutex); -extern void rk29_lcd_spim_spin_lock(void); -extern void rk29_lcd_spim_spin_unlock(void); - -static void lcd_resume(struct work_struct *work) -{ - mutex_lock(&lcd_mutex); - rk29_lcd_spim_spin_lock(); - if(gLcd_info) - gLcd_info->io_init(); - init_nt35510(); - //resume_nt35510();//may be fail to wake up LCD some time,so change to init lcd again - printk(KERN_DEBUG "%s\n",__FUNCTION__); - - if(gLcd_info) - gLcd_info->io_deinit(); - - rk29_lcd_spim_spin_unlock(); - mutex_unlock(&lcd_mutex); -} - -static DECLARE_WORK(lcd_resume_work, lcd_resume); -static struct workqueue_struct *lcd_resume_wq; - -static void lcd_late_resume(struct early_suspend *h) -{ - queue_work(lcd_resume_wq, &lcd_resume_work); -} - -static struct early_suspend lcd_early_suspend_desc = { - .level = EARLY_SUSPEND_LEVEL_DISABLE_FB + 1, // before fb resume - .resume = lcd_late_resume, -}; - -int rk_lcd_init(void) -{ - volatile u32 data; - printk("lcd init...\n"); - if(gLcd_info) - gLcd_info->io_init(); - init_nt35510(); - - if(gLcd_info) - gLcd_info->io_deinit(); - - lcd_resume_wq = create_singlethread_workqueue("lcd"); - register_early_suspend(&lcd_early_suspend_desc); - return 0; -} - -int rk_lcd_standby(u8 enable) //***enable =1 means suspend, 0 means resume -{ - if (enable) { - mutex_lock(&lcd_mutex); - rk29_lcd_spim_spin_lock(); - if(gLcd_info) - gLcd_info->io_init(); - - WriteCommand(0X2800); - WriteCommand(0X1100); - msleep(5); - WriteCommand(0X4f00); - WriteParameter(0x01); - if(gLcd_info) - gLcd_info->io_deinit(); - - rk29_lcd_spim_spin_unlock(); - mutex_unlock(&lcd_mutex); - } else { - flush_workqueue(lcd_resume_wq); - } - return 0; -} - -#endif diff --git a/drivers/video/rockchip/screen/lcd_nt35580.c b/drivers/video/rockchip/screen/lcd_nt35580.c deleted file mode 100755 index fb9874af7fbb..000000000000 --- a/drivers/video/rockchip/screen/lcd_nt35580.c +++ /dev/null @@ -1,437 +0,0 @@ - -#ifndef __LCD_NT35580_H__ -#define __LCD_NT35580_H__ -#include -#include -#include -#include - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 24000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 480 -#define H_FP 2 - -#define V_PW 1 -#define V_BP 4 -#define V_VD 800 -#define V_FP 2 - -#define LCD_WIDTH 480 //need modify -#define LCD_HEIGHT 800 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin - -#define CS_OUT() gpio_direction_output(CS_PORT, 0) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 0) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) -#define TXD_IN() gpio_direction_input(TXD_PORT) -#define TXD_GET() gpio_get_value(TXD_PORT) - - -#define delay_us(i) udelay(i) -static struct rk29lcd_info *gLcd_info = NULL; - -u32 spi_screenreg_get(u32 Addr) -{ - u32 i; - u8 addr_h = (Addr>>8) & 0x000000ff; - u8 addr_l = Addr & 0x000000ff; - u8 cmd1 = 0x20; //0010 0000 - u8 cmd2 = 0x00; //0000 0000 - u8 cmd3 = 0x00; //0000 0000 - - u8 data_l = 0; - u8 tmp; - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - delay_us(8); - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - delay_us(4); - - // first transmit - CS_CLR(); - delay_us(4); - for(i = 0; i < 8; i++) - { - if(cmd1 &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - for(i = 0; i < 8; i++) - { - if(addr_h &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - CLK_CLR(); - TXD_CLR(); - delay_us(4); - CS_SET(); - delay_us(8); - - // second transmit - CS_CLR(); - delay_us(4); - for(i = 0; i < 8; i++) - { - if(cmd2 &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - for(i = 0; i < 8; i++) - { - if(addr_l &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - CLK_CLR(); - TXD_CLR(); - delay_us(4); - CS_SET(); - delay_us(8); - - // third transmit - CS_CLR(); - delay_us(4); - for(i = 0; i < 8; i++) - { - if(cmd3 &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - TXD_CLR(); - TXD_IN(); - for(i = 0; i < 8; i++) - { - CLK_CLR(); - delay_us(4); - CLK_SET(); - - tmp = TXD_GET(); - data_l += (tmp<<(7-i)); - - delay_us(4); - } - CLK_CLR(); - TXD_CLR(); - delay_us(4); - CS_SET(); - delay_us(8); - - return data_l; -} - - -void spi_screenreg_set(u32 Addr, u32 Data) -{ - u32 i; - u8 addr_h = (Addr>>8) & 0x000000ff; - u8 addr_l = Addr & 0x000000ff; - u8 data_l = Data & 0x000000ff; - u8 cmd1 = 0x20; //0010 0000 - u8 cmd2 = 0x00; //0000 0000 - u8 cmd3 = 0x40; //0100 0000 - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - delay_us(8); - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - delay_us(4); - - // first transmit - CS_CLR(); - delay_us(4); - for(i = 0; i < 8; i++) - { - if(cmd1 &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - for(i = 0; i < 8; i++) - { - if(addr_h &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - CLK_CLR(); - TXD_CLR(); - delay_us(4); - CS_SET(); - delay_us(8); - - // second transmit - CS_CLR(); - delay_us(4); - for(i = 0; i < 8; i++) - { - if(cmd2 &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - for(i = 0; i < 8; i++) - { - if(addr_l &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - CLK_CLR(); - TXD_CLR(); - delay_us(4); - CS_SET(); - delay_us(8); - - // third transmit - CS_CLR(); - delay_us(4); - for(i = 0; i < 8; i++) - { - if(cmd3 &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - for(i = 0; i < 8; i++) - { - if(data_l &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - CLK_CLR(); - delay_us(4); - CLK_SET(); - delay_us(4); - } - CLK_CLR(); - TXD_CLR(); - delay_us(4); - CS_SET(); - delay_us(8); - - //printk("Addr=0x%04x, WData=0x%02x, RData=0x%02x \n", Addr, Data, spi_screenreg_get(Addr)); - -} - - - - - -int rk_lcd_init(void) -{ - -#if 0 - GPIO_SetPinDirection(reset_pin, GPIO_OUT); - GPIO_SetPinLevel(reset_pin,GPIO_HIGH); - DelayMs_nops(100); - GPIO_SetPinLevel(reset_pin,GPIO_LOW); - DelayMs_nops(100); - GPIO_SetPinLevel(reset_pin,GPIO_HIGH); -#endif - - if(gLcd_info) - gLcd_info->io_init(); - - spi_screenreg_set(0x2E80, 0x0001); - spi_screenreg_set(0x0680, 0x002D); - spi_screenreg_set(0xD380, 0x0004); - spi_screenreg_set(0xD480, 0x0060); - spi_screenreg_set(0xD580, 0x0007); - spi_screenreg_set(0xD680, 0x005A); - spi_screenreg_set(0xD080, 0x000F); - spi_screenreg_set(0xD180, 0x0016); - spi_screenreg_set(0xD280, 0x0004); - spi_screenreg_set(0xDC80, 0x0004); - spi_screenreg_set(0xD780, 0x0001); - - spi_screenreg_set(0x2280, 0x000F); - spi_screenreg_set(0x2480, 0x0068); - spi_screenreg_set(0x2580, 0x0000); - spi_screenreg_set(0x2780, 0x00AF); - - spi_screenreg_set(0x3A00, 0x0060); - spi_screenreg_set(0x3B00, 0x0003); - spi_screenreg_set(0x3B02, 0x0005); - spi_screenreg_set(0x3B03, 0x0002); - spi_screenreg_set(0x3B04, 0x0002); - spi_screenreg_set(0x3B05, 0x0002); - - spi_screenreg_set(0x0180, 0x0000); - spi_screenreg_set(0x4080, 0x0051); - spi_screenreg_set(0x4180, 0x0055); - spi_screenreg_set(0x4280, 0x0058); - spi_screenreg_set(0x4380, 0x0064); - spi_screenreg_set(0x4480, 0x001A); - spi_screenreg_set(0x4580, 0x002E); - spi_screenreg_set(0x4680, 0x005F); - spi_screenreg_set(0x4780, 0x0021); - spi_screenreg_set(0x4880, 0x001C); - spi_screenreg_set(0x4980, 0x0022); - spi_screenreg_set(0x4A80, 0x005D); - spi_screenreg_set(0x4B80, 0x0019); - spi_screenreg_set(0x4C80, 0x0046); - spi_screenreg_set(0x4D80, 0x0062); - spi_screenreg_set(0x4E80, 0x0048); - spi_screenreg_set(0x4F80, 0x005B); - - spi_screenreg_set(0x5080, 0x002F); - spi_screenreg_set(0x5180, 0x005E); - spi_screenreg_set(0x5880, 0x002E); - spi_screenreg_set(0x5980, 0x003B); - spi_screenreg_set(0x5A80, 0x008D); - spi_screenreg_set(0x5B80, 0x00A7); - spi_screenreg_set(0x5C80, 0x0027); - spi_screenreg_set(0x5D80, 0x0039); - spi_screenreg_set(0x5E80, 0x0065); - spi_screenreg_set(0x5F80, 0x0055); - - spi_screenreg_set(0x6080, 0x001A); - spi_screenreg_set(0x6180, 0x0021); - spi_screenreg_set(0x6280, 0x008F); - spi_screenreg_set(0x6380, 0x0022); - spi_screenreg_set(0x6480, 0x0053); - spi_screenreg_set(0x6580, 0x0066); - spi_screenreg_set(0x6680, 0x008A); - spi_screenreg_set(0x6780, 0x0097); - spi_screenreg_set(0x6880, 0x001F); - spi_screenreg_set(0x6980, 0x0026); - - spi_screenreg_set(0x1100, 0x0000); - msleep(150); - spi_screenreg_set(0x2900, 0x0000); - -#if 0 - printk("spi_screenreg_set(0x5555, 0x0055)... \n"); - while(1) { - spi_screenreg_set(0x5555, 0x0055); - msleep(1); - } -#endif - -#if 0 - while(1) { - int i = 0; - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0xffffffff); - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0x00000000); - msleep(1000); - printk(">>>>> MCU_WRDATA ...\n"); - - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0x00000000); - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0xffffffff); - msleep(1000); - printk(">>>>> MCU_WRDATA ...\n"); - } -#endif - - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} - - -int rk_lcd_standby(u8 enable) -{ - return 0; -} - - -#endif diff --git a/drivers/video/rockchip/screen/lcd_nt35582.c b/drivers/video/rockchip/screen/lcd_nt35582.c deleted file mode 100644 index 8835a2187a65..000000000000 --- a/drivers/video/rockchip/screen/lcd_nt35582.c +++ /dev/null @@ -1,436 +0,0 @@ -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include "screen.h" - -/* Base */ -#define OUT_TYPE SCREEN_MCU -#define OUT_FACE OUT_P888 - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 480 -#define H_FP 5 - -#define V_PW 1 -#define V_BP 1 -#define V_VD 800 -#define V_FP 1 - -#define LCD_WIDTH 480 //need modify -#define LCD_HEIGHT 800 - -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -#define P_WR 27 -#define USE_FMARK 0 //2 //ÊÇ·ñʹÓÃFMK (0:²»Ö§³Ö 1:ºáÆÁÖ§³Ö 2:ºáÊúÆÁ¶¼Ö§³Ö) -#define FRMRATE 60 //MCUÆÁµÄË¢ÐÂÂÊ (FMKÓÐЧʱÓÃ) - - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - -void Set_LCD_8B_REG(unsigned char regh,unsigned char regl, u32 data) -{ - u32 cmd; - cmd = (regh<<8) + regl; - if(-1==data) { - mcu_ioctl(MCU_WRCMD,cmd); - } else { - mcu_ioctl(MCU_WRCMD,cmd); - mcu_ioctl(MCU_WRDATA,data); - } -} - -int lcd_init(void) -{ - int i = 0; - -#if 0 - GPIO_SetPinDirection(reset_pin, GPIO_OUT); - GPIO_SetPinLevel(reset_pin,GPIO_HIGH); - DelayMs_nops(100); - GPIO_SetPinLevel(reset_pin,GPIO_LOW); - DelayMs_nops(100); - GPIO_SetPinLevel(reset_pin,GPIO_HIGH); -#endif - - mcu_ioctl(MCU_SETBYPASS, 1); - - - - Set_LCD_8B_REG(0xC0,0X00,0x86); - - Set_LCD_8B_REG(0xC0,0X01,0x00); - Set_LCD_8B_REG(0xC0,0X02,0x86); - Set_LCD_8B_REG(0xC0,0X03,0x00); - - Set_LCD_8B_REG(0xC1,0X00,0x60); //0x004f - Set_LCD_8B_REG(0xC2,0X00,0x21); - Set_LCD_8B_REG(0xC2,0X02,0x70); //0x0202 - - Set_LCD_8B_REG(0xB6,0x00,0x10); //0x0030 - Set_LCD_8B_REG(0xB6,0x02,0x30); - - Set_LCD_8B_REG(0xC7,0X00,0x6F); - - Set_LCD_8B_REG(0xE0,0X00,0X0E); - Set_LCD_8B_REG(0xE0,0X01,0X14); - Set_LCD_8B_REG(0xE0,0X02,0X29); - Set_LCD_8B_REG(0xE0,0X03,0X3A); - Set_LCD_8B_REG(0xE0,0X04,0X1D); - Set_LCD_8B_REG(0xE0,0X05,0X30); - Set_LCD_8B_REG(0xE0,0X06,0X61); - Set_LCD_8B_REG(0xE0,0X07,0X3D); - Set_LCD_8B_REG(0xE0,0X08,0X22); - Set_LCD_8B_REG(0xE0,0X09,0X2A); - Set_LCD_8B_REG(0xE0,0X0A,0X87); - Set_LCD_8B_REG(0xE0,0X0B,0X16); - Set_LCD_8B_REG(0xE0,0X0C,0X3B); - Set_LCD_8B_REG(0xE0,0X0D,0X4C); - Set_LCD_8B_REG(0xE0,0X0E,0X78); - Set_LCD_8B_REG(0xE0,0X0F,0X96); - Set_LCD_8B_REG(0xE0,0X10,0X4A); - Set_LCD_8B_REG(0xE0,0X11,0X4D); - - Set_LCD_8B_REG(0xE1,0X00,0X0E); - Set_LCD_8B_REG(0xE1,0X01,0X14); - Set_LCD_8B_REG(0xE1,0X02,0X29); - Set_LCD_8B_REG(0xE1,0X03,0X3A); - Set_LCD_8B_REG(0xE1,0X04,0X1D); - Set_LCD_8B_REG(0xE1,0X05,0X30); - Set_LCD_8B_REG(0xE1,0X06,0X61); - Set_LCD_8B_REG(0xE1,0X07,0X3F); - Set_LCD_8B_REG(0xE1,0X08,0X20); - Set_LCD_8B_REG(0xE1,0X09,0X26); - Set_LCD_8B_REG(0xE1,0X0A,0X83); - Set_LCD_8B_REG(0xE1,0X0B,0X16); - Set_LCD_8B_REG(0xE1,0X0C,0X3B); - Set_LCD_8B_REG(0xE1,0X0D,0X4C); - Set_LCD_8B_REG(0xE1,0X0E,0X78); - Set_LCD_8B_REG(0xE1,0X0F,0X96); - Set_LCD_8B_REG(0xE1,0X10,0X4A); - Set_LCD_8B_REG(0xE1,0X11,0X4D); - - Set_LCD_8B_REG(0xE2,0X00,0X0E); - Set_LCD_8B_REG(0xE2,0X01,0X14); - Set_LCD_8B_REG(0xE2,0X02,0X29); - Set_LCD_8B_REG(0xE2,0X03,0X3A); - Set_LCD_8B_REG(0xE2,0X04,0X1D); - Set_LCD_8B_REG(0xE2,0X05,0X30); - Set_LCD_8B_REG(0xE2,0X06,0X61); - Set_LCD_8B_REG(0xE2,0X07,0X3D); - Set_LCD_8B_REG(0xE2,0X08,0X22); - Set_LCD_8B_REG(0xE2,0X09,0X2A); - Set_LCD_8B_REG(0xE2,0X0A,0X87); - Set_LCD_8B_REG(0xE2,0X0B,0X16); - Set_LCD_8B_REG(0xE2,0X0C,0X3B); - Set_LCD_8B_REG(0xE2,0X0D,0X4C); - Set_LCD_8B_REG(0xE2,0X0E,0X78); - Set_LCD_8B_REG(0xE2,0X0F,0X96); - Set_LCD_8B_REG(0xE2,0X10,0X4A); - Set_LCD_8B_REG(0xE2,0X11,0X4D); - - Set_LCD_8B_REG(0xE3,0X00,0X0E); - Set_LCD_8B_REG(0xE3,0X01,0X14); - Set_LCD_8B_REG(0xE3,0X02,0X29); - Set_LCD_8B_REG(0xE3,0X03,0X3A); - Set_LCD_8B_REG(0xE3,0X04,0X1D); - Set_LCD_8B_REG(0xE3,0X05,0X30); - Set_LCD_8B_REG(0xE3,0X06,0X61); - Set_LCD_8B_REG(0xE3,0X07,0X3F); - Set_LCD_8B_REG(0xE3,0X08,0X20); - Set_LCD_8B_REG(0xE3,0X09,0X26); - Set_LCD_8B_REG(0xE3,0X0A,0X83); - Set_LCD_8B_REG(0xE3,0X0B,0X16); - Set_LCD_8B_REG(0xE3,0X0C,0X3B); - Set_LCD_8B_REG(0xE3,0X0D,0X4C); - Set_LCD_8B_REG(0xE3,0X0E,0X78); - Set_LCD_8B_REG(0xE3,0X0F,0X96); - Set_LCD_8B_REG(0xE3,0X10,0X4A); - Set_LCD_8B_REG(0xE3,0X11,0X4D); - - Set_LCD_8B_REG(0xE4,0X00,0X0E); - Set_LCD_8B_REG(0xE4,0X01,0X14); - Set_LCD_8B_REG(0xE4,0X02,0X29); - Set_LCD_8B_REG(0xE4,0X03,0X3A); - Set_LCD_8B_REG(0xE4,0X04,0X1D); - Set_LCD_8B_REG(0xE4,0X05,0X30); - Set_LCD_8B_REG(0xE4,0X06,0X61); - Set_LCD_8B_REG(0xE4,0X07,0X3D); - Set_LCD_8B_REG(0xE4,0X08,0X22); - Set_LCD_8B_REG(0xE4,0X09,0X2A); - Set_LCD_8B_REG(0xE4,0X0A,0X87); - Set_LCD_8B_REG(0xE4,0X0B,0X16); - Set_LCD_8B_REG(0xE4,0X0C,0X3B); - Set_LCD_8B_REG(0xE4,0X0D,0X4C); - Set_LCD_8B_REG(0xE4,0X0E,0X78); - Set_LCD_8B_REG(0xE4,0X0F,0X96); - Set_LCD_8B_REG(0xE4,0X10,0X4A); - Set_LCD_8B_REG(0xE4,0X11,0X4D); - - Set_LCD_8B_REG(0xE5,0X00,0X0E); - Set_LCD_8B_REG(0xE5,0X01,0X14); - Set_LCD_8B_REG(0xE5,0X02,0X29); - Set_LCD_8B_REG(0xE5,0X03,0X3A); - Set_LCD_8B_REG(0xE5,0X04,0X1D); - Set_LCD_8B_REG(0xE5,0X05,0X30); - Set_LCD_8B_REG(0xE5,0X06,0X61); - Set_LCD_8B_REG(0xE5,0X07,0X3F); - Set_LCD_8B_REG(0xE5,0X08,0X20); - Set_LCD_8B_REG(0xE5,0X09,0X26); - Set_LCD_8B_REG(0xE5,0X0A,0X83); - Set_LCD_8B_REG(0xE5,0X0B,0X16); - Set_LCD_8B_REG(0xE5,0X0C,0X3B); - Set_LCD_8B_REG(0xE5,0X0D,0X4C); - Set_LCD_8B_REG(0xE5,0X0E,0X78); - Set_LCD_8B_REG(0xE5,0X0F,0X96); - Set_LCD_8B_REG(0xE5,0X10,0X4A); - Set_LCD_8B_REG(0xE5,0X11,0X4D); - - Set_LCD_8B_REG(0x36,0X01,0X01); - - Set_LCD_8B_REG(0x11,0X00,0X00); - msleep(100); - Set_LCD_8B_REG(0x29,0X00,0X00); - msleep(100); - - - Set_LCD_8B_REG(0x2a,0X00,0X00); - Set_LCD_8B_REG(0x2a,0X01,0X00); - Set_LCD_8B_REG(0x2a,0X02,0X01); - Set_LCD_8B_REG(0x2a,0X03,0Xdf); - msleep(100); - Set_LCD_8B_REG(0x2b,0X00,0X00); - Set_LCD_8B_REG(0x2b,0X01,0X00); - Set_LCD_8B_REG(0x2b,0X02,0X03); - Set_LCD_8B_REG(0x2b,0X03,0X1f); - msleep(100); - { - u32 fte = 0; - Set_LCD_8B_REG(0x44,0x00,(fte>>8)&0xff); - Set_LCD_8B_REG(0x44,0x01,(fte)&0xff); - } - Set_LCD_8B_REG(0x0E,0X00,0X80); - Set_LCD_8B_REG(0x35,0X00,0X80); - -#if (480==H_VD) - Set_LCD_8B_REG(0x36,0X00,0x00); -#else - Set_LCD_8B_REG(0x36,0X00,0x22); -#endif - Set_LCD_8B_REG(0x2c,0X00,-1); - - for(i=0; i<480*800; i++) { - mcu_ioctl(MCU_WRDATA, 0x00000000); - } - -#if 0 - // for test - while(1) { - int i = 0; - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0xffffffff); - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0x00000000); - msleep(1000); - printk(">>>>> MCU_WRDATA ...\n"); - - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0x00000000); - for(i=0; i<400*480; i++) - mcu_ioctl(MCU_WRDATA, 0xffffffff); - msleep(1000); - printk(">>>>> MCU_WRDATA ...\n"); - } -#endif - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - - -int lcd_standby(u8 enable) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - if(enable) { - Set_LCD_8B_REG(0x10,0X00,-1); - } else { - Set_LCD_8B_REG(0x11,0X00,-1); - } - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - - -int lcd_refresh(u8 arg) -{ - switch(arg) - { - case REFRESH_PRE: //DMA´«ËÍÇ°×¼±¸ - mcu_ioctl(MCU_SETBYPASS, 1); - Set_LCD_8B_REG(0x2c,0X00,-1); - mcu_ioctl(MCU_SETBYPASS, 0); - break; - - case REFRESH_END: //DMA´«ËͽáÊøºó - mcu_ioctl(MCU_SETBYPASS, 1); - Set_LCD_8B_REG(0x29,0X00,-1); - mcu_ioctl(MCU_SETBYPASS, 0); - break; - - default: - break; - } - - return 0; -} - - -int lcd_scandir(u16 dir) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - // ÔÝʱ¹Ø±ÕMCUÏÔʾ,ÔÚlcd_refreshµÄcase REFRESH_ENDÔÙ´ò¿ª - // ·ñÔò»­Ãæ»áÒì³£ - Set_LCD_8B_REG(0x28,0X00,-1); - - Set_LCD_8B_REG(0x2a,0X00,0X00); - Set_LCD_8B_REG(0x2a,0X01,0X00); - Set_LCD_8B_REG(0x2a,0X02,0X01); - Set_LCD_8B_REG(0x2a,0X03,0Xdf); - Set_LCD_8B_REG(0x2b,0X00,0X00); - Set_LCD_8B_REG(0x2b,0X01,0X00); - Set_LCD_8B_REG(0x2b,0X02,0X03); - Set_LCD_8B_REG(0x2b,0X03,0X1f); - - switch(dir) - { - case 0: - Set_LCD_8B_REG(0x36,0X00,0x00); - break; - case 90: - Set_LCD_8B_REG(0x36,0X00,0x22); - break; - case 180: - Set_LCD_8B_REG(0x36,0X00,0x03); - break; - case 270: - Set_LCD_8B_REG(0x36,0X00,0x21); - break; - default: - break; - } - - mcu_ioctl(MCU_SETBYPASS, 0); - return 0; -} - - -int lcd_disparea(u8 area) -{ - u32 x0, y0, x1, y1, fte; - - mcu_ioctl(MCU_SETBYPASS, 1); - - switch(area) - { - case 0: - fte = 0; - x0 = 0; - y0 = 0; - x1 = 399; - y1 = 479; - break; - - case 2: - x0 = 0; - y0 = 0; - x1 = 799; - y1 = 479; - break; - - case 1: - default: - fte = 400; - x0 = 400; - y0 = 0; - x1 = 799; - y1 = 479; - break; - } - - //Set_LCD_8B_REG(0x44,0x00,(fte>>8)&0xff); - //Set_LCD_8B_REG(0x44,0x01,(fte)&0xff); - Set_LCD_8B_REG(0x2a,0X00,(y0>>8)&0xff); - Set_LCD_8B_REG(0x2a,0X01,y0&0xff); - Set_LCD_8B_REG(0x2a,0X02,(y1>>8)&0xff); - Set_LCD_8B_REG(0x2a,0X03,y1&0xff); - - Set_LCD_8B_REG(0x2b,0X00,(x0>>8)&0xff); - Set_LCD_8B_REG(0x2b,0X01,x0&0xff); - Set_LCD_8B_REG(0x2b,0X02,(x1>>8)&0xff); - Set_LCD_8B_REG(0x2b,0X03,x1&0xff); - Set_LCD_8B_REG(0x2c,0X00,-1); - - mcu_ioctl(MCU_SETBYPASS, 0); - - return (0); - -} - -void set_lcd_info(struct rk29fb_screen *screen) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - screen->mcu_wrperiod = P_WR; - screen->mcu_usefmk = USE_FMARK; - screen->mcu_frmrate = FRMRATE; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - screen->scandir = lcd_scandir; - screen->refresh = lcd_refresh; - screen->disparea = lcd_disparea; -} - - - - - diff --git a/drivers/video/rockchip/screen/lcd_null.c b/drivers/video/rockchip/screen/lcd_null.c deleted file mode 100644 index ea289c617a6a..000000000000 --- a/drivers/video/rockchip/screen/lcd_null.c +++ /dev/null @@ -1,41 +0,0 @@ - -#ifndef __LCD_NULL__ -#define __LCD_NULL__ - - -/* Base */ -#define SCREEN_TYPE SCREEN_NULL -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE 0 -#define DCLK 0 -#define LCDC_ACLK 0 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 0 -#define H_BP 0 -#define H_VD 0 -#define H_FP 0 - -#define V_PW 0 -#define V_BP 0 -#define V_VD 0 -#define V_FP 0 - -#define LCD_WIDTH 0 //need modify -#define LCD_HEIGHT 0 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_DUMMY 0 -#define SWAP_GB 0 -#define SWAP_RG 0 - - - -#endif - diff --git a/drivers/video/rockchip/screen/lcd_rgb_tft480800_25_e.c b/drivers/video/rockchip/screen/lcd_rgb_tft480800_25_e.c deleted file mode 100644 index 1591300955c0..000000000000 --- a/drivers/video/rockchip/screen/lcd_rgb_tft480800_25_e.c +++ /dev/null @@ -1,603 +0,0 @@ -/* - * Copyright (C) 2011 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2011-03-11 - * route:drivers/video/display/screen/lcd_rgb_tft480800_25_e.c - driver for rk29 phone sdk - * station:haven't been tested in any hardware platform - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - - - -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include -#include "screen.h" - - -/* Base */ -#define OUT_TYPE SCREEN_RGB -#define OUT_FACE OUT_P888 -#define OUT_CLK 26000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA Ƶ�� - -/* Timing */ -#define H_PW 8 -#define H_BP 6 -#define H_VD 480 -#define H_FP 60 - -#define V_PW 2 -#define V_BP 12 -#define V_VD 800 -#define V_FP 4 - - -#define LCD_WIDTH 800 //need modify -#define LCD_HEIGHT 480 - -/* Other */ -#define DCLK_POL 1 -#define SWAP_RB 0 - - -/* define spi write command and data interface function */ - -#define SIMULATION_SPI 1 -#ifdef SIMULATION_SPI - - #define TXD_PORT gLcd_info->txd_pin - #define CLK_PORT gLcd_info->clk_pin - #define CS_PORT gLcd_info->cs_pin - #define LCD_RST_PORT RK29_PIN6_PC6 - - #define CS_OUT() gpio_direction_output(CS_PORT, 0) - #define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) - #define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) - #define CLK_OUT() gpio_direction_output(CLK_PORT, 0) - #define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) - #define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) - #define TXD_OUT() gpio_direction_output(TXD_PORT, 0) - #define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) - #define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - #define LCD_RST_OUT() gpio_direction_output(LCD_RST_PORT, 0) - #define LCD_RST(i) gpio_set_value(LCD_RST_PORT, i) - -// #define bits_9 - #ifdef bits_9 //9bits - #define LCDSPI_InitCMD(cmd) spi_write_9bit(0, cmd) - #define LCDSPI_InitDAT(dat) spi_write_9bit(1, dat) - #else //16bits - #define LCDSPI_InitCMD(cmd) spi_write_16bit(0, cmd) - #define LCDSPI_InitDAT(dat) spi_write_16bit(1, dat) - #endif - #define Lcd_EnvidOnOff(i) - -#else - - #define bits_9 1 - #ifdef bits_9 //9bits - #define LCDSPI_InitCMD(cmd) - #define LCDSPI_InitDAT(dat) - #else //16bits - #define LCDSPI_InitCMD(cmd) - #define LCDSPI_InitDAT(dat) - #endif - -#endif - - -/* define lcd command */ -#define ENTER_SLEEP_MODE 0x10 -#define EXIT_SLEEP_MODE 0x11 -#define SET_COLUMN_ADDRESS 0x2a -#define SET_PAGE_ADDRESS 0x2b -#define WRITE_MEMORY_START 0x2c -#define SET_DISPLAY_ON 0x29 -#define SET_DISPLAY_OFF 0x28 -#define SET_ADDRESS_MODE 0x36 -#define SET_PIXEL_FORMAT 0x3a - - -#define DRVDelayUs(i) udelay(i*2) - -static struct rk29lcd_info *gLcd_info = NULL; -int lcd_init(void); -int lcd_standby(u8 enable); - - -/* spi write a data frame,type mean command or data */ -int spi_write_9bit(u32 type, u32 value) -{ - u32 i = 0; - - if(type != 0 && type != 1) - { - return -1; - } - /*make a data frame of 9 bits,the 8th bit 0:mean command,1:mean data*/ - value &= 0xff; - value &= (type << 8); - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - - CS_CLR(); - for(i = 0; i < 9; i++) //reg - { - if(value & (1 << (8-i))) - { - TXD_SET(); - } - else - { - TXD_CLR(); - } - - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(2); - return 0; -} - - -/* spi write a data frame,type mean command or data */ -int spi_write_16bit(u32 type, u32 value) -{ - u32 i = 0; - u32 data = 0; - - if(type != 0 && type != 1) - { - return -1; - } - /*make a data frame of 16 bits,the 8th bit 0:mean command,1:mean data*/ - data = (type << 8)|value; - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_SET(); - CLK_SET(); - DRVDelayUs(2); - - CS_CLR(); - for(i = 0; i < 16; i++) //reg - { - if(data & (1 << (15-i))) - { - TXD_SET(); - } - else - { - TXD_CLR(); - } - - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(2); - return 0; -} -int lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); - printk("lcd_init...\n"); -/* reset lcd to start init lcd by software if there is no hardware reset circuit for the lcd */ -#ifdef LCD_RST_PORT - gpio_request(LCD_RST_PORT, NULL); -#endif - -#if 1 - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - CS_SET(); - TXD_SET(); - CLK_SET(); - LCD_RST_OUT(); - LCD_RST(1); - msleep(10); - LCD_RST(0); - msleep(100); - LCD_RST(1); - msleep(100); -#endif - -#if 1 - - LCDSPI_InitCMD(0xB9); // SET password - LCDSPI_InitDAT(0xFF); - LCDSPI_InitDAT(0x83); - LCDSPI_InitDAT(0x69); - - LCDSPI_InitCMD(0xB1); //Set Power - LCDSPI_InitDAT(0x85); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x34); - LCDSPI_InitDAT(0x07); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x0F); - LCDSPI_InitDAT(0x0F); - LCDSPI_InitDAT(0x2A); - LCDSPI_InitDAT(0x32); - LCDSPI_InitDAT(0x3F); - LCDSPI_InitDAT(0x3F); - LCDSPI_InitDAT(0x01); //update VBIAS - LCDSPI_InitDAT(0x3A); - LCDSPI_InitDAT(0x01); - LCDSPI_InitDAT(0xE6); - LCDSPI_InitDAT(0xE6); - LCDSPI_InitDAT(0xE6); - LCDSPI_InitDAT(0xE6); - LCDSPI_InitDAT(0xE6); - - - - LCDSPI_InitCMD(0xB2); // SET Display 480x800 - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x28); //23 - LCDSPI_InitDAT(0x05); //03 - LCDSPI_InitDAT(0x05); //03 - LCDSPI_InitDAT(0x70); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0xFF); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x03); - LCDSPI_InitDAT(0x03); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x01); - - - LCDSPI_InitCMD(0xB4); // SET Display 480x800 - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x18); - LCDSPI_InitDAT(0x80); - LCDSPI_InitDAT(0x06); - LCDSPI_InitDAT(0x02); - - - - LCDSPI_InitCMD(0xB6); // SET VCOM - LCDSPI_InitDAT(0x42); // Update VCOM - LCDSPI_InitDAT(0x42); - - - - LCDSPI_InitCMD(0xD5); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x04); - LCDSPI_InitDAT(0x03); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x01); - LCDSPI_InitDAT(0x05); - LCDSPI_InitDAT(0x28); - LCDSPI_InitDAT(0x70); - LCDSPI_InitDAT(0x01); - LCDSPI_InitDAT(0x03); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x40); - LCDSPI_InitDAT(0x06); - LCDSPI_InitDAT(0x51); - LCDSPI_InitDAT(0x07); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x41); - LCDSPI_InitDAT(0x06); - LCDSPI_InitDAT(0x50); - LCDSPI_InitDAT(0x07); - LCDSPI_InitDAT(0x07); - LCDSPI_InitDAT(0x0F); - LCDSPI_InitDAT(0x04); - LCDSPI_InitDAT(0x00); - - - ///Gamma2.2 - LCDSPI_InitCMD(0xE0); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x13); - LCDSPI_InitDAT(0x19); - LCDSPI_InitDAT(0x38); - LCDSPI_InitDAT(0x3D); - LCDSPI_InitDAT(0x3F); - LCDSPI_InitDAT(0x28); - LCDSPI_InitDAT(0x46); - LCDSPI_InitDAT(0x07); - LCDSPI_InitDAT(0x0D); - LCDSPI_InitDAT(0x0E); - LCDSPI_InitDAT(0x12); - LCDSPI_InitDAT(0x15); - LCDSPI_InitDAT(0x12); - LCDSPI_InitDAT(0x14); - LCDSPI_InitDAT(0x0F); - LCDSPI_InitDAT(0x17); - LCDSPI_InitDAT(0x00); - LCDSPI_InitDAT(0x13); - LCDSPI_InitDAT(0x19); - LCDSPI_InitDAT(0x38); - LCDSPI_InitDAT(0x3D); - LCDSPI_InitDAT(0x3F); - LCDSPI_InitDAT(0x28); - LCDSPI_InitDAT(0x46); - LCDSPI_InitDAT(0x07); - LCDSPI_InitDAT(0x0D); - LCDSPI_InitDAT(0x0E); - LCDSPI_InitDAT(0x12); - LCDSPI_InitDAT(0x15); - LCDSPI_InitDAT(0x12); - LCDSPI_InitDAT(0x14); - LCDSPI_InitDAT(0x0F); - LCDSPI_InitDAT(0x17); - - - msleep(10); - -///DGC Setting - LCDSPI_InitCMD(0xC1); - LCDSPI_InitDAT(0x01); -//R - LCDSPI_InitDAT(0x04); - LCDSPI_InitDAT(0x13); - LCDSPI_InitDAT(0x1a); - LCDSPI_InitDAT(0x20); - LCDSPI_InitDAT(0x27); - LCDSPI_InitDAT(0x2c); - LCDSPI_InitDAT(0x32); - LCDSPI_InitDAT(0x36); - LCDSPI_InitDAT(0x3f); - LCDSPI_InitDAT(0x47); - LCDSPI_InitDAT(0x50); - LCDSPI_InitDAT(0x59); - LCDSPI_InitDAT(0x60); - LCDSPI_InitDAT(0x68); - LCDSPI_InitDAT(0x71); - LCDSPI_InitDAT(0x7B); - LCDSPI_InitDAT(0x82); - LCDSPI_InitDAT(0x89); - LCDSPI_InitDAT(0x91); - LCDSPI_InitDAT(0x98); - LCDSPI_InitDAT(0xA0); - LCDSPI_InitDAT(0xA8); - LCDSPI_InitDAT(0xB0); - LCDSPI_InitDAT(0xB8); - LCDSPI_InitDAT(0xC1); - LCDSPI_InitDAT(0xC9); - LCDSPI_InitDAT(0xD0); - LCDSPI_InitDAT(0xD7); - LCDSPI_InitDAT(0xE0); - LCDSPI_InitDAT(0xE7); - LCDSPI_InitDAT(0xEF); - LCDSPI_InitDAT(0xF7); - LCDSPI_InitDAT(0xFE); - LCDSPI_InitDAT(0xCF); - LCDSPI_InitDAT(0x52); - LCDSPI_InitDAT(0x34); - LCDSPI_InitDAT(0xF8); - LCDSPI_InitDAT(0x51); - LCDSPI_InitDAT(0xF5); - LCDSPI_InitDAT(0x9D); - LCDSPI_InitDAT(0x75); - LCDSPI_InitDAT(0x00); -//G - LCDSPI_InitDAT(0x04); - LCDSPI_InitDAT(0x13); - LCDSPI_InitDAT(0x1a); - LCDSPI_InitDAT(0x20); - LCDSPI_InitDAT(0x27); - LCDSPI_InitDAT(0x2c); - LCDSPI_InitDAT(0x32); - LCDSPI_InitDAT(0x36); - LCDSPI_InitDAT(0x3f); - LCDSPI_InitDAT(0x47); - LCDSPI_InitDAT(0x50); - LCDSPI_InitDAT(0x59); - LCDSPI_InitDAT(0x60); - LCDSPI_InitDAT(0x68); - LCDSPI_InitDAT(0x71); - LCDSPI_InitDAT(0x7B); - LCDSPI_InitDAT(0x82); - LCDSPI_InitDAT(0x89); - LCDSPI_InitDAT(0x91); - LCDSPI_InitDAT(0x98); - LCDSPI_InitDAT(0xA0); - LCDSPI_InitDAT(0xA8); - LCDSPI_InitDAT(0xB0); - LCDSPI_InitDAT(0xB8); - LCDSPI_InitDAT(0xC1); - LCDSPI_InitDAT(0xC9); - LCDSPI_InitDAT(0xD0); - LCDSPI_InitDAT(0xD7); - LCDSPI_InitDAT(0xE0); - LCDSPI_InitDAT(0xE7); - LCDSPI_InitDAT(0xEF); - LCDSPI_InitDAT(0xF7); - LCDSPI_InitDAT(0xFE); - LCDSPI_InitDAT(0xCF); - LCDSPI_InitDAT(0x52); - LCDSPI_InitDAT(0x34); - LCDSPI_InitDAT(0xF8); - LCDSPI_InitDAT(0x51); - LCDSPI_InitDAT(0xF5); - LCDSPI_InitDAT(0x9D); - LCDSPI_InitDAT(0x75); - LCDSPI_InitDAT(0x00); -//B - LCDSPI_InitDAT(0x04); - LCDSPI_InitDAT(0x13); - LCDSPI_InitDAT(0x1a); - LCDSPI_InitDAT(0x20); - LCDSPI_InitDAT(0x27); - LCDSPI_InitDAT(0x2c); - LCDSPI_InitDAT(0x32); - LCDSPI_InitDAT(0x36); - LCDSPI_InitDAT(0x3f); - LCDSPI_InitDAT(0x47); - LCDSPI_InitDAT(0x50); - LCDSPI_InitDAT(0x59); - LCDSPI_InitDAT(0x60); - LCDSPI_InitDAT(0x68); - LCDSPI_InitDAT(0x71); - LCDSPI_InitDAT(0x7B); - LCDSPI_InitDAT(0x82); - LCDSPI_InitDAT(0x89); - LCDSPI_InitDAT(0x91); - LCDSPI_InitDAT(0x98); - LCDSPI_InitDAT(0xA0); - LCDSPI_InitDAT(0xA8); - LCDSPI_InitDAT(0xB0); - LCDSPI_InitDAT(0xB8); - LCDSPI_InitDAT(0xC1); - LCDSPI_InitDAT(0xC9); - LCDSPI_InitDAT(0xD0); - LCDSPI_InitDAT(0xD7); - LCDSPI_InitDAT(0xE0); - LCDSPI_InitDAT(0xE7); - LCDSPI_InitDAT(0xEF); - LCDSPI_InitDAT(0xF7); - LCDSPI_InitDAT(0xFE); - LCDSPI_InitDAT(0xCF); - LCDSPI_InitDAT(0x52); - LCDSPI_InitDAT(0x34); - LCDSPI_InitDAT(0xF8); - LCDSPI_InitDAT(0x51); - LCDSPI_InitDAT(0xF5); - LCDSPI_InitDAT(0x9D); - LCDSPI_InitDAT(0x75); - LCDSPI_InitDAT(0x00); - - msleep(10); - - - //LCDSPI_InitCMD(0x36); - //LCDSPI_InitDAT(0x80); //µ÷Õû36HÖеIJÎÊý¿ÉÒÔʵÏÖGATEºÍSOURCEµÄ·­×ª - - LCDSPI_InitCMD(SET_PIXEL_FORMAT); - LCDSPI_InitDAT(0x77); - - LCDSPI_InitCMD(EXIT_SLEEP_MODE); - msleep(120); - - LCDSPI_InitCMD(SET_DISPLAY_ON); - - LCDSPI_InitCMD(WRITE_MEMORY_START); -#endif - - if(gLcd_info) - gLcd_info->io_deinit(); - - return 0; -} - -int lcd_standby(u8 enable) -{ - if(gLcd_info) - gLcd_info->io_init(); - - if(enable) { - Lcd_EnvidOnOff(0); //RGB TIMENG OFF - LCDSPI_InitCMD(ENTER_SLEEP_MODE); - Lcd_EnvidOnOff(1); //RGB TIMENG ON - msleep(200); - Lcd_EnvidOnOff(0); //RGB TIMENG OFF - msleep(100); - } else { - //LCD_RESET(); - LCDSPI_InitCMD(EXIT_SLEEP_MODE); - msleep(200); - Lcd_EnvidOnOff(1); //RGB TIMENG ON - msleep(200); - } - - if(gLcd_info) - gLcd_info->io_deinit(); - - return 0; -} - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - if(lcd_info) - gLcd_info = lcd_info; -} - - - diff --git a/drivers/video/rockchip/screen/lcd_rk2928.c b/drivers/video/rockchip/screen/lcd_rk2928.c deleted file mode 100644 index 5e0c27149b02..000000000000 --- a/drivers/video/rockchip/screen/lcd_rk2928.c +++ /dev/null @@ -1,78 +0,0 @@ -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include -#include -#include "../../rockchip/hdmi/rk_hdmi.h" -#include "screen.h" - -enum { - OUT_TYPE_INDEX = 0, - OUT_FACE_INDEX, - OUT_CLK_INDEX, - LCDC_ACLK_INDEX, - H_PW_INDEX, - H_BP_INDEX, - H_VD_INDEX, - H_FP_INDEX, - V_PW_INDEX, - V_BP_INDEX, - V_VD_INDEX, - V_FP_INDEX, - LCD_WIDTH_INDEX, - LCD_HEIGHT_INDEX, - DCLK_POL_INDEX, - SWAP_RB_INDEX, - LCD_PARAM_MAX, -}; -uint lcd_param[LCD_PARAM_MAX] = DEF_LCD_PARAM; -module_param_array(lcd_param, uint, NULL, 0644); - -#define set_scaler_info NULL - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = lcd_param[OUT_TYPE_INDEX]; - screen->face = lcd_param[OUT_FACE_INDEX]; - screen->hw_format = 1; - - /* Screen size */ - screen->x_res = lcd_param[H_VD_INDEX]; - screen->y_res = lcd_param[V_VD_INDEX]; - - screen->width = lcd_param[LCD_WIDTH_INDEX]; - screen->height = lcd_param[LCD_HEIGHT_INDEX]; - - /* Timing */ - screen->lcdc_aclk = lcd_param[LCDC_ACLK_INDEX]; - screen->pixclock = lcd_param[OUT_CLK_INDEX]; - screen->left_margin = lcd_param[H_BP_INDEX]; - screen->right_margin = lcd_param[H_FP_INDEX]; - screen->hsync_len = lcd_param[H_PW_INDEX]; - screen->upper_margin = lcd_param[V_BP_INDEX]; - screen->lower_margin = lcd_param[V_FP_INDEX]; - screen->vsync_len = lcd_param[V_PW_INDEX]; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = lcd_param[DCLK_POL_INDEX]; - - /* Swap rule */ - screen->swap_rb = lcd_param[SWAP_RB_INDEX]; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; -} - - - diff --git a/drivers/video/rockchip/screen/lcd_rk3168_fac.c b/drivers/video/rockchip/screen/lcd_rk3168_fac.c deleted file mode 100644 index 66bdeb52fe13..000000000000 --- a/drivers/video/rockchip/screen/lcd_rk3168_fac.c +++ /dev/null @@ -1,203 +0,0 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ - -#ifndef __LCD_RK3168_FAC__ -#define __LCD_RK3168_FAC__ -/* Base */ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& ( defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS)) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,50625000) -#define S_H_PW 10 -#define S_H_BP 10 -#define S_H_VD 1024 -#define S_H_FP 306 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 600 -#define S_V_FP 5 - -#define S_H_ST 0 -#define S_V_ST 5 - -#define S_PLL_CFG_VAL 0x01443013//0x01842016 -#define S_FRAC 0x4d9380//0xc16c2d -#define S_SCL_VST 0x00b//0x25 -#define S_SCL_HST 0x000//0x4ba -#define S_VIF_VST 0x1//0x1 -#define S_VIF_HST 0xca//0xca - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,45375000) -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1024 -#define S1_H_FP 408 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 600 -#define S1_V_FP 5 - -#define S1_H_ST 0 -#define S1_V_ST 5 - -#define S1_PLL_CFG_VAL 0x01843013//0x01c42016 -#define S1_FRAC 0x4d9365//0x1f9ad4 -#define S1_SCL_VST 0x00a//0x25 -#define S1_SCL_HST 0xa4f//0x5ab -#define S1_VIF_VST 0x1//0x1 -#define S1_VIF_HST 0xca//0xca - - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,50625000) -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1024 -#define S2_H_FP 306 - -#define S2_V_PW 10 -#define S2_V_BP 10 -#define S2_V_VD 600 -#define S2_V_FP 5 - -#define S2_H_ST 0 -#define S2_V_ST 3 - - -//bellow are for jettaB -#define S2_PLL_CFG_VAL 0x01423013//0x01822016 -#define S2_FRAC 0x4d9380//0xc16c2d -#define S2_SCL_VST 0x008//0x19 -#define S2_SCL_HST 0x000//0x483 -#define S2_VIF_VST 0x1//0x1 -#define S2_VIF_HST 0xcf//0xcf - - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,44343750) -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1024 -#define S3_H_FP 375 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 600 -#define S3_V_FP 3 - -#define S3_H_ST 0 -#define S3_V_ST 3 - -#define S3_PLL_CFG_VAL 0x01823013//0x01c22016 -#define S3_FRAC 0x4d9365//0x1f9ad4 -#define S3_SCL_VST 0x007//0x19 -#define S3_SCL_HST 0x7bb//0x569 -#define S3_VIF_VST 0x1//0x1 -#define S3_VIF_HST 0xcf//0xcf - - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,46875000) -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1024 -#define S4_H_FP 396 - -#define S4_V_PW 10 -#define S4_V_BP 10 -#define S4_V_VD 600 -#define S4_V_FP 31 - -#define S4_H_ST 0 -#define S4_V_ST 28 - -#define S4_PLL_CFG_VAL 0x01c12015//0x01412016 -#define S4_FRAC 0x80f04c//0xa23d09 -#define S4_SCL_VST 0x01f//0x2d -#define S4_SCL_HST 0x2b3//0x33d -#define S4_VIF_VST 0x1//0x1 -#define S4_VIF_HST 0xc1//0xc1 - - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1024 -#define S5_H_FP 386 - -#define S5_V_PW 10 -#define S5_V_BP 10 -#define S5_V_VD 600 -#define S5_V_FP 35 - -#define S5_H_ST 0 -#define S5_V_ST 22 - -#define S5_PLL_CFG_VAL 0x01812016//0x01c11013 -#define S5_FRAC 0x45d17b//0x25325e -#define S5_SCL_VST 0x01a//0x26 -#define S5_SCL_HST 0x359//0x2ae -#define S5_VIF_VST 0x1//0x1 -#define S5_VIF_HST 0xc1//0xc1 - - -#define S_DCLK_POL 1 - -#endif - -#endif - diff --git a/drivers/video/rockchip/screen/lcd_s1d13521.c b/drivers/video/rockchip/screen/lcd_s1d13521.c deleted file mode 100644 index 06db84f22ae5..000000000000 --- a/drivers/video/rockchip/screen/lcd_s1d13521.c +++ /dev/null @@ -1,355 +0,0 @@ -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include "screen.h" - -#include "s1d13521.h" -#include "s1d13521ioctl.h" - -/* Base */ -#define OUT_TYPE SCREEN_MCU -#define OUT_FACE OUT_P16BPP4 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 1 -#define H_VD 600 -#define H_FP 5 - -#define V_PW 1 -#define V_BP 1 -#define V_VD 800 -#define V_FP 1 - -#define P_WR 200 - -#define LCD_WIDTH 600 //need modify -#define LCD_HEIGHT 800 - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - - - -int s1d13521if_refresh(u8 arg); - -#define GPIO_RESET_L RK2818_PIN_PC0//reset pin -#define GPIO_HIRQ RK2818_PIN_PC1 //IRQ -#define GPIO_HDC RK2818_PIN_PC2 //Data(HIHG) or Command(LOW) -#define GPIO_HCS_L RK2818_PIN_PC3 //Chip select -#define GPIO_HRD_L RK2818_PIN_PC4 //Read mode, low active -#define GPIO_HWE_L RK2818_PIN_PC5 //Write mode, low active -#define GPIO_HRDY RK2818_PIN_PC6 //Bus ready -#define GPIO_RMODE RK2818_PIN_PC7 //rmode ->CNF1 - - -//---------------------------------------------------------------------------- -// PRIVATE FUNCTION: -// Set registers to initial values -//---------------------------------------------------------------------------- - -int s1d13521if_wait_for_ready(void) -{ - int cnt = 1000; - int d = 0; - gpio_request(GPIO_HRDY, 0); - d = gpio_get_value(GPIO_HRDY); - - while (d == 0) - { - mdelay(1); - - if (--cnt <= 0) // Avoid endless loop - { - printk(">>>>>> wait_for_ready -- timeout! \n"); - return -1; - } - - d = gpio_get_value(GPIO_HRDY); - } - gpio_free(GPIO_HRDY); - return 0; -} - - -int s1d13521if_cmd(unsigned ioctlcmd,s1d13521_ioctl_cmd_params *params, int numparams) -{ - int i; - s1d13521if_wait_for_ready(); - - mcu_ioctl(MCU_WRCMD, ioctlcmd); - for (i = 0; i < numparams; i++) { - mcu_ioctl(MCU_WRDATA, params->param[i]); - } - - return 0; -} - -void s1d13521if_WriteReg16(u16 Index, u16 Value) -{ - s1d13521if_wait_for_ready(); - mcu_ioctl(MCU_WRCMD, WR_REG); - mcu_ioctl(MCU_WRDATA, Index); - mcu_ioctl(MCU_WRDATA, Value); -} - - -void s1d13521fb_InitRegisters(void) -{ - unsigned i, cmd,j,numparams; - s1d13521_ioctl_cmd_params cmd_params; - S1D_INSTANTIATE_REGISTERS(static,InitCmdArray); - - i = 0; - - while (i < sizeof(InitCmdArray)/sizeof(InitCmdArray[0])) - { - cmd = InitCmdArray[i++]; - numparams = InitCmdArray[i++]; - - for (j = 0; j < numparams; j++) - cmd_params.param[j] = InitCmdArray[i++]; - - s1d13521if_cmd(cmd,&cmd_params,numparams); - } -} - -void s1d13521if_init_gpio(void) -{ - int i; - int ret=0; - - rk29_mux_api_set(GPIOC_LCDC18BIT_SEL_NAME, IOMUXB_GPIO0_C01); - rk29_mux_api_set(GPIOC_LCDC24BIT_SEL_NAME, IOMUXB_GPIO0_C2_7); - - for(i = 0; i < 8; i++) - { - if(i == 1 || i == 6)//HIRQ, HRDY - { - ret = gpio_request(GPIO_RESET_L+i, NULL); - if(ret != 0) - { - gpio_free(GPIO_RESET_L+i); - printk(">>>>>> lcd cs gpio_request err \n "); - } - gpio_direction_input(GPIO_RESET_L+i); - gpio_free(GPIO_RESET_L+i); - } - else //RESET_L, HD/C, HCS_L, HRD_L, HWE_L, RMODE - { - ret = gpio_request(GPIO_RESET_L+i, NULL); - if(ret != 0) - { - gpio_free(GPIO_RESET_L+i); - printk(">>>>>> lcd cs gpio_request err \n "); - } - gpio_direction_output(GPIO_RESET_L+i, 0); - gpio_set_value(GPIO_RESET_L+i, GPIO_HIGH); - gpio_free(GPIO_RESET_L+i); - } - } -} - -void s1d13521if_set_reset(void) -{ - gpio_request(GPIO_RMODE, 0); - gpio_set_value(GPIO_RMODE, GPIO_HIGH); - gpio_request(GPIO_RESET_L, 0); - - // reset pulse - mdelay(10); - gpio_set_value(GPIO_RESET_L, GPIO_LOW); - mdelay(10); - gpio_set_value(GPIO_RESET_L, GPIO_HIGH); - mdelay(10); - gpio_free(GPIO_RMODE); - gpio_free(GPIO_RESET_L); - - //s1d13521if_WaitForHRDY(); -} - - - -int s1d13521if_init(void) -{ - int i=0; - s1d13521_ioctl_cmd_params cmd_params; - - s1d13521if_init_gpio(); - s1d13521if_set_reset(); - - mcu_ioctl(MCU_SETBYPASS, 1); - - s1d13521fb_InitRegisters(); - -#if 1 - s1d13521if_WriteReg16(0x330,0x84); // LUT AutoSelect+P4N - s1d13521if_cmd(WAIT_DSPE_TRG,&cmd_params,0); - cmd_params.param[0] = (0x2 << 4); - s1d13521if_cmd(LD_IMG,&cmd_params,1); - cmd_params.param[0] = 0x154; - s1d13521if_cmd(WR_REG,&cmd_params,1); - - for(i=0; i<600*200; i++) { - mcu_ioctl(MCU_WRDATA, 0xffff); - } - - s1d13521if_cmd(LD_IMG_END,&cmd_params,0); - cmd_params.param[0] = ((WF_MODE_INIT<<8) |0x4000); - s1d13521if_cmd(UPD_FULL,&cmd_params,1); // update all pixels - s1d13521if_cmd(WAIT_DSPE_TRG,&cmd_params,0); - s1d13521if_cmd(WAIT_DSPE_FREND,&cmd_params,0); -#endif - - mcu_ioctl(MCU_SETBYPASS, 0); - - -#if 0 - // ³õʼ»¯Í¼Ïó - mcu_ioctl(MCU_SETBYPASS, 1); - while(1) - { - int i=0, j=0; - // Copy virtual framebuffer to display framebuffer. - - unsigned mode = WF_MODE_GC; - unsigned cmd = UPD_FULL; - -// unsigned reg330 = s1d13521if_ReadReg16(0x330); - s1d13521if_WriteReg16(0x330,0x84); // LUT AutoSelect + P4N - // Copy virtual framebuffer to hardware via indirect interface burst mode write - s1d13521if_cmd(WAIT_DSPE_TRG,&cmd_params,0); - cmd_params.param[0] = (0x2<<4); - s1d13521if_cmd(LD_IMG,&cmd_params,1); - cmd_params.param[0] = 0x154; - s1d13521if_cmd(WR_REG,&cmd_params,1); - - for(i=0; i<600*100; i++) { - mcu_ioctl(MCU_WRDATA, 0xffff); - } - for(i=0; i<600*100; i++) { - mcu_ioctl(MCU_WRDATA, 0x0000); - } - - s1d13521if_cmd(LD_IMG_END,&cmd_params,0); - cmd_params.param[0] = (mode<<8); - s1d13521if_cmd(cmd,&cmd_params,1); // update all pixels - s1d13521if_cmd(WAIT_DSPE_TRG,&cmd_params,0); - s1d13521if_cmd(WAIT_DSPE_FREND,&cmd_params,0); - - msleep(2000); - printk(">>>>>> lcd_init : send test image! \n"); - } - mcu_ioctl(MCU_SETBYPASS, 0); -#endif - - - return 0; -} - -int s1d13521if_standby(u8 enable) -{ - return 0; -} - -int s1d13521if_refresh(u8 arg) -{ - mcu_ioctl(MCU_SETBYPASS, 1); - - switch(arg) - { - case REFRESH_PRE: //DMA´«ËÍÇ°×¼±¸ - { - // Copy virtual framebuffer to display framebuffer. - s1d13521_ioctl_cmd_params cmd_params; - - // unsigned reg330 = s1d13521if_ReadReg16(0x330); - s1d13521if_WriteReg16(0x330,0x84); // LUT AutoSelect + P4N - - // Copy virtual framebuffer to hardware via indirect interface burst mode write - s1d13521if_cmd(WAIT_DSPE_TRG,&cmd_params,0); - cmd_params.param[0] = (0x2<<4); - s1d13521if_cmd(LD_IMG,&cmd_params,1); - cmd_params.param[0] = 0x154; - s1d13521if_cmd(WR_REG,&cmd_params,1); - } - printk(">>>>>> lcd_refresh : REFRESH_PRE! \n"); - break; - - case REFRESH_END: //DMA´«ËͽáÊøºó - { - s1d13521_ioctl_cmd_params cmd_params; - unsigned mode = WF_MODE_GC; - unsigned cmd = UPD_FULL; - - s1d13521if_cmd(LD_IMG_END,&cmd_params,0); - - cmd_params.param[0] = (mode<<8); - s1d13521if_cmd(cmd,&cmd_params,1); // update all pixels - - s1d13521if_cmd(WAIT_DSPE_TRG,&cmd_params,0); - s1d13521if_cmd(WAIT_DSPE_FREND,&cmd_params,0); - } - printk(">>>>>> lcd_refresh : REFRESH_END! \n"); - break; - - default: - break; - } - - mcu_ioctl(MCU_SETBYPASS, 0); - - return 0; -} - - - -void set_lcd_info(struct rk28fb_screen *screen) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - screen->mcu_wrperiod = P_WR; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = s1d13521if_init; - screen->standby = s1d13521if_standby; - screen->refresh = s1d13521if_refresh; -} - - - - diff --git a/drivers/video/rockchip/screen/lcd_td043mgea1.c b/drivers/video/rockchip/screen/lcd_td043mgea1.c deleted file mode 100644 index aa007892fbda..000000000000 --- a/drivers/video/rockchip/screen/lcd_td043mgea1.c +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __LCD_TD043MGEA__ -#define __LCD_TD043MGEA__ - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_P888 -#define DCLK 27000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 206 -#define H_VD 800 -#define H_FP 40 - -#define V_PW 10 -#define V_BP 25 -#define V_VD 480 -#define V_FP 10 - -#define LCD_WIDTH 800 //need modify -#define LCD_HEIGHT 480 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_DUMMY 0 -#define SWAP_GB 0 -#define SWAP_RG 0 - - - -#endif - diff --git a/drivers/video/rockchip/screen/lcd_tj048nc01ca.c b/drivers/video/rockchip/screen/lcd_tj048nc01ca.c deleted file mode 100755 index e93a083899cb..000000000000 --- a/drivers/video/rockchip/screen/lcd_tj048nc01ca.c +++ /dev/null @@ -1,173 +0,0 @@ -#ifndef LCD_TJ048NC01CA_H_ -#define LCD_TJ048NC01CA_H_ -#include -#include -#include - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P888 -#define DCLK 23000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 1 -#define H_BP 120 -#define H_VD 800 -#define H_FP 20 - -#define V_PW 1 -#define V_BP 20 -#define V_VD 480 -#define V_FP 4 - -#define LCD_WIDTH 800 //need modify -#define LCD_HEIGHT 480 - -/* Other */ -#define DCLK_POL 1 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#define TXD_PORT gLcd_info->txd_pin -#define CLK_PORT gLcd_info->clk_pin -#define CS_PORT gLcd_info->cs_pin - -#define CS_OUT() gpio_direction_output(CS_PORT, 0) -#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH) -#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW) -#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) -#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH) -#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW) -#define TXD_OUT() gpio_direction_output(TXD_PORT, 0) -#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH) -#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW) - -#define DRVDelayUs(i) udelay(i*2) - -static struct rk29lcd_info *gLcd_info = NULL; -#define RK_SCREEN_INIT -int rk_lcd_init(void); -int rk_lcd_standby(u8 enable); - -void spi_screenreg_set(u32 Addr, u32 Data) -{ - u32 i; - - TXD_OUT(); - CLK_OUT(); - CS_OUT(); - DRVDelayUs(2); - DRVDelayUs(2); - - CS_SET(); - TXD_CLR(); - CLK_CLR(); - DRVDelayUs(2); - - CS_CLR(); - for(i = 0; i < 7; i++) //reg - { - if(Addr &(1<<(6-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - TXD_CLR(); //write - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - - for(i = 0; i < 8; i++) //data - { - if(Data &(1<<(7-i))) - TXD_SET(); - else - TXD_CLR(); - - // \u6a21\u62dfCLK - CLK_CLR(); - DRVDelayUs(2); - CLK_SET(); - DRVDelayUs(2); - } - - CS_SET(); - CLK_CLR(); - TXD_CLR(); - DRVDelayUs(2); - -} - - -int rk_lcd_init(void) -{ - if(gLcd_info) - gLcd_info->io_init(); - //R(0xess (A5~A0) Data(D7~D0) -#if 0 - spi_screenreg_set(0x03, 0x86); - spi_screenreg_set(0x05, 0x33); - spi_screenreg_set(0x09, 0xFF); - spi_screenreg_set(0x3A, 0x95); - spi_screenreg_set(0x3C, 0xE0); - spi_screenreg_set(0x3D, 0xF4); - spi_screenreg_set(0x3E, 0x21); - spi_screenreg_set(0x3F, 0x87); - spi_screenreg_set(0x15, 0x55); - spi_screenreg_set(0x16, 0xAF); - spi_screenreg_set(0x17, 0xFC); - spi_screenreg_set(0x18, 0x00); - spi_screenreg_set(0x19, 0x4B); - spi_screenreg_set(0x1A, 0x80); - spi_screenreg_set(0x1B, 0xFF); - spi_screenreg_set(0x1C, 0x39); - spi_screenreg_set(0x1D, 0x69); - spi_screenreg_set(0x1E, 0x9F); - spi_screenreg_set(0x1F, 0x09); - spi_screenreg_set(0x20, 0x8F); - spi_screenreg_set(0x21, 0xF0); - spi_screenreg_set(0x22, 0x2B); - spi_screenreg_set(0x23, 0x58); - spi_screenreg_set(0x24, 0x7C); - spi_screenreg_set(0x25, 0xA5); - spi_screenreg_set(0x26, 0xFF); -#endif - - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} - -int rk_lcd_standby(u8 enable) -{ - if(gLcd_info) - gLcd_info->io_init(); - if(enable) { - spi_screenreg_set(0x43, 0x20); - } else { - spi_screenreg_set(0x43, 0xE0); - } - if(gLcd_info) - gLcd_info->io_deinit(); - return 0; -} -#endif - diff --git a/drivers/video/rockchip/screen/lcd_tl5001_mipi.c b/drivers/video/rockchip/screen/lcd_tl5001_mipi.c deleted file mode 100644 index b9b4135d1a46..000000000000 --- a/drivers/video/rockchip/screen/lcd_tl5001_mipi.c +++ /dev/null @@ -1,406 +0,0 @@ -/* - * Copyright (C) 2012 ROCKCHIP, Inc. - * - * author: hhb@rock-chips.com - * creat date: 2012-04-19 - * route:drivers/video/display/screen/lcd_hj050na_06a.c - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include "../transmitter/tc358768.h" - -/* Base */ -#define OUT_TYPE SCREEN_RGB -#define OUT_FACE OUT_P888 -#define BYTE_PP 3 //bytes per pixel - - -#define OUT_CLK 65000000 // in fact it is 61384615 -#define LCDC_ACLK 300000000 - -/* Timing */ -#define H_PW 10 -#define H_BP 20 -#define H_VD 720 -#define H_FP 82 - -#define V_PW 8 -#define V_BP 6 -#define V_VD 1280 -#define V_FP 4 - - -#define LCD_WIDTH 62 //uint mm the lenth of lcd active area -#define LCD_HEIGHT 111 -/* Other */ -#define VSYNC_POL 0 -#define HSYNC_POL VSYNC_POL -#define DCLK_POL 1 -#define DEN_POL 0 //positive -#define SWAP_RB 0 - - -#define LCD_TEST 0 -#define CONFIG_DEEP_STANDBY_MODE 0 -#define CONFIG_TC358768_INIT_MODE 0 //1:ARRAY 0:FUNCTION - -#define dsi_init(data) mipi_dsi.dsi_init(data, ARRAY_SIZE(data)) -#define dsi_send_dcs_packet(data) mipi_dsi.dsi_send_dcs_packet(data, ARRAY_SIZE(data)) -#define dsi_hs_start(data) mipi_dsi.dsi_hs_start(data, ARRAY_SIZE(data)) - -#define lap_define ktime_t k0,k1; -#define lap_start k0 = ktime_get(); -#define lap_end { k1 = ktime_get(); k1 = ktime_sub(k1, k0); } - -static struct rk29lcd_info *gLcd_info = NULL; -struct mipi_dsi_t mipi_dsi; -struct tc358768_t *lcd_tc358768 = NULL; - -int lcd_init(void); -int lcd_standby(u8 enable); - - -#if CONFIG_TC358768_INIT_MODE -struct spi_cmd_data32 { - unsigned int delay; - unsigned int value; -}; - -struct spi_cmd_data32 TC358768XBG_INIT[] = { - - {0xffffffff, 0xffffffff} -}; - -#else - -//high speed mode -static unsigned int re_initialize[] = { - - -}; - -static unsigned int initialize[] = { -// ************************************************** -// Initizlize -> Display On after power-on -// ************************************************** -// ************************************************** -// Power on TC358768XBG according to recommended power-on sequence -// Relase reset (RESX="H") -// Start input REFCK and PCLK -// ************************************************** -// ************************************************** -// TC358768XBG Software Reset -// ************************************************** - 0x00020001, //SYSctl, S/W Reset - 10, - 0x00020000, //SYSctl, S/W Reset release - -// ************************************************** -// TC358768XBG PLL,Clock Setting -// ************************************************** - 0x00161063, //PLL Control Register 0 (PLL_PRD,PLL_FBD) - 0x00180603, //PLL_FRS,PLL_LBWS, PLL oscillation enable - 1000, - 0x00180613, //PLL_FRS,PLL_LBWS, PLL clock out enable - -// ************************************************** -// TC358768XBG DPI Input Control -// ************************************************** - 0x00060032, //FIFO Control Register - -// ************************************************** -// TC358768XBG D-PHY Setting -// ************************************************** - 0x01400000, //D-PHY Clock lane enable - 0x01420000, // - 0x01440000, //D-PHY Data lane0 enable - 0x01460000, // - 0x01480000, //D-PHY Data lane1 enable - 0x014A0000, // - 0x014C0000, //D-PHY Data lane2 enable - 0x014E0000, // - 0x01500000, //D-PHY Data lane3 enable - 0x01520000, // - -// ************************************************** -// TC358768XBG DSI-TX PPI Control -// ************************************************** - 0x021009C4, //LINEINITCNT - 0x02120000, // - 0x02140002, //LPTXTIMECNT - 0x02160000, // - 0x02200002, //THS_HEADERCNT - 0x02220000, // - 0x02244268, //TWAKEUPCNT - 0x02260000, // - 0x022C0001, //THS_TRAILCNT - 0x022E0000, // - 0x02300005, //HSTXVREGCNT - 0x02320000, // - 0x0234001F, //HSTXVREGEN enable - 0x02360000, // - 0x02380001, //DSI clock Enable/Disable during LP - 0x023A0000, // - 0x023C0001, //BTACNTRL1 - 0x023E0002, // - 0x02040001, //STARTCNTRL - 0x02060000, // - -// ************************************************** -// TC358768XBG DSI-TX Timing Control -// ************************************************** - 0x06200001, //Sync Pulse/Sync Event mode setting - 0x0622000E, //V Control Register1 - 0x06240006, //V Control Register2 - 0x06260500, //V Control Register3 - 0x0628005E, //H Control Register1 - 0x062A003F, //H Control Register2 - 0x062C0870, //H Control Register3 - - 0x05180001, //DSI Start - 0x051A0000, // - -}; - - - -static unsigned int start_dsi_hs_mode[] = { - -// ************************************************** -// Set to HS mode -// ************************************************** - 0x05000087, //DSI lane setting, DSI mode=HS - 0x0502A300, //bit set - 0x05008000, //Switch to DSI mode - 0x0502C300, // - -// ************************************************** -// Host: RGB(DPI) input start -// ************************************************** - - 0x00080037, //DSI-TX Format setting - 0x0050003E, //DSI-TX Pixel stream packet Data Type setting - 0x00040044 //Configuration Control Register - - -}; - -#endif - -static unsigned char boe_set_extension_command[] = {0xB9, 0xFF, 0x83, 0x94}; -static unsigned char boe_set_MIPI_ctrl[] = {0xBA, 0x13}; -static unsigned char boe_set_power[] = {0xB1, 0x7C, 0x00, 0x34, 0x09, 0x01, 0x11, 0x11, 0x36, 0x3E, 0x26, 0x26, 0x57, 0x12, 0x01, 0xE6}; -static unsigned char boe_setcyc[] = {0xB4, 0x00, 0x00, 0x00, 0x05, 0x06, 0x41, 0x42, 0x02, 0x41, 0x42, 0x43, 0x47, 0x19, 0x58, - 0x60, 0x08, 0x85, 0x10}; -static unsigned char boe_config05[] = {0xC7, 0x00, 0x20}; -static unsigned char boe_set_gip[] = {0xD5,0x4C,0x01,0x00,0x01,0xCD,0x23,0xEF,0x45,0x67,0x89,0xAB,0x11,0x00,0xDC,0x10,0xFE,0x32, - 0xBA,0x98,0x76,0x54,0x00,0x11,0x40}; - -//static unsigned char boe_set_panel[] = {0xCC, 0x01}; -//static unsigned char boe_set_vcom[] = {0xB6, 0x2a}; -static unsigned char boe_set_panel[] = {0xCC, 0x05}; -static unsigned char boe_set_vcom[] = {0xB6, 0x31}; - -static unsigned char boe_set_gamma[] = {0xE0,0x24,0x33,0x36,0x3F,0x3f,0x3f,0x3c,0x56,0x05,0x0C,0x0e,0x11,0x13,0x12,0x14,0x12,0x1e, - 0x24,0x33,0x36,0x3F,0x3f,0x3F,0x3c,0x56,0x05,0x0c, 0x0e,0x11,0x13,0x12,0x14,0x12, 0x1e}; // -static unsigned char boe_set_addr_mode[] = {0x36, 0x00}; -static unsigned char boe_set_pixel[] = {0x3a, 0x60}; - -static unsigned char boe_enter_sleep_mode[] = {0x10}; -static unsigned char boe_exit_sleep_mode[] = {0x11}; -static unsigned char boe_set_diaplay_on[] = {0x29}; -static unsigned char boe_set_diaplay_off[] = {0x28}; -static unsigned char boe_enter_invert_mode[] = {0x21}; -static unsigned char boe_all_pixel_on[] = {0x23}; -static unsigned char boe_set_id[] = {0xc3, 0xaa, 0x55, 0xee}; - - -void lcd_power_on(void) { - - -} - -void lcd_power_off(void) { - - -} -#if LCD_TEST -void lcd_test(void) { - u8 buf[8]; - printk("**mipi lcd test\n"); - buf[0] = 0x0c; - mipi_dsi.dsi_read_dcs_packet(buf, 1); - printk("**Get_pixel_format 0x0c:%02x\n", buf[0]); - buf[0] = 0x0a; - mipi_dsi.dsi_read_dcs_packet(buf, 1); - printk("**Get_power_mode 0x0a:%02x\n", buf[0]); - buf[0] = 0x0f; - mipi_dsi.dsi_read_dcs_packet(buf, 1); - printk("**Get_diagnostic_result 0x0f:%02x\n", buf[0]); - buf[0] = 0x09; - mipi_dsi.dsi_read_dcs_packet(buf, 4); - printk("**Read Display Status 0x09:%02x,%02x,%02x,%02x\n", buf[0],buf[1],buf[2],buf[3]); -} -#endif - - - -static unsigned char boe_set_wrdisbv[] = {0x51, 0xff}; -static unsigned char boe_set_wrctrld[] = {0x53, 0x24}; -static unsigned char boe_set_wrcabc[] = {0x55, 0x02}; -static unsigned char boe_set_wrcabcmb[] = {0x5e, 0x0}; -static unsigned char boe_set_cabc[] = {0xc9, 0x0d, 0x01, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0}; -static unsigned char boe_set_cabc_gain[] = {0xca, 0x32, 0x2e, 0x2c, 0x2a, 0x28, 0x26, 0x24, 0x22, 0x20}; - - -void lcd_cabc(u8 brightness) { - -} - - - -int lcd_init(void) -{ - - int i = 0; - lap_define - //power on - lcd_tc358768->power_up(NULL); - - if(gLcd_info) - gLcd_info->io_init(); - - i = 0; - lap_start - //Re-Initialize -#if CONFIG_TC358768_INIT_MODE - i = 0; - while (1) { - if(TC358768XBG_INIT[i].delay == 0xffffffff) - break; - tc358768_wr_reg_32bits_delay(TC358768XBG_INIT[i].delay, TC358768XBG_INIT[i].value); - i++; - } -#else - dsi_init(initialize); - - - //lcd init - dsi_send_dcs_packet(boe_exit_sleep_mode); - msleep(150); - dsi_send_dcs_packet(boe_set_extension_command); - msleep(1); - dsi_send_dcs_packet(boe_set_MIPI_ctrl); - msleep(1); - dsi_send_dcs_packet(boe_set_power); - msleep(1); - dsi_send_dcs_packet(boe_setcyc); - msleep(1); - dsi_send_dcs_packet(boe_set_vcom); - msleep(1); - dsi_send_dcs_packet(boe_set_panel); - msleep(1); - dsi_send_dcs_packet(boe_set_gip); - msleep(1); - dsi_send_dcs_packet(boe_set_gamma); - msleep(1); - dsi_send_dcs_packet(boe_set_addr_mode); - msleep(1); - dsi_send_dcs_packet(boe_set_diaplay_on); -#if LCD_TEST - lcd_test(); -#endif - dsi_hs_start(start_dsi_hs_mode); - - msleep(10); -#endif - lap_end - printk(">>time:%lld\n", k1.tv64); - return 0; - -} - -int lcd_standby(u8 enable) -{ - //int ret = 0; - if(enable) { - - printk("suspend lcd\n"); - //power down - if(gLcd_info) - gLcd_info->io_deinit(); - - lcd_tc358768->power_down(NULL); - - } else { - lcd_init(); - } - - return 0; -} - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - /* Pin polarity */ - screen->pin_hsync = HSYNC_POL; - screen->pin_vsync = VSYNC_POL; - screen->pin_den = DEN_POL; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = lcd_init; - screen->standby = lcd_standby; - - if(lcd_info) - gLcd_info = lcd_info; - - if(tc358768_init(&mipi_dsi) == 0) - lcd_tc358768 = (struct tc358768_t *)mipi_dsi.chip; - else - printk("%s: %s:%d",__FILE__, __func__, __LINE__); - -} diff --git a/drivers/video/rockchip/screen/lcd_tx23d88vm.c b/drivers/video/rockchip/screen/lcd_tx23d88vm.c deleted file mode 100755 index edb1f435b7fe..000000000000 --- a/drivers/video/rockchip/screen/lcd_tx23d88vm.c +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _LCD_TX23D88VM_H_ -#define _LCD_TX23D88VM_H_ - - -/* Base */ -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_D888_P666 -#define DCLK 66000000//64000000 -#define LCDC_ACLK 500000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 20 -#define H_VD 1200 -#define H_FP 70 - -#define V_PW 2 -#define V_BP 4 -#define V_VD 800 -#define V_FP 14 - -#define LCD_WIDTH 188 -#define LCD_HEIGHT 125 -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - - -#endif diff --git a/drivers/video/rockchip/screen/lcd_wy_800x480.c b/drivers/video/rockchip/screen/lcd_wy_800x480.c deleted file mode 100755 index 923685866fa5..000000000000 --- a/drivers/video/rockchip/screen/lcd_wy_800x480.c +++ /dev/null @@ -1,68 +0,0 @@ - -#ifndef _LCD_WY__ -#define _LCD_WY__ - -#include -#include -#include -#include - -/* Base */ -#define LCD_WIDTH 154 //need modify -#define LCD_HEIGHT 85 - -#define SCREEN_TYPE SCREEN_RGB -#define LVDS_FORMAT LVDS_8BIT_1 -#define OUT_FACE OUT_P666 -#define DCLK 33000000 -#define LCDC_ACLK 150000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 30 -#define H_BP 16 -#define H_VD 800 -#define H_FP 210 - -#define V_PW 13 -#define V_BP 10 -#define V_VD 480 -#define V_FP 22 - -/* Other */ -#define DCLK_POL 0 -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -static struct rk29lcd_info *gLcd_info = NULL; -#define RK_SCREEN_INIT -static int rk_lcd_init(void) -{ - int ret = 0; - - if(gLcd_info && gLcd_info->io_init) - gLcd_info->io_init(); - - return 0; -} - -static int rk_lcd_standby(u8 enable) -{ - if(!enable) - { - if(gLcd_info && gLcd_info->io_enable) - gLcd_info->io_enable(); - } - else - { - if(gLcd_info && gLcd_info->io_disable) - gLcd_info->io_disable(); - } - return 0; -} - -#endif diff --git a/drivers/video/rockchip/screen/rk_screen.c b/drivers/video/rockchip/screen/rk_screen.c index 277af32403b7..5579d2807738 100644 --- a/drivers/video/rockchip/screen/rk_screen.c +++ b/drivers/video/rockchip/screen/rk_screen.c @@ -1,369 +1,65 @@ #include +#include #include "lcd.h" -#if defined(CONFIG_MACH_RK_FAC) -#include -extern uint lcd_param[LCD_PARAM_MAX]; -#endif - - - -// if we use one lcdc with jetta for dual display,we need these configration -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF) && defined(CONFIG_RK_HDMI) -static int set_scaler_info(struct rk_screen *screen, u8 hdmi_resolution) +static struct rk_screen *rk_screen; +int rk_fb_get_prmry_screen(struct rk_screen *screen) { - #if defined(CONFIG_RK610_LVDS) - screen->s_clk_inv = S_DCLK_POL; - screen->s_den_inv = 0; - screen->s_hv_sync_inv = 0; - #endif - - switch(hdmi_resolution) - { - case HDMI_1920x1080p_60Hz: - /* Scaler Timing */ - #if defined(CONFIG_RK610_LVDS) - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S_OUT_CLK; - screen->s_hsync_len = S_H_PW; - screen->s_left_margin = S_H_BP; - screen->s_right_margin = S_H_FP; - screen->s_hsync_len = S_H_PW; - screen->s_upper_margin = S_V_BP; - screen->s_lower_margin = S_V_FP; - screen->s_vsync_len = S_V_PW; - screen->s_hsync_st = S_H_ST; - screen->s_vsync_st = S_V_ST; - #endif - - //bellow are for JettaB - #if defined(CONFIG_RK616_LVDS) - screen->pll_cfg_val = S_PLL_CFG_VAL; - screen->frac = S_FRAC; - screen->scl_vst = S_SCL_VST; - screen->scl_hst = S_SCL_HST; - screen->vif_vst = S_VIF_VST; - screen->vif_hst = S_VIF_HST; - #endif - break; - case HDMI_1920x1080p_50Hz: - /* Scaler Timing */ - #if defined(CONFIG_RK610_LVDS) - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S1_OUT_CLK; - screen->s_hsync_len = S1_H_PW; - screen->s_left_margin = S1_H_BP; - screen->s_right_margin = S1_H_FP; - screen->s_hsync_len = S1_H_PW; - screen->s_upper_margin = S1_V_BP; - screen->s_lower_margin = S1_V_FP; - screen->s_vsync_len = S1_V_PW; - screen->s_hsync_st = S1_H_ST; - screen->s_vsync_st = S1_V_ST; - #endif - - #if defined(CONFIG_RK616_LVDS) - screen->pll_cfg_val = S1_PLL_CFG_VAL; - screen->frac = S1_FRAC; - screen->scl_vst = S1_SCL_VST; - screen->scl_hst = S1_SCL_HST; - screen->vif_vst = S1_VIF_VST; - screen->vif_hst = S1_VIF_HST; - #endif - break; - case HDMI_1280x720p_60Hz: - /* Scaler Timing */ - #if defined(CONFIG_RK610_LVDS) - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S2_OUT_CLK; - screen->s_hsync_len = S2_H_PW; - screen->s_left_margin = S2_H_BP; - screen->s_right_margin = S2_H_FP; - screen->s_hsync_len = S2_H_PW; - screen->s_upper_margin = S2_V_BP; - screen->s_lower_margin = S2_V_FP; - screen->s_vsync_len = S2_V_PW; - screen->s_hsync_st = S2_H_ST; - screen->s_vsync_st = S2_V_ST; - #endif - - #if defined(CONFIG_RK616_LVDS) - screen->pll_cfg_val = S2_PLL_CFG_VAL; - screen->frac = S2_FRAC; - screen->scl_vst = S2_SCL_VST; - screen->scl_hst = S2_SCL_HST; - screen->vif_vst = S2_VIF_VST; - screen->vif_hst = S2_VIF_HST; - #endif - break; - case HDMI_1280x720p_50Hz: - /* Scaler Timing */ - #if defined(CONFIG_RK610_LVDS) - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S3_OUT_CLK; - screen->s_hsync_len = S3_H_PW; - screen->s_left_margin = S3_H_BP; - screen->s_right_margin = S3_H_FP; - screen->s_hsync_len = S3_H_PW; - screen->s_upper_margin = S3_V_BP; - screen->s_lower_margin = S3_V_FP; - screen->s_vsync_len = S3_V_PW; - screen->s_hsync_st = S3_H_ST; - screen->s_vsync_st = S3_V_ST; - #endif - - #if defined(CONFIG_RK616_LVDS) - screen->pll_cfg_val = S3_PLL_CFG_VAL; - screen->frac = S3_FRAC; - screen->scl_vst = S3_SCL_VST; - screen->scl_hst = S3_SCL_HST; - screen->vif_vst = S3_VIF_VST; - screen->vif_hst = S3_VIF_HST; - #endif - break; - case HDMI_720x576p_50Hz_4_3: - case HDMI_720x576p_50Hz_16_9: - /* Scaler Timing */ - #if defined(CONFIG_RK610_LVDS) - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S4_OUT_CLK; - screen->s_hsync_len = S4_H_PW; - screen->s_left_margin = S4_H_BP; - screen->s_right_margin = S4_H_FP; - screen->s_hsync_len = S4_H_PW; - screen->s_upper_margin = S4_V_BP; - screen->s_lower_margin = S4_V_FP; - screen->s_vsync_len = S4_V_PW; - screen->s_hsync_st = S4_H_ST; - screen->s_vsync_st = S4_V_ST; - #endif - - #if defined(CONFIG_RK616_LVDS) - screen->pll_cfg_val = S4_PLL_CFG_VAL; - screen->frac = S4_FRAC; - screen->scl_vst = S4_SCL_VST; - screen->scl_hst = S4_SCL_HST; - screen->vif_vst = S4_VIF_VST; - screen->vif_hst = S4_VIF_HST; - #endif - break; - - case HDMI_720x480p_60Hz_16_9: - case HDMI_720x480p_60Hz_4_3: - /* Scaler Timing */ - #if defined(CONFIG_RK610_LVDS) - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S5_OUT_CLK; - screen->s_hsync_len = S5_H_PW; - screen->s_left_margin = S5_H_BP; - screen->s_right_margin = S5_H_FP; - screen->s_hsync_len = S5_H_PW; - screen->s_upper_margin = S5_V_BP; - screen->s_lower_margin = S5_V_FP; - screen->s_vsync_len = S5_V_PW; - screen->s_hsync_st = S5_H_ST; - screen->s_vsync_st = S5_V_ST; - #endif - - #if defined(CONFIG_RK616_LVDS) - screen->pll_cfg_val = S5_PLL_CFG_VAL; - screen->frac = S5_FRAC; - screen->scl_vst = S5_SCL_VST; - screen->scl_hst = S5_SCL_HST; - screen->vif_vst = S5_VIF_VST; - screen->vif_hst = S5_VIF_HST; - #endif - break; - default : - printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); - return -1; - break; - } - + memcpy(screen, rk_screen, sizeof(struct rk_screen)); return 0; } -#else -#define set_scaler_info NULL -#endif - -void set_lcd_info(struct rk_screen *screen, struct rk29lcd_info *lcd_info ) -{ - -#if defined(RK_USE_SCREEN_ID) - set_lcd_info_by_id(screen,lcd_info); -#else - #if defined(CONFIG_MACH_RK_FAC) - screen->type = lcd_param[OUT_TYPE_INDEX]; - screen->face = lcd_param[OUT_FACE_INDEX]; - screen->lvds_format = lcd_param[LVDS_FORMAT_INDEX]; //lvds data format - - - screen->x_res = lcd_param[H_VD_INDEX]; - screen->y_res = lcd_param[V_VD_INDEX]; - - screen->width = lcd_param[LCD_WIDTH_INDEX]; - screen->height = lcd_param[LCD_HEIGHT_INDEX]; - - - screen->lcdc_aclk = lcd_param[LCDC_ACLK_INDEX]; - screen->pixclock = lcd_param[OUT_CLK_INDEX]; - screen->left_margin = lcd_param[H_BP_INDEX]; - screen->right_margin = lcd_param[H_FP_INDEX]; - screen->hsync_len = lcd_param[H_PW_INDEX]; - screen->upper_margin = lcd_param[V_BP_INDEX]; - screen->lower_margin = lcd_param[V_FP_INDEX]; - screen->vsync_len = lcd_param[V_PW_INDEX]; - - - screen->pin_hsync = HSYNC_POL; //Pin polarity - screen->pin_vsync = VSYNC_POL; - screen->pin_den = DEN_POL; - screen->pin_dclk = lcd_param[DCLK_POL_INDEX]; - - - screen->swap_rb = lcd_param[SWAP_RB_INDEX]; - screen->swap_rg = SWAP_RG; - screen->swap_gb = SWAP_GB; - screen->swap_delta = 0; - screen->swap_dumy = 0; - #else - screen->type = SCREEN_TYPE; - screen->face = OUT_FACE; - screen->lvds_format = LVDS_FORMAT; //lvds data format - - - screen->x_res = H_VD; //screen resolution - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - screen->lcdc_aclk = LCDC_ACLK; // Timing - screen->pixclock = DCLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; +size_t get_fb_size(void) +{ - screen->pin_hsync = HSYNC_POL; //Pin polarity - screen->pin_vsync = VSYNC_POL; - screen->pin_den = DEN_POL; - screen->pin_dclk = DCLK_POL; - - - screen->swap_rb = SWAP_RB; // Swap rule - screen->swap_rg = SWAP_RG; - screen->swap_gb = SWAP_GB; - screen->swap_delta = 0; - screen->swap_dumy = 0; - #endif - -#if defined(CONFIG_MIPI_DSI) - /* MIPI DSI */ -#if defined(MIPI_DSI_LANE) - screen->dsi_lane = MIPI_DSI_LANE; -#else - screen->dsi_lane = 4; -#endif - //screen->dsi_video_mode = MIPI_DSI_VIDEO_MODE; -#if defined(MIPI_DSI_HS_CLK) - screen->hs_tx_clk = MIPI_DSI_HS_CLK; -#else - screen->hs_tx_clk = 1000000000; //1GHz -#endif - -#endif - - - /* Operation function*/ -#if defined(RK_SCREEN_INIT) //some screen need to init by spi or i2c - screen->init = rk_lcd_init; - screen->standby = rk_lcd_standby; - if(lcd_info) - gLcd_info = lcd_info; -#endif - -#if defined(USE_RK_DSP_LUT) - screen->dsp_lut = dsp_lut; -#endif - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF) - screen->sscreen_get = set_scaler_info; -#endif - -#endif - } -#if defined(CONFIG_MACH_RK_FAC) -size_t get_fb_size(void) +static int rk_screen_probe(struct platform_device *pdev) { - size_t size = 0; - char *pchar=NULL; - char lcdParam[]="lcd_param"; - char LcdWith[10]; - char LcdHigh[10]; - int mLcdWith,mLcdHigh; - int num=0,i; - int count=20; - pchar=strstr(boot_command_line,lcdParam); - memset(LcdWith,0,sizeof(char)*10); - memset(LcdHigh,0,sizeof(char)*10); - - if(pchar!=NULL) - { - do{ - if(count==13) - { - num=strcspn(pchar,","); - for(i=0;idev.of_node; + int ret; - num=strcspn(pchar,","); - pchar=pchar+num+1; - - }while(count--); - + if (!np) { + dev_err(&pdev->dev, "Missing device tree node.\n"); + return -EINVAL; } - - if((mLcdWith>0)&&(mLcdHigh>0)) - { - lcd_param[H_VD_INDEX]=mLcdWith; - lcd_param[V_VD_INDEX]=mLcdHigh; + rk_screen = devm_kzalloc(&pdev->dev, sizeof(struct rk_screen), GFP_KERNEL); + if (!rk_screen) { + dev_err(&pdev->dev, "kmalloc for rk screen fail!"); + return -ENOMEM; } - #if defined(CONFIG_THREE_FB_BUFFER) - size = ((lcd_param[H_VD_INDEX])*(lcd_param[V_VD_INDEX])<<2)* 3; //three buffer - #else - size = ((lcd_param[H_VD_INDEX])*(lcd_param[V_VD_INDEX])<<2)<<1; //two buffer - #endif - return ALIGN(size,SZ_1M); + ret = rk_fb_prase_timing_dt(np,rk_screen); + dev_info(&pdev->dev, "rockchip screen probe %s\n", + ret? "failed" : "success"); + return ret; } -#else -size_t get_fb_size(void) + +static const struct of_device_id rk_screen_dt_ids[] = { + { .compatible = "rockchip,screen", }, + {} +}; + +static struct platform_driver rk_screen_driver = { + .probe = rk_screen_probe, + .driver = { + .name = "rk-screen", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(rk_screen_dt_ids), + }, +}; + +static int __init rk_screen_init(void) { - size_t size = 0; - #if defined(CONFIG_THREE_FB_BUFFER) - size = ((H_VD)*(V_VD)<<2)* 3; //three buffer - #else - size = ((H_VD)*(V_VD)<<2)<<1; //two buffer - #endif - return ALIGN(size,SZ_1M); + return platform_driver_register(&rk_screen_driver); } -#endif + +static void __exit rk_screen_exit(void) +{ + platform_driver_unregister(&rk_screen_driver); +} + +subsys_initcall_sync(rk_screen_init); +module_exit(rk_screen_exit); + diff --git a/drivers/video/rockchip/screen/s1d13521.h b/drivers/video/rockchip/screen/s1d13521.h deleted file mode 100644 index edaf6292aac0..000000000000 --- a/drivers/video/rockchip/screen/s1d13521.h +++ /dev/null @@ -1,95 +0,0 @@ -/*=============================================================================== -** Generic Header information generated by 13521CFG.EXE (Build 4) -** (C)SEIKO EPSON CORPORATION 2002-2007. All rights reserved. -** -** DISPLAYS WxH FREQ SUBTYPE -** ------------- ----------- ------- ------------------------------------------- -** *LCD1=Parallel 800x600 NA EPD Panel -** -** DIMENSIONS WxHxBPP @ STRIDE START SADDR ADDITIONAL -** ----------- ---------------------- ------- --------- ----------------------- -** *Main 800x600x4 @ 800 NA 000EA600h LUTAuto=on -** -** CLOCKS FREQ SOURCE -** ------------- ----------- --------------------------------------------------- -** INCLK 132.000 MHz PLL -** SYSCLK 66.000 MHz PLL/2 -** PCLK 26.400 MHz PLL/5 -** SPICLK 13.200 MHz SYSCLK/5 -** I2CCLK 4.125 MHz PLL/16 -** SDRAMCLK 132.000 MHz PLL -** SDRAMREFCLK 63.954 KHz CLKI/516 -** -** This file defines the configuration environment and registers, -** which can be used by any software, such as display drivers. -** -** Note: If you transfer this file to any non-PC system, use ASCII -** mode (not BINARY) to maintain system-specific line terminators. -**===============================================================================*/ - -#define S1D_13521 - -#define S1D_DISPLAY_WIDTH 600 -#define S1D_DISPLAY_HEIGHT 800 - -#define S1D_DISPLAY_BPP 8 - -//#define S1D_DISPLAY_SCANLINE_BYTES 600 -#define S1D_DISPLAY_FRAME_RATE 0 -#define S1D_DISPLAY_PCLK 26400000L -#define S1D_PHYSICAL_REG_ADDR 0x00000000L -#define S1D_PHYSICAL_REG_SIZE 90L -#define S1D_PHYSICAL_VMEM_REQUIRED 640000L -#define S1D_PALETTE_SIZE 256 -#define S1D_POWER_DELAY_OFF 0 -#define S1D_POWER_DELAY_ON 0 -#define S1D_HWBLT -#define S1D_SWBLT - - -#define BS60_INIT_HSIZE 800 -#define BS60_INIT_VSIZE 600 - -#define BS60_INIT_FSLEN 4 -#define BS60_INIT_FBLEN 4 -#define BS60_INIT_FELEN 10 -#define BS60_INIT_LSLEN 10 -#define BS60_INIT_LBLEN 4 -#define BS60_INIT_LELEN 100 -#define BS60_INIT_PIXCLKDIV 6 -#define BS60_INIT_SDRV_CFG (100 | (1<< 8) | (1<<9)) -#define BS60_INIT_GDRV_CFG 0x2 -#define BS60_INIT_LUTIDXFMT (4 | (1<<7)) -#define BS60_INIT_ROTMODE 3 // rotation mode = 180 degrees - -#define WF_MODE_INIT 0 -#define WF_MODE_MU 1 -#define WF_MODE_GU 2 -#define WF_MODE_GC 3 -#define WF_MODE_PU 4 - -typedef unsigned short S1D_INDEX; -typedef unsigned short S1D_VALUE; - -#define S1D_INSTANTIATE_REGISTERS(scope_prefix,variable_name) \ - scope_prefix S1D_VALUE variable_name[] = \ - { \ - INIT_SYS_RUN, 0, \ - INIT_DSPE_CFG, 5, BS60_INIT_HSIZE, \ - BS60_INIT_VSIZE, \ - BS60_INIT_SDRV_CFG, \ - BS60_INIT_GDRV_CFG, \ - BS60_INIT_LUTIDXFMT, \ - INIT_DSPE_TMG, 5, BS60_INIT_FSLEN, \ - (BS60_INIT_FELEN<<8)|BS60_INIT_FBLEN, \ - BS60_INIT_LSLEN, \ - (BS60_INIT_LELEN<<8)|BS60_INIT_LBLEN, \ - BS60_INIT_PIXCLKDIV, \ - RD_WFM_INFO, 2, 0x0886, 0, \ - UPD_GDRV_CLR, 0, \ - WAIT_DSPE_TRG, 0, \ - INIT_ROTMODE, 1, (BS60_INIT_ROTMODE << 8) \ - } - - - diff --git a/drivers/video/rockchip/screen/s1d13521ioctl.h b/drivers/video/rockchip/screen/s1d13521ioctl.h deleted file mode 100644 index 3170b90d807e..000000000000 --- a/drivers/video/rockchip/screen/s1d13521ioctl.h +++ /dev/null @@ -1,134 +0,0 @@ -//----------------------------------------------------------------------------- -// -// linux/drivers/video/epson/s1d1352ioctl.h -- IOCTL definitions for Epson -// S1D13521 controller frame buffer driver. -// -// Copyright(c) Seiko Epson Corporation 2009. -// All rights reserved. -// -// This file is subject to the terms and conditions of the GNU General Public -// License. See the file COPYING in the main directory of this archive for -// more details. -// -//---------------------------------------------------------------------------- - -/* ioctls - 0x45 is 'E' */ - -struct s1d13521_ioctl_hwc -{ - unsigned addr; - unsigned value; - void* buffer; -}; - -#define S1D13521_REGREAD 0x4540 -#define S1D13521_REGWRITE 0x4541 -#define S1D13521_MEMBURSTREAD 0x4546 -#define S1D13521_MEMBURSTWRITE 0x4547 -#define S1D13521_VBUF_REFRESH 0x4548 - -// System commands -#define INIT_CMD_SET 0x00 -#define INIT_PLL_STANDBY 0x01 -#define RUN_SYS 0x02 -#define STBY 0x04 -#define SLP 0x05 -#define INIT_SYS_RUN 0x06 -#define INIT_SYS_STBY 0x07 -#define INIT_SDRAM 0x08 -#define INIT_DSPE_CFG 0x09 -#define INIT_DSPE_TMG 0x0A -#define INIT_ROTMODE 0x0B - -// Register and memory access commands -#define RD_REG 0x10 -#define WR_REG 0x11 -#define RD_SFM 0x12 -#define WR_SFM 0x13 -#define END_SFM 0x14 - -// Burst access commands -#define BST_RD_SDR 0x1C -#define BST_WR_SDR 0x1D -#define BST_END_SDR 0x1E - -// Image loading commands -#define LD_IMG 0x20 -#define LD_IMG_AREA 0x22 -#define LD_IMG_END 0x23 -#define LD_IMG_WAIT 0x24 -#define LD_IMG_SETADR 0x25 -#define LD_IMG_DSPEADR 0x26 - -// Polling commands -#define WAIT_DSPE_TRG 0x28 -#define WAIT_DSPE_FREND 0x29 -#define WAIT_DSPE_LUTFREE 0x2A -#define WAIT_DSPE_MLUTFREE 0x2B - -// Waveform update commands -#define RD_WFM_INFO 0x30 -#define UPD_INIT 0x32 -#define UPD_FULL 0x33 -#define UPD_FULL_AREA 0x34 -#define UPD_PART 0x35 -#define UPD_PART_AREA 0x36 -#define UPD_GDRV_CLR 0x37 -#define UPD_SET_IMGADR 0x38 - -#pragma pack(1) - -typedef struct -{ - u16 param[5]; -}s1d13521_ioctl_cmd_params; - -#pragma pack() - -#define S1D13521_INIT_CMD_SET (0x4500 | INIT_CMD_SET) -#define S1D13521_INIT_PLL_STANDBY (0x4500 | INIT_PLL_STANDBY) -#define S1D13521_RUN_SYS (0x4500 | RUN_SYS) -#define S1D13521_STBY (0x4500 | STBY) -#define S1D13521_SLP (0x4500 | SLP) -#define S1D13521_INIT_SYS_RUN (0x4500 | INIT_SYS_RUN) -#define S1D13521_INIT_SYS_STBY (0x4500 | INIT_SYS_STBY) -#define S1D13521_INIT_SDRAM (0x4500 | INIT_SDRAM) -#define S1D13521_INIT_DSPE_CFG (0x4500 | INIT_DSPE_CFG) -#define S1D13521_INIT_DSPE_TMG (0x4500 | INIT_DSPE_TMG) -#define S1D13521_INIT_ROTMODE (0x4500 | INIT_ROTMODE) -#define S1D13521_RD_REG (0x4500 | RD_REG) -#define S1D13521_WR_REG (0x4500 | WR_REG) -#define S1D13521_RD_SFM (0x4500 | RD_SFM) -#define S1D13521_WR_SFM (0x4500 | WR_SFM) -#define S1D13521_END_SFM (0x4500 | END_SFM) - -// Burst access commands -#define S1D13521_BST_RD_SDR (0x4500 | BST_RD_SDR) -#define S1D13521_BST_WR_SDR (0x4500 | BST_WR_SDR) -#define S1D13521_BST_END_SDR (0x4500 | BST_END_SDR) - -// Image loading IOCTL commands -#define S1D13521_LD_IMG (0x4500 | LD_IMG) -#define S1D13521_LD_IMG_AREA (0x4500 | LD_IMG_AREA) -#define S1D13521_LD_IMG_END (0x4500 | LD_IMG_END) -#define S1D13521_LD_IMG_WAIT (0x4500 | LD_IMG_WAIT) -#define S1D13521_LD_IMG_SETADR (0x4500 | LD_IMG_SETADR) -#define S1D13521_LD_IMG_DSPEADR (0x4500 | LD_IMG_DSPEADR) - -// Polling commands -#define S1D13521_WAIT_DSPE_TRG (0x4500 | WAIT_DSPE_TRG) -#define S1D13521_WAIT_DSPE_FREND (0x4500 | WAIT_DSPE_FREND) -#define S1D13521_WAIT_DSPE_LUTFREE (0x4500 | WAIT_DSPE_LUTFREE) -#define S1D13521_WAIT_DSPE_MLUTFREE (0x4500 | WAIT_DSPE_MLUTFREE) - -// Waveform update IOCTL commands -#define S1D13521_RD_WFM_INFO (0x4500 | RD_WFM_INFO) -#define S1D13521_UPD_INIT (0x4500 | UPD_INIT) -#define S1D13521_UPD_FULL (0x4500 | UPD_FULL) -#define S1D13521_UPD_FULL_AREA (0x4500 | UPD_FULL_AREA) -#define S1D13521_UPD_PART (0x4500 | UPD_PART) -#define S1D13521_UPD_PART_AREA (0x4500 | UPD_PART_AREA) -#define S1D13521_UPD_GDRV_CLR (0x4500 | UPD_GDRV_CLR) -#define S1D13521_UPD_SET_IMGADR (0x4500 | UPD_SET_IMGADR) - diff --git a/include/linux/rk_fb.h b/include/linux/rk_fb.h index ed2cb6d15607..7df7c8ff9a2b 100755 --- a/include/linux/rk_fb.h +++ b/include/linux/rk_fb.h @@ -326,6 +326,10 @@ struct rk_lcdc_win { struct rk_lcdc_driver; +struct rk_fb_trsm_ops { + int (*enable)(void); + int (*disable)(void); +}; struct rk_lcdc_drv_ops { int (*open) (struct rk_lcdc_driver * dev_drv, int layer_id, bool open); @@ -483,6 +487,7 @@ struct rk_lcdc_driver { struct rk29fb_info *screen_ctr_info; struct list_head pwrlist_head; struct rk_lcdc_drv_ops *ops; + struct rk_fb_trsm_ops *trsm_ops; }; @@ -509,6 +514,9 @@ struct rk_fb { }; + +extern int rk_fb_trsm_ops_register(struct rk_fb_trsm_ops *ops, int type); +extern struct rk_fb_trsm_ops * rk_fb_trsm_ops_get(int type); extern int rk_fb_register(struct rk_lcdc_driver *dev_drv, struct rk_lcdc_win *win, int id); extern int rk_fb_unregister(struct rk_lcdc_driver *dev_drv); @@ -519,6 +527,8 @@ extern int rk_disp_pwr_ctr_parse_dt(struct rk_lcdc_driver *dev_drv); extern int rk_disp_pwr_enable(struct rk_lcdc_driver *dev_drv); extern int rk_disp_pwr_disable(struct rk_lcdc_driver *dev_drv); extern bool is_prmry_rk_lcdc_registered(void); +extern int rk_fb_prase_timing_dt(struct device_node *np, + struct rk_screen *screen); static int inline support_uboot_display(void) { -- 2.34.1