From 32edbd74541a94a67716fe1d529bf87b9a7960fb Mon Sep 17 00:00:00 2001 From: David Greene Date: Tue, 5 Jan 2010 01:25:58 +0000 Subject: [PATCH] Change errs() to dbgs(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92592 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SimpleRegisterCoalescing.cpp | 127 +++++++++++------------ 1 file changed, 63 insertions(+), 64 deletions(-) diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 6314331482d..27d429b999e 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -183,16 +183,16 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, for (const unsigned* SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR) if (li_->hasInterval(*SR) && IntA.overlaps(li_->getInterval(*SR))) { DEBUG({ - errs() << "Interfere with sub-register "; - li_->getInterval(*SR).print(errs(), tri_); + dbgs() << "Interfere with sub-register "; + li_->getInterval(*SR).print(dbgs(), tri_); }); return false; } } DEBUG({ - errs() << "\nExtending: "; - IntB.print(errs(), tri_); + dbgs() << "\nExtending: "; + IntB.print(dbgs(), tri_); }); SlotIndex FillerStart = ValLR->end, FillerEnd = BLR->start; @@ -224,9 +224,9 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, IntB.MergeValueNumberInto(BValNo, ValLR->valno); } DEBUG({ - errs() << " result = "; - IntB.print(errs(), tri_); - errs() << "\n"; + dbgs() << " result = "; + IntB.print(dbgs(), tri_); + dbgs() << "\n"; }); // If the source instruction was killing the source register before the @@ -467,8 +467,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // We need to insert a new liverange: [ALR.start, LastUse). It may be we can // simply extend BLR if CopyMI doesn't end the range. DEBUG({ - errs() << "\nExtending: "; - IntB.print(errs(), tri_); + dbgs() << "\nExtending: "; + IntB.print(dbgs(), tri_); }); // Remove val#'s defined by copies that will be coalesced away. @@ -518,19 +518,19 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, ValNo->setHasPHIKill(BHasPHIKill); DEBUG({ - errs() << " result = "; - IntB.print(errs(), tri_); - errs() << '\n'; - errs() << "\nShortening: "; - IntA.print(errs(), tri_); + dbgs() << " result = "; + IntB.print(dbgs(), tri_); + dbgs() << '\n'; + dbgs() << "\nShortening: "; + IntA.print(dbgs(), tri_); }); IntA.removeValNo(AValNo); DEBUG({ - errs() << " result = "; - IntA.print(errs(), tri_); - errs() << '\n'; + dbgs() << " result = "; + IntA.print(dbgs(), tri_); + dbgs() << '\n'; }); ++numCommutes; @@ -1223,16 +1223,16 @@ SimpleRegisterCoalescing::CanJoinExtractSubRegToPhysReg(unsigned DstReg, if (li_->hasInterval(RealDstReg) && RHS.overlaps(li_->getInterval(RealDstReg))) { DEBUG({ - errs() << "Interfere with register "; - li_->getInterval(RealDstReg).print(errs(), tri_); + dbgs() << "Interfere with register "; + li_->getInterval(RealDstReg).print(dbgs(), tri_); }); return false; // Not coalescable } for (const unsigned* SR = tri_->getSubRegisters(RealDstReg); *SR; ++SR) if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) { DEBUG({ - errs() << "Interfere with sub-register "; - li_->getInterval(*SR).print(errs(), tri_); + dbgs() << "Interfere with sub-register "; + li_->getInterval(*SR).print(dbgs(), tri_); }); return false; // Not coalescable } @@ -1254,16 +1254,16 @@ SimpleRegisterCoalescing::CanJoinInsertSubRegToPhysReg(unsigned DstReg, if (li_->hasInterval(RealSrcReg) && RHS.overlaps(li_->getInterval(RealSrcReg))) { DEBUG({ - errs() << "Interfere with register "; - li_->getInterval(RealSrcReg).print(errs(), tri_); + dbgs() << "Interfere with register "; + li_->getInterval(RealSrcReg).print(dbgs(), tri_); }); return false; // Not coalescable } for (const unsigned* SR = tri_->getSubRegisters(RealSrcReg); *SR; ++SR) if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) { DEBUG({ - errs() << "Interfere with sub-register "; - li_->getInterval(*SR).print(errs(), tri_); + dbgs() << "Interfere with sub-register "; + li_->getInterval(*SR).print(dbgs(), tri_); }); return false; // Not coalescable } @@ -1293,7 +1293,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (JoinedCopies.count(CopyMI) || ReMatCopies.count(CopyMI)) return false; // Already done. - DEBUG(errs() << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI); + DEBUG(dbgs() << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI); unsigned SrcReg, DstReg, SrcSubIdx = 0, DstSubIdx = 0; bool isExtSubReg = CopyMI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG; @@ -1313,7 +1313,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (SrcSubIdx && SrcSubIdx != DstSubIdx) { // r1025 = INSERT_SUBREG r1025, r1024<2>, 2 Then r1024 has already been // coalesced to a larger register so the subreg indices cancel out. - DEBUG(errs() << "\tSource of insert_subreg or subreg_to_reg is already " + DEBUG(dbgs() << "\tSource of insert_subreg or subreg_to_reg is already " "coalesced to another register.\n"); return false; // Not coalescable. } @@ -1329,7 +1329,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // If they are already joined we continue. if (SrcReg == DstReg) { - DEBUG(errs() << "\tCopy already coalesced.\n"); + DEBUG(dbgs() << "\tCopy already coalesced.\n"); return false; // Not coalescable. } @@ -1338,17 +1338,17 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // If they are both physical registers, we cannot join them. if (SrcIsPhys && DstIsPhys) { - DEBUG(errs() << "\tCan not coalesce physregs.\n"); + DEBUG(dbgs() << "\tCan not coalesce physregs.\n"); return false; // Not coalescable. } // We only join virtual registers with allocatable physical registers. if (SrcIsPhys && !allocatableRegs_[SrcReg]) { - DEBUG(errs() << "\tSrc reg is unallocatable physreg.\n"); + DEBUG(dbgs() << "\tSrc reg is unallocatable physreg.\n"); return false; // Not coalescable. } if (DstIsPhys && !allocatableRegs_[DstReg]) { - DEBUG(errs() << "\tDst reg is unallocatable physreg.\n"); + DEBUG(dbgs() << "\tDst reg is unallocatable physreg.\n"); return false; // Not coalescable. } @@ -1362,7 +1362,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { DstSubRC = DstRC->getSubRegisterRegClass(DstSubIdx); assert(DstSubRC && "Illegal subregister index"); if (!DstSubRC->contains(SrcSubReg)) { - DEBUG(errs() << "\tIncompatible destination regclass: " + DEBUG(dbgs() << "\tIncompatible destination regclass: " << tri_->getName(SrcSubReg) << " not in " << DstSubRC->getName() << ".\n"); return false; // Not coalescable. @@ -1379,7 +1379,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { SrcSubRC = SrcRC->getSubRegisterRegClass(SrcSubIdx); assert(SrcSubRC && "Illegal subregister index"); if (!SrcSubRC->contains(DstSubReg)) { - DEBUG(errs() << "\tIncompatible source regclass: " + DEBUG(dbgs() << "\tIncompatible source regclass: " << tri_->getName(DstSubReg) << " not in " << SrcSubRC->getName() << ".\n"); (void)DstSubReg; @@ -1405,7 +1405,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // r1024<2> = EXTRACT_SUBREG EAX, 2. Then r1024 has already been // coalesced to a larger register so the subreg indices cancel out. if (DstSubIdx != SubIdx) { - DEBUG(errs() << "\t Sub-register indices mismatch.\n"); + DEBUG(dbgs() << "\t Sub-register indices mismatch.\n"); return false; // Not coalescable. } } else @@ -1418,7 +1418,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // EAX = INSERT_SUBREG EAX, r1024<2>, 2 Then r1024 has already been // coalesced to a larger register so the subreg indices cancel out. if (SrcSubIdx != SubIdx) { - DEBUG(errs() << "\t Sub-register indices mismatch.\n"); + DEBUG(dbgs() << "\t Sub-register indices mismatch.\n"); return false; // Not coalescable. } } else @@ -1427,7 +1427,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } else if ((DstIsPhys && isExtSubReg) || (SrcIsPhys && (isInsSubReg || isSubRegToReg))) { if (!isSubRegToReg && CopyMI->getOperand(1).getSubReg()) { - DEBUG(errs() << "\tSrc of extract_subreg already coalesced with reg" + DEBUG(dbgs() << "\tSrc of extract_subreg already coalesced with reg" << " of a super-class.\n"); return false; // Not coalescable. } @@ -1451,7 +1451,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // class as the would be resulting register. SubIdx = 0; else { - DEBUG(errs() << "\t Sub-register indices mismatch.\n"); + DEBUG(dbgs() << "\t Sub-register indices mismatch.\n"); return false; // Not coalescable. } } @@ -1463,7 +1463,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { NewRC = tri_->getMatchingSuperRegClass(SrcRC, DstRC, SubIdx); } if (!NewRC) { - DEBUG(errs() << "\t Conflicting sub-register indices.\n"); + DEBUG(dbgs() << "\t Conflicting sub-register indices.\n"); return false; // Not coalescable } @@ -1535,7 +1535,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } else if (!SrcIsPhys && !DstIsPhys) { NewRC = getCommonSubClass(SrcRC, DstRC); if (!NewRC) { - DEBUG(errs() << "\tDisjoint regclasses: " + DEBUG(dbgs() << "\tDisjoint regclasses: " << SrcRC->getName() << ", " << DstRC->getName() << ".\n"); return false; // Not coalescable. @@ -1551,7 +1551,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { (isExtSubReg || DstRC->isASubClass()) && !isWinToJoinCrossClass(LargeReg, SmallReg, allocatableRCRegs_[NewRC].count())) { - DEBUG(errs() << "\tSrc/Dest are different register classes.\n"); + DEBUG(dbgs() << "\tSrc/Dest are different register classes.\n"); // Allow the coalescer to try again in case either side gets coalesced to // a physical register that's compatible with the other side. e.g. // r1024 = MOV32to32_ r1025 @@ -1573,9 +1573,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { "Register mapping is horribly broken!"); DEBUG({ - errs() << "\t\tInspecting "; SrcInt.print(errs(), tri_); - errs() << " and "; DstInt.print(errs(), tri_); - errs() << ": "; + dbgs() << "\t\tInspecting "; SrcInt.print(dbgs(), tri_); + dbgs() << " and "; DstInt.print(dbgs(), tri_); + dbgs() << ": "; }); // Save a copy of the virtual register live interval. We'll manually @@ -1606,7 +1606,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (!isWinToJoinVRWithSrcPhysReg(CopyMI, CopyMBB, DstInt, SrcInt)) { mri_->setRegAllocationHint(DstInt.reg, 0, SrcReg); ++numAborts; - DEBUG(errs() << "\tMay tie down a physical register, abort!\n"); + DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n"); Again = true; // May be possible to coalesce later. return false; } @@ -1614,7 +1614,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (!isWinToJoinVRWithDstPhysReg(CopyMI, CopyMBB, DstInt, SrcInt)) { mri_->setRegAllocationHint(SrcInt.reg, 0, DstReg); ++numAborts; - DEBUG(errs() << "\tMay tie down a physical register, abort!\n"); + DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n"); Again = true; // May be possible to coalesce later. return false; } @@ -1635,7 +1635,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { mri_->use_end()) / Length) < Ratio)) { mri_->setRegAllocationHint(JoinVInt.reg, 0, JoinPReg); ++numAborts; - DEBUG(errs() << "\tMay tie down a physical register, abort!\n"); + DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n"); Again = true; // May be possible to coalesce later. return false; } @@ -1654,7 +1654,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // Only coalesce an empty interval (defined by implicit_def) with // another interval which has a valno defined by the CopyMI and the CopyMI // is a kill of the implicit def. - DEBUG(errs() << "Not profitable!\n"); + DEBUG(dbgs() << "Not profitable!\n"); return false; } @@ -1676,7 +1676,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } // Otherwise, we are unable to join the intervals. - DEBUG(errs() << "Interference!\n"); + DEBUG(dbgs() << "Interference!\n"); Again = true; // May be possible to coalesce later. return false; } @@ -1779,9 +1779,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } DEBUG({ - errs() << "\n\t\tJoined. Result = "; - ResDstInt->print(errs(), tri_); - errs() << "\n"; + dbgs() << "\n\t\tJoined. Result = "; + ResDstInt->print(dbgs(), tri_); + dbgs() << "\n"; }); ++numJoins; @@ -2134,8 +2134,8 @@ SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS, for (const unsigned* SR = tri_->getSubRegisters(LHS.reg); *SR; ++SR) if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) { DEBUG({ - errs() << "Interfere with sub-register "; - li_->getInterval(*SR).print(errs(), tri_); + dbgs() << "Interfere with sub-register "; + li_->getInterval(*SR).print(dbgs(), tri_); }); return false; } @@ -2151,8 +2151,8 @@ SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS, for (const unsigned* SR = tri_->getSubRegisters(RHS.reg); *SR; ++SR) if (li_->hasInterval(*SR) && LHS.overlaps(li_->getInterval(*SR))) { DEBUG({ - errs() << "Interfere with sub-register "; - li_->getInterval(*SR).print(errs(), tri_); + dbgs() << "Interfere with sub-register "; + li_->getInterval(*SR).print(dbgs(), tri_); }); return false; } @@ -2413,7 +2413,7 @@ namespace { void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB, std::vector &TryAgain) { - DEBUG(errs() << MBB->getName() << ":\n"); + DEBUG(dbgs() << MBB->getName() << ":\n"); std::vector VirtCopies; std::vector PhysCopies; @@ -2478,7 +2478,7 @@ void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB, } void SimpleRegisterCoalescing::joinIntervals() { - DEBUG(errs() << "********** JOINING INTERVALS ***********\n"); + DEBUG(dbgs() << "********** JOINING INTERVALS ***********\n"); std::vector TryAgainList; if (loopInfo->empty()) { @@ -2610,12 +2610,11 @@ SimpleRegisterCoalescing::lastRegisterUse(SlotIndex Start, return NULL; } - void SimpleRegisterCoalescing::printRegName(unsigned reg) const { if (TargetRegisterInfo::isPhysicalRegister(reg)) - errs() << tri_->getName(reg); + dbgs() << tri_->getName(reg); else - errs() << "%reg" << reg; + dbgs() << "%reg" << reg; } void SimpleRegisterCoalescing::releaseMemory() { @@ -2634,7 +2633,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { AA = &getAnalysis(); loopInfo = &getAnalysis(); - DEBUG(errs() << "********** SIMPLE REGISTER COALESCING **********\n" + DEBUG(dbgs() << "********** SIMPLE REGISTER COALESCING **********\n" << "********** Function: " << ((Value*)mf_->getFunction())->getName() << '\n'); @@ -2648,11 +2647,11 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { if (EnableJoining) { joinIntervals(); DEBUG({ - errs() << "********** INTERVALS POST JOINING **********\n"; + dbgs() << "********** INTERVALS POST JOINING **********\n"; for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I){ - I->second->print(errs(), tri_); - errs() << "\n"; + I->second->print(dbgs(), tri_); + dbgs() << "\n"; } }); } -- 2.34.1