From 34695381d626485a560594f162701088079589df Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Thu, 21 Apr 2005 20:59:05 +0000 Subject: [PATCH] Remove trailing whitespace git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21412 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/MRegisterInfo.h | 8 +- include/llvm/Target/TargetData.h | 14 +-- include/llvm/Target/TargetFrameInfo.h | 12 +-- include/llvm/Target/TargetInstrInfo.h | 34 +++---- include/llvm/Target/TargetJITInfo.h | 10 +-- include/llvm/Target/TargetLowering.h | 32 +++---- include/llvm/Target/TargetMachine.h | 16 ++-- include/llvm/Target/TargetMachineRegistry.h | 8 +- include/llvm/Target/TargetOptions.h | 4 +- include/llvm/Target/TargetSchedInfo.h | 90 +++++++++---------- include/llvm/Transforms/IPO.h | 6 +- include/llvm/Transforms/Instrumentation.h | 4 +- include/llvm/Transforms/LinkAllPasses.h | 4 +- include/llvm/Transforms/Scalar.h | 8 +- .../llvm/Transforms/Utils/BasicBlockUtils.h | 4 +- include/llvm/Transforms/Utils/Cloning.h | 12 +-- include/llvm/Transforms/Utils/FunctionUtils.h | 6 +- include/llvm/Transforms/Utils/Local.h | 4 +- .../llvm/Transforms/Utils/PromoteMemToReg.h | 4 +- .../Transforms/Utils/UnifyFunctionExitNodes.h | 4 +- 20 files changed, 142 insertions(+), 142 deletions(-) diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h index c3cc76888a5..945ed7dbc49 100644 --- a/include/llvm/Target/MRegisterInfo.h +++ b/include/llvm/Target/MRegisterInfo.h @@ -1,10 +1,10 @@ //===- Target/MRegisterInfo.h - Target Register Information -----*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes an abstract interface used to get information about a @@ -92,7 +92,7 @@ public: virtual iterator allocation_order_end(MachineFunction &MF) const { return end(); } - + /// getSize - Return the size of the register in bytes, which is also the size @@ -280,7 +280,7 @@ public: /// instructions. This method need only be implemented if using call frame /// setup/destroy pseudo instructions. /// - virtual void + virtual void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const { diff --git a/include/llvm/Target/TargetData.h b/include/llvm/Target/TargetData.h index eb4baa999c2..5d231c029f2 100644 --- a/include/llvm/Target/TargetData.h +++ b/include/llvm/Target/TargetData.h @@ -1,14 +1,14 @@ //===-- llvm/Target/TargetData.h - Data size & alignment info ---*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines target properties related to datatype size/offset/alignment -// information. It uses lazy annotations to cache information about how +// information. It uses lazy annotations to cache information about how // structure types are laid out and used. // // This structure should be created once, filled in if the defaults are not @@ -49,7 +49,7 @@ public: bool LittleEndian = false, unsigned char PtrSize = 8, unsigned char PtrAl = 8, unsigned char DoubleAl = 8, - unsigned char FloatAl = 4, unsigned char LongAl = 8, + unsigned char FloatAl = 4, unsigned char LongAl = 8, unsigned char IntAl = 4, unsigned char ShortAl = 2, unsigned char ByteAl = 1, unsigned char BoolAl = 1); @@ -67,7 +67,7 @@ public: PointerSize(TD.getPointerSize()), PointerAlignment(TD.getPointerAlignment()) { } - + TargetData(const std::string &ToolName, const Module *M); ~TargetData(); // Not virtual, do not subclass this class @@ -105,9 +105,9 @@ public: /// getIndexOffset - return the offset from the beginning of the type for the /// specified indices. This is used to implement getelementptr. /// - uint64_t getIndexedOffset(const Type *Ty, + uint64_t getIndexedOffset(const Type *Ty, const std::vector &Indices) const; - + const StructLayout *getStructLayout(const StructType *Ty) const; }; diff --git a/include/llvm/Target/TargetFrameInfo.h b/include/llvm/Target/TargetFrameInfo.h index bbaeafdcdfc..fc7fa042291 100644 --- a/include/llvm/Target/TargetFrameInfo.h +++ b/include/llvm/Target/TargetFrameInfo.h @@ -1,10 +1,10 @@ //===-- llvm/Target/TargetFrameInfo.h ---------------------------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // Interface to describe the layout of a stack frame on the target machine. @@ -67,13 +67,13 @@ public: /// fixed offset from the incoming stack pointer that each register should be /// spilled at. If a register is not listed here, the code generator is /// allowed to spill it anywhere it chooses. - /// + /// virtual const std::pair * getCalleeSaveSpillSlots(unsigned &NumEntries) const { NumEntries = 0; return 0; } - + //===--------------------------------------------------------------------===// // These methods provide details of the stack frame used by Sparc, thus they // are Sparc specific. @@ -87,12 +87,12 @@ public: // function. The frame contents are obtained from the MachineFunction object // for the given function. The rest must be implemented by the // machine-specific subclass. - // + // virtual int getIncomingArgOffset (MachineFunction& mcInfo, unsigned argNum) const; virtual int getOutgoingArgOffset (MachineFunction& mcInfo, unsigned argNum) const; - + virtual int getFirstAutomaticVarOffset (MachineFunction& mcInfo, bool& growUp) const; virtual int getRegSpillAreaOffset (MachineFunction& mcInfo, diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index d5237f2f7cc..35e2c97fc6f 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -1,10 +1,10 @@ //===-- llvm/Target/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the target machine instructions to the code generator. @@ -91,14 +91,14 @@ public: //--------------------------------------------------------------------------- -/// +/// /// TargetInstrInfo - Interface to description of machine instructions -/// +/// class TargetInstrInfo { const TargetInstrDescriptor* desc; // raw array to allow static init'n unsigned NumOpcodes; // number of entries in the desc array unsigned numRealOpCodes; // number of non-dummy op codes - + TargetInstrInfo(const TargetInstrInfo &); // DO NOT IMPLEMENT void operator=(const TargetInstrInfo &); // DO NOT IMPLEMENT public: @@ -107,9 +107,9 @@ public: // Invariant: All instruction sets use opcode #0 as the PHI instruction enum { PHI = 0 }; - + unsigned getNumOpcodes() const { return NumOpcodes; } - + /// get - Return the machine instruction descriptor that corresponds to the /// specified instruction opcode. /// @@ -121,7 +121,7 @@ public: const char *getName(MachineOpCode Opcode) const { return get(Opcode).Name; } - + int getNumOperands(MachineOpCode Opcode) const { return get(Opcode).numOperands; } @@ -143,7 +143,7 @@ public: // // Query instruction class flags according to the machine-independent // flags listed above. - // + // bool isReturn(MachineOpCode Opcode) const { return get(Opcode).Flags & M_RET_FLAG; } @@ -253,36 +253,36 @@ public: return true; } - // + // // Latencies for individual instructions and instruction pairs - // + // virtual int minLatency(MachineOpCode Opcode) const { return get(Opcode).latency; } - + virtual int maxLatency(MachineOpCode Opcode) const { return get(Opcode).latency; } // // Which operand holds an immediate constant? Returns -1 if none - // + // virtual int getImmedConstantPos(MachineOpCode Opcode) const { return -1; // immediate position is machine specific, so say -1 == "none" } - + // Check if the specified constant fits in the immediate field // of this machine instruction - // + // virtual bool constantFitsInImmedField(MachineOpCode Opcode, int64_t intValue) const; - + // Return the largest positive constant that can be held in the IMMED field // of this machine instruction. // isSignExtended is set to true if the value is sign-extended before use // (this is true for all immediate fields in SPARC instructions). // Return 0 if the instruction has no IMMED field. - // + // virtual uint64_t maxImmedConstant(MachineOpCode Opcode, bool &isSignExtended) const { isSignExtended = get(Opcode).immedIsSignExtended; diff --git a/include/llvm/Target/TargetJITInfo.h b/include/llvm/Target/TargetJITInfo.h index f126aaaf7a2..79c8eaa6187 100644 --- a/include/llvm/Target/TargetJITInfo.h +++ b/include/llvm/Target/TargetJITInfo.h @@ -1,10 +1,10 @@ //===- Target/TargetJITInfo.h - Target Information for JIT ------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file exposes an abstract interface used by the Just-In-Time code @@ -30,19 +30,19 @@ namespace llvm { class TargetJITInfo { public: virtual ~TargetJITInfo() {} - + /// addPassesToJITCompile - Add passes to the specified pass manager to /// implement a fast code generator for this target. /// virtual void addPassesToJITCompile(FunctionPassManager &PM) = 0; - + /// replaceMachineCodeForFunction - Make it so that calling the function /// whose machine code is at OLD turns into a call to NEW, perhaps by /// overwriting OLD with a branch to NEW. This is used for self-modifying /// code. /// virtual void replaceMachineCodeForFunction(void *Old, void *New) = 0; - + /// emitFunctionStub - Use the specified MachineCodeEmitter object to emit a /// small native function that simply calls the function at the specified /// address. Return the address of the resultant function. diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 347fe748392..5aa8ae1a606 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -1,10 +1,10 @@ //===-- llvm/Target/TargetLowering.h - Target Lowering Info -----*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes how to lower LLVM code to machine code. This has two @@ -70,7 +70,7 @@ public: TargetMachine &getTargetMachine() const { return TM; } const TargetData &getTargetData() const { return TD; } - + bool isLittleEndian() const { return IsLittleEndian; } MVT::ValueType getPointerTy() const { return PointerTy; } MVT::ValueType getShiftAmountTy() const { return ShiftAmountTy; } @@ -92,7 +92,7 @@ public: assert(RC && "This value type is not natively supported!"); return RC; } - + /// hasNativeSupportFor - Return true if the target has native support for the /// specified value type. This means that it has a register that directly /// holds it without promotions or expansions. @@ -117,7 +117,7 @@ public: MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const { return TransformToType[VT]; } - + typedef std::vector::const_iterator legal_fpimm_iterator; legal_fpimm_iterator legal_fpimm_begin() const { return LegalFPImmediates.begin(); @@ -126,11 +126,11 @@ public: return LegalFPImmediates.end(); } - /// getOperationAction - Return how this operation should be + /// getOperationAction - Return how this operation should be LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const { - return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3); + return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3); } - + /// hasNativeSupportForOperation - Return true if this operation is legal for /// this type. /// @@ -173,7 +173,7 @@ public: case Type::PointerTyID: return PointerTy; } } - + /// getNumElements - Return the number of registers that this ValueType will /// eventually require. This is always one for all non-integer types, is /// one for any types promoted to live in larger registers, but may be more @@ -206,7 +206,7 @@ protected: void setShiftAmountFlavor(OutOfRangeShiftAmount OORSA) { ShiftAmtHandling = OORSA; } - + /// addRegisterClass - Add the specified register class as an available /// regclass for the specified value type. This indicates the selector can /// handle values of that class natively. @@ -218,7 +218,7 @@ protected: /// computeRegisterProperties - Once all of the register classes are added, /// this allows us to compute derived properties we expose. void computeRegisterProperties(); - + /// setOperationAction - Indicate that the specified operation does not work /// with the specified type and indicate what to do about it. void setOperationAction(unsigned Op, MVT::ValueType VT, @@ -291,7 +291,7 @@ public: /// implement this. The default implementation of this aborts. virtual SDOperand LowerOperation(SDOperand Op); - + private: TargetMachine &TM; const TargetData &TD; @@ -299,7 +299,7 @@ private: /// IsLittleEndian - True if this is a little endian target. /// bool IsLittleEndian; - + /// PointerTy - The type to use for pointers, usually i32 or i64. /// MVT::ValueType PointerTy; @@ -327,7 +327,7 @@ private: /// value type, where the two bits correspond to the LegalizeAction enum. /// This can be queried with "getTypeAction(VT)". unsigned ValueTypeActions; - + /// TransformToType - For any value types we are promoting or expanding, this /// contains the value type that we are changing to. For Expanded types, this /// contains one step of the expand (e.g. i64 -> i32), even if there are @@ -341,9 +341,9 @@ private: /// operations that are not should be described. Note that operations on /// non-legal value types are not described here. unsigned OpActions[128]; - + std::vector LegalFPImmediates; - + std::vector > AvailableRegClasses; }; diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index 3455443e3bc..b0deafc0235 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -1,10 +1,10 @@ //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the general parts of a Target machine. @@ -37,16 +37,16 @@ class IntrinsicLowering; /// TargetMachine - Primary interface to the complete machine description for /// the target machine. All target-specific information should be accessible /// through this interface. -/// +/// class TargetMachine { const std::string Name; const TargetData DataLayout; // Calculates type size & alignment IntrinsicLowering *IL; // Specifies how to lower intrinsic calls - + TargetMachine(const TargetMachine&); // DO NOT IMPLEMENT void operator=(const TargetMachine&); // DO NOT IMPLEMENT protected: // Can only create subclasses... - TargetMachine(const std::string &name, IntrinsicLowering *IL, + TargetMachine(const std::string &name, IntrinsicLowering *IL, bool LittleEndian = false, unsigned char PtrSize = 8, unsigned char PtrAl = 8, unsigned char DoubleAl = 8, unsigned char FloatAl = 4, @@ -54,7 +54,7 @@ protected: // Can only create subclasses... unsigned char ShortAl = 2, unsigned char ByteAl = 1, unsigned char BoolAl = 1); - TargetMachine(const std::string &name, IntrinsicLowering *IL, + TargetMachine(const std::string &name, IntrinsicLowering *IL, const TargetData &TD); /// This constructor is used for targets that support arbitrary TargetData @@ -87,12 +87,12 @@ public: /// lower unknown intrinsic functions to the equivalent LLVM expansion. /// IntrinsicLowering &getIntrinsicLowering() const { return *IL; } - + // Interfaces to the major aspects of target machine information: // -- Instruction opcode and operand information // -- Pipelines and scheduling information // -- Stack frame information - // + // virtual const TargetInstrInfo *getInstrInfo() const { return 0; } virtual const TargetFrameInfo *getFrameInfo() const { return 0; } const TargetData &getTargetData() const { return DataLayout; } diff --git a/include/llvm/Target/TargetMachineRegistry.h b/include/llvm/Target/TargetMachineRegistry.h index 08ab56e10ae..6de84bc300a 100644 --- a/include/llvm/Target/TargetMachineRegistry.h +++ b/include/llvm/Target/TargetMachineRegistry.h @@ -1,10 +1,10 @@ //===-- Target/TargetMachineRegistry.h - Target Registration ----*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file exposes two classes: the TargetMachineRegistry class, which allows @@ -74,7 +74,7 @@ namespace llvm { /// TargetMachine comments.. template struct RegisterTarget : public TargetMachineRegistry::Entry { - RegisterTarget(const char *Name, const char *ShortDesc) : + RegisterTarget(const char *Name, const char *ShortDesc) : TargetMachineRegistry::Entry(Name, ShortDesc, &Allocator, &TargetMachineImpl::getModuleMatchQuality, &TargetMachineImpl::getJITMatchQuality) { @@ -94,7 +94,7 @@ namespace llvm { virtual ~TargetRegistrationListener(); TargetRegistrationListener *getNext() const { return Next; } - + virtual void targetRegistered(const TargetMachineRegistry::Entry *E) = 0; }; diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h index a4038430cb3..19b83d5eefd 100644 --- a/include/llvm/Target/TargetOptions.h +++ b/include/llvm/Target/TargetOptions.h @@ -1,10 +1,10 @@ //===-- llvm/Target/TargetOptions.h - Target Options ------------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines command line option flags that are shared across various diff --git a/include/llvm/Target/TargetSchedInfo.h b/include/llvm/Target/TargetSchedInfo.h index bd2f828e4de..d0043d1b878 100644 --- a/include/llvm/Target/TargetSchedInfo.h +++ b/include/llvm/Target/TargetSchedInfo.h @@ -1,10 +1,10 @@ //===- Target/TargetSchedInfo.h - Target Instruction Sched Info -*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the target machine to the instruction scheduler. @@ -22,14 +22,14 @@ namespace llvm { -typedef long long CycleCount_t; +typedef long long CycleCount_t; static const CycleCount_t HUGE_LATENCY = ~((long long) 1 << (sizeof(CycleCount_t)-2)); -static const CycleCount_t INVALID_LATENCY = -HUGE_LATENCY; +static const CycleCount_t INVALID_LATENCY = -HUGE_LATENCY; //--------------------------------------------------------------------------- -// class MachineResource +// class MachineResource // class CPUResource -// +// // Purpose: // Representation of a single machine resource used in specifying // resource usages of machine instructions for scheduling. @@ -42,7 +42,7 @@ struct CPUResource { const std::string rname; resourceId_t rid; int maxNumUsers; // MAXINT if no restriction - + CPUResource(const std::string& resourceName, int maxUsers); static CPUResource* getCPUResource(resourceId_t id); private: @@ -52,17 +52,17 @@ private: //--------------------------------------------------------------------------- // struct InstrClassRUsage -// struct InstrRUsageDelta -// struct InstrIssueDelta -// struct InstrRUsage -// +// struct InstrRUsageDelta +// struct InstrIssueDelta +// struct InstrRUsage +// // Purpose: -// The first three are structures used to specify machine resource +// The first three are structures used to specify machine resource // usages for each instruction in a machine description file: // InstrClassRUsage : resource usages common to all instrs. in a class -// InstrRUsageDelta : add/delete resource usage for individual instrs. -// InstrIssueDelta : add/delete instr. issue info for individual instrs -// +// InstrRUsageDelta : add/delete resource usage for individual instrs. +// InstrIssueDelta : add/delete instr. issue info for individual instrs +// // The last one (InstrRUsage) is the internal representation of // instruction resource usage constructed from the above three. //--------------------------------------------------------------------------- @@ -73,18 +73,18 @@ const int MAX_NUM_CYCLES = 32; struct InstrClassRUsage { InstrSchedClass schedClass; int totCycles; - + // Issue restrictions common to instructions in this class unsigned maxNumIssue; bool isSingleIssue; bool breaksGroup; CycleCount_t numBubbles; - + // Feasible slots to use for instructions in this class. // The size of vector S[] is `numSlots'. unsigned numSlots; unsigned feasibleSlots[MAX_NUM_SLOTS]; - + // Resource usages common to instructions in this class. // The size of vector V[] is `numRUEntries'. unsigned numRUEntries; @@ -104,7 +104,7 @@ struct InstrRUsageDelta { // Specify instruction issue restrictions for individual instructions // that differ from the common rules for the class. -// +// struct InstrIssueDelta { MachineOpCode opCode; bool isSingleIssue; @@ -115,19 +115,19 @@ struct InstrIssueDelta { struct InstrRUsage { bool sameAsClass; - + // Issue restrictions for this instruction bool isSingleIssue; bool breaksGroup; CycleCount_t numBubbles; - + // Feasible slots to use for this instruction. std::vector feasibleSlots; - + // Resource usages for this instruction, with one resource vector per cycle. CycleCount_t numCycles; std::vector > resourcesByCycle; - + private: // Conveniences for initializing this structure void setTo(const InstrClassRUsage& classRU); @@ -143,22 +143,22 @@ private: void setMaxSlots (int maxNumSlots) { feasibleSlots.resize(maxNumSlots); } - + friend class TargetSchedInfo; // give access to these functions }; //--------------------------------------------------------------------------- -/// TargetSchedInfo - Common interface to machine information for +/// TargetSchedInfo - Common interface to machine information for /// instruction scheduling /// class TargetSchedInfo { public: const TargetMachine& target; - + unsigned maxNumIssueTotal; int longestIssueConflict; - + protected: inline const InstrRUsage& getInstrRUsage(MachineOpCode opCode) const { assert(opCode >= 0 && opCode < (int) instrRUsages.size()); @@ -181,19 +181,19 @@ public: unsigned _numUsageDeltas, unsigned _numIssueDeltas); /*dtor*/ virtual ~TargetSchedInfo() {} - + inline const TargetInstrInfo& getInstrInfo() const { return *mii; } - + inline int getNumSchedClasses() const { return numSchedClasses; - } - + } + inline unsigned getMaxNumIssueTotal() const { return maxNumIssueTotal; } - + inline unsigned getMaxIssueForClass(const InstrSchedClass& sc) const { assert(sc < numSchedClasses); return classRUsages[sc].maxNumIssue; @@ -201,14 +201,14 @@ public: inline InstrSchedClass getSchedClass (MachineOpCode opCode) const { return getInstrInfo().getSchedClass(opCode); - } - + } + inline bool instrCanUseSlot (MachineOpCode opCode, unsigned s) const { assert(s < getInstrRUsage(opCode).feasibleSlots.size() && "Invalid slot!"); return getInstrRUsage(opCode).feasibleSlots[s]; } - + inline int getLongestIssueConflict () const { return longestIssueConflict; } @@ -229,15 +229,15 @@ public: inline bool isSingleIssue (MachineOpCode opCode) const { return getInstrRUsage(opCode).isSingleIssue; } - + inline bool breaksIssueGroup (MachineOpCode opCode) const { return getInstrRUsage(opCode).breaksGroup; } - + inline unsigned numBubblesAfter (MachineOpCode opCode) const { return getInstrRUsage(opCode).numBubbles; } - + inline unsigned getCPUResourceNum(int rd)const{ for(unsigned i=0;i& instrRUForClasses); void computeIssueGaps(const std::vector& instrRUForClasses); - + void setGap(int gap, MachineOpCode fromOp, MachineOpCode toOp) { std::vector& toGaps = issueGaps[fromOp]; if (toOp >= (int) toGaps.size()) toGaps.resize(toOp+1); toGaps[toOp] = gap; } - + public: std::vector > resourceNumVector; - + protected: unsigned numSchedClasses; const TargetInstrInfo* mii; @@ -272,7 +272,7 @@ protected: const InstrIssueDelta* issueDeltas; // raw array [1:numIssueDeltas] unsigned numUsageDeltas; unsigned numIssueDeltas; - + std::vector instrRUsages; // indexed by opcode std::vector > issueGaps; // indexed by [opcode1][opcode2] std::vector > @@ -281,7 +281,7 @@ protected: friend class ModuloSchedulingPass; friend class MSSchedule; - + }; } // End llvm namespace diff --git a/include/llvm/Transforms/IPO.h b/include/llvm/Transforms/IPO.h index a0515a7f5e0..7e72cf9d28e 100644 --- a/include/llvm/Transforms/IPO.h +++ b/include/llvm/Transforms/IPO.h @@ -1,10 +1,10 @@ //===- llvm/Transforms/IPO.h - Interprocedural Transformations --*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This header file defines prototypes for accessor functions that expose passes @@ -77,7 +77,7 @@ ModulePass *createGlobalDCEPass(); //===----------------------------------------------------------------------===// -/// createFunctionExtractionPass - If deleteFn is true, this pass deletes as +/// createFunctionExtractionPass - If deleteFn is true, this pass deletes as /// the specified function. Otherwise, it deletes as much of the module as /// possible, except for the function specified. /// diff --git a/include/llvm/Transforms/Instrumentation.h b/include/llvm/Transforms/Instrumentation.h index f6aff42d682..27fccb204ca 100644 --- a/include/llvm/Transforms/Instrumentation.h +++ b/include/llvm/Transforms/Instrumentation.h @@ -1,10 +1,10 @@ //===- Transforms/Instrumentation.h - Instrumentation passes ----*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This files defines constructor functions for instrumentation passes. diff --git a/include/llvm/Transforms/LinkAllPasses.h b/include/llvm/Transforms/LinkAllPasses.h index c817f12c6b4..97b333cab2f 100644 --- a/include/llvm/Transforms/LinkAllPasses.h +++ b/include/llvm/Transforms/LinkAllPasses.h @@ -1,10 +1,10 @@ //===- llvm/Transforms/LinkAllPasses.h - Reference All Passes ---*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by Jeff Cohen and is distributed under the // University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This header file is required for building with Microsoft's VC++, as it has diff --git a/include/llvm/Transforms/Scalar.h b/include/llvm/Transforms/Scalar.h index e6db624cb8e..4cc59dd3c75 100644 --- a/include/llvm/Transforms/Scalar.h +++ b/include/llvm/Transforms/Scalar.h @@ -1,10 +1,10 @@ //===-- Scalar.h - Scalar Transformations -----------------------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This header file defines prototypes for accessor functions that expose passes @@ -231,7 +231,7 @@ FunctionPass *createLoopSimplifyPass(); extern const PassInfo *LoopSimplifyID; //===----------------------------------------------------------------------===// -// +// // This pass eliminates call instructions to the current function which occur // immediately before return instructions. // @@ -274,7 +274,7 @@ FunctionPass *createLowerPackedPass(); FunctionPass *createLowerInvokePass(); extern const PassInfo *LowerInvokePassID; - + //===----------------------------------------------------------------------===// /// createLowerGCPass - This function returns an instance of the "lowergc" /// pass, which lowers garbage collection intrinsics to normal LLVM code. diff --git a/include/llvm/Transforms/Utils/BasicBlockUtils.h b/include/llvm/Transforms/Utils/BasicBlockUtils.h index 155eae8e36b..68e483c0bc7 100644 --- a/include/llvm/Transforms/Utils/BasicBlockUtils.h +++ b/include/llvm/Transforms/Utils/BasicBlockUtils.h @@ -1,10 +1,10 @@ //===-- Transform/Utils/BasicBlockUtils.h - BasicBlock Utils ----*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This family of functions perform manipulations on basic blocks, and diff --git a/include/llvm/Transforms/Utils/Cloning.h b/include/llvm/Transforms/Utils/Cloning.h index d17b52568a9..49b5e330423 100644 --- a/include/llvm/Transforms/Utils/Cloning.h +++ b/include/llvm/Transforms/Utils/Cloning.h @@ -1,10 +1,10 @@ //===- Cloning.h - Clone various parts of LLVM programs ---------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines various functions that are used to clone chunks of LLVM @@ -108,7 +108,7 @@ void CloneTraceInto(Function *NewFunc, Trace &T, /// this call. The program is still in a well defined state if this occurs /// though. /// -/// Note that this only does one level of inlining. For example, if the +/// Note that this only does one level of inlining. For example, if the /// instruction 'call B' is inlined, and 'B' calls 'C', then the call to 'C' now /// exists in the instruction stream. Similiarly this will inline a recursive /// function by one level. @@ -117,9 +117,9 @@ bool InlineFunction(CallInst *C); bool InlineFunction(InvokeInst *II); bool InlineFunction(CallSite CS); -/// CloneTrace - Returns a copy of the specified trace. -/// It takes a vector of basic blocks clones the basic blocks, removes internal -/// phi nodes, adds it to the same function as the original (although there is +/// CloneTrace - Returns a copy of the specified trace. +/// It takes a vector of basic blocks clones the basic blocks, removes internal +/// phi nodes, adds it to the same function as the original (although there is /// no jump to it) and returns the new vector of basic blocks. std::vector CloneTrace(const std::vector &origTrace); diff --git a/include/llvm/Transforms/Utils/FunctionUtils.h b/include/llvm/Transforms/Utils/FunctionUtils.h index d0e9cbc63e8..d8610bba95f 100644 --- a/include/llvm/Transforms/Utils/FunctionUtils.h +++ b/include/llvm/Transforms/Utils/FunctionUtils.h @@ -1,10 +1,10 @@ //===-- Transform/Utils/FunctionUtils.h - Function Utils --------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This family of transformations manipulate LLVM functions. @@ -21,7 +21,7 @@ namespace llvm { struct DominatorSet; class Function; class Loop; - + /// ExtractCodeRegion - rip out a sequence of basic blocks into a new function /// Function* ExtractCodeRegion(DominatorSet &DS, diff --git a/include/llvm/Transforms/Utils/Local.h b/include/llvm/Transforms/Utils/Local.h index eb219456700..11abb5b6667 100644 --- a/include/llvm/Transforms/Utils/Local.h +++ b/include/llvm/Transforms/Utils/Local.h @@ -1,10 +1,10 @@ //===-- Local.h - Functions to perform local transformations ----*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This family of functions perform various local transformations to the diff --git a/include/llvm/Transforms/Utils/PromoteMemToReg.h b/include/llvm/Transforms/Utils/PromoteMemToReg.h index 12e7fb12579..8d886f54877 100644 --- a/include/llvm/Transforms/Utils/PromoteMemToReg.h +++ b/include/llvm/Transforms/Utils/PromoteMemToReg.h @@ -1,10 +1,10 @@ //===- PromoteMemToReg.h - Promote Allocas to Scalars -----------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file exposes an interface to promote alloca instructions to SSA diff --git a/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h b/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h index 6202f85792e..81c71fb5ef6 100644 --- a/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h +++ b/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h @@ -1,10 +1,10 @@ //===-- UnifyFunctionExitNodes.h - Ensure fn's have one return --*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass is used to ensure that functions have at most one return and one -- 2.34.1