From 362b8f2786a366dac46d6d5bbfb290f2c0067740 Mon Sep 17 00:00:00 2001 From: Mon P Wang Date: Fri, 16 Oct 2009 22:09:05 +0000 Subject: [PATCH] Update tests to use FileCheck git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84282 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/widen_arith-1.ll | 10 ++++------ test/CodeGen/X86/widen_arith-2.ll | 7 +++---- test/CodeGen/X86/widen_arith-3.ll | 10 ++++------ test/CodeGen/X86/widen_arith-4.ll | 8 +++----- test/CodeGen/X86/widen_arith-5.ll | 9 ++++----- test/CodeGen/X86/widen_arith-6.ll | 7 +++---- test/CodeGen/X86/widen_cast-1.ll | 8 ++++---- test/CodeGen/X86/widen_cast-2.ll | 11 ++++++++--- test/CodeGen/X86/widen_cast-3.ll | 7 ++++--- test/CodeGen/X86/widen_cast-4.ll | 11 +++++++++-- test/CodeGen/X86/widen_cast-5.ll | 4 +++- test/CodeGen/X86/widen_cast-6.ll | 4 ++-- test/CodeGen/X86/widen_conv-1.ll | 6 +++--- test/CodeGen/X86/widen_conv-2.ll | 4 +++- test/CodeGen/X86/widen_conv-3.ll | 5 +++-- test/CodeGen/X86/widen_conv-4.ll | 3 ++- test/CodeGen/X86/widen_select-1.ll | 3 ++- test/CodeGen/X86/widen_shuffle-1.ll | 4 +++- test/CodeGen/X86/widen_shuffle-2.ll | 4 +++- 19 files changed, 70 insertions(+), 55 deletions(-) diff --git a/test/CodeGen/X86/widen_arith-1.ll b/test/CodeGen/X86/widen_arith-1.ll index 8f607f5ed59..f8d06902c55 100644 --- a/test/CodeGen/X86/widen_arith-1.ll +++ b/test/CodeGen/X86/widen_arith-1.ll @@ -1,14 +1,12 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep paddb %t | count 1 -; RUN: grep pextrb %t | count 1 -; RUN: not grep pextrw %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s ; Widen a v3i8 to v16i8 to use a vector add -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" - define void @update(<3 x i8>* %dst, <3 x i8>* %src, i32 %n) nounwind { entry: +; CHECK-NOT: pextrw +; CHECK: paddb +; CHECK: pextrb %dst.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2] %src.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2] %n.addr = alloca i32 ; [#uses=2] diff --git a/test/CodeGen/X86/widen_arith-2.ll b/test/CodeGen/X86/widen_arith-2.ll index e2420f0ff19..fdecaa3f77f 100644 --- a/test/CodeGen/X86/widen_arith-2.ll +++ b/test/CodeGen/X86/widen_arith-2.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep paddb %t | count 1 -; RUN: grep pand %t | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: paddb +; CHECK: pand ; widen v8i8 to v16i8 (checks even power of 2 widening with add & and) -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind { entry: diff --git a/test/CodeGen/X86/widen_arith-3.ll b/test/CodeGen/X86/widen_arith-3.ll index a22d2547566..d1840671f7e 100644 --- a/test/CodeGen/X86/widen_arith-3.ll +++ b/test/CodeGen/X86/widen_arith-3.ll @@ -1,12 +1,10 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep paddw %t | count 1 -; RUN: grep movd %t | count 2 -; RUN: grep pextrw %t | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: paddw +; CHECK: movd +; CHECK: pextrw ; Widen a v3i16 to v8i16 to do a vector add -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i686-apple-darwin10.0.0d2" @.str = internal constant [4 x i8] c"%d \00" ; <[4 x i8]*> [#uses=1] @.str1 = internal constant [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll index 898bff01378..f7506ae3e3c 100644 --- a/test/CodeGen/X86/widen_arith-4.ll +++ b/test/CodeGen/X86/widen_arith-4.ll @@ -1,11 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep psubw %t | count 1 -; RUN: grep pmullw %t | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: psubw +; CHECK-NEXT: pmullw ; Widen a v5i16 to v8i16 to do a vector sub and multiple -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" - define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind { entry: %dst.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2] diff --git a/test/CodeGen/X86/widen_arith-5.ll b/test/CodeGen/X86/widen_arith-5.ll index 1ecf09d9ff3..f7f34087362 100644 --- a/test/CodeGen/X86/widen_arith-5.ll +++ b/test/CodeGen/X86/widen_arith-5.ll @@ -1,10 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep pmulld %t | count 1 -; RUN: grep psubd %t | count 1 -; RUN: grep movaps %t | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: movaps +; CHECK: pmulld +; CHECK: psubd ; widen a v3i32 to v4i32 to do a vector multiple and a subtraction -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" define void @update(<3 x i32>* %dst, <3 x i32>* %src, i32 %n) nounwind { entry: diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll index 358325885f2..538123f10c2 100644 --- a/test/CodeGen/X86/widen_arith-6.ll +++ b/test/CodeGen/X86/widen_arith-6.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep mulps %t | count 1 -; RUN: grep addps %t | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: mulps +; CHECK: addps ; widen a v3f32 to vfi32 to do a vector multiple and an add -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" define void @update(<3 x float>* %dst, <3 x float>* %src, i32 %n) nounwind { entry: diff --git a/test/CodeGen/X86/widen_cast-1.ll b/test/CodeGen/X86/widen_cast-1.ll index 441a3604863..d4ab174ae9f 100644 --- a/test/CodeGen/X86/widen_cast-1.ll +++ b/test/CodeGen/X86/widen_cast-1.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep paddw %t | count 1 -; RUN: grep movd %t | count 1 -; RUN: grep pextrd %t | count 1 +; RUN: llc -march=x86 -mattr=+sse42 < %s -disable-mmx | FileCheck %s +; CHECK: paddw +; CHECK: pextrd +; CHECK: movd ; bitcast a v4i16 to v2i32 diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll index ded5707aed4..e5d2c6a61e2 100644 --- a/test/CodeGen/X86/widen_cast-2.ll +++ b/test/CodeGen/X86/widen_cast-2.ll @@ -1,6 +1,11 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep pextrd %t | count 5 -; RUN: grep movd %t | count 3 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: pextrd +; CHECK: pextrd +; CHECK: movd +; CHECK: pextrd +; CHECK: pextrd +; CHECK: pextrd +; CHECK: movd ; bitcast v14i16 to v7i32 diff --git a/test/CodeGen/X86/widen_cast-3.ll b/test/CodeGen/X86/widen_cast-3.ll index 67a760f5df0..02674dd1459 100644 --- a/test/CodeGen/X86/widen_cast-3.ll +++ b/test/CodeGen/X86/widen_cast-3.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep paddd %t | count 1 -; RUN: grep pextrd %t | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: paddd +; CHECK: pextrd +; CHECK: pextrd ; bitcast v12i8 to v3i32 diff --git a/test/CodeGen/X86/widen_cast-4.ll b/test/CodeGen/X86/widen_cast-4.ll index 614eeedbe79..5f31e560f50 100644 --- a/test/CodeGen/X86/widen_cast-4.ll +++ b/test/CodeGen/X86/widen_cast-4.ll @@ -1,5 +1,12 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep sarb %t | count 8 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: sarb +; CHECK: sarb +; CHECK: sarb +; CHECK: sarb +; CHECK: sarb +; CHECK: sarb +; CHECK: sarb +; CHECK: sarb ; v8i8 that is widen to v16i8 then split ; FIXME: This is widen to v16i8 and split to 16 and we then rebuild the vector. diff --git a/test/CodeGen/X86/widen_cast-5.ll b/test/CodeGen/X86/widen_cast-5.ll index 92618d6fe15..d1d7fecbd27 100644 --- a/test/CodeGen/X86/widen_cast-5.ll +++ b/test/CodeGen/X86/widen_cast-5.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: movl +; CHECK: movd ; bitcast a i64 to v2i32 diff --git a/test/CodeGen/X86/widen_cast-6.ll b/test/CodeGen/X86/widen_cast-6.ll index 386f749a506..08759bf5510 100644 --- a/test/CodeGen/X86/widen_cast-6.ll +++ b/test/CodeGen/X86/widen_cast-6.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx -o %t -; RUN: grep movd %t | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx | FileCheck %s +; CHECK: movd ; Test bit convert that requires widening in the operand. diff --git a/test/CodeGen/X86/widen_conv-1.ll b/test/CodeGen/X86/widen_conv-1.ll index ccc8b4ff06e..a2029dd2748 100644 --- a/test/CodeGen/X86/widen_conv-1.ll +++ b/test/CodeGen/X86/widen_conv-1.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; RUN: grep pshufd %t | count 1 -; RUN: grep paddd %t | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: pshufd +; CHECK: paddd ; truncate v2i64 to v2i32 diff --git a/test/CodeGen/X86/widen_conv-2.ll b/test/CodeGen/X86/widen_conv-2.ll index 9b7ab74eb2e..b24a9b36673 100644 --- a/test/CodeGen/X86/widen_conv-2.ll +++ b/test/CodeGen/X86/widen_conv-2.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: movswl +; CHECK: movswl ; sign extension v2i32 to v2i16 diff --git a/test/CodeGen/X86/widen_conv-3.ll b/test/CodeGen/X86/widen_conv-3.ll index 4ec76a908e8..1a40800de97 100644 --- a/test/CodeGen/X86/widen_conv-3.ll +++ b/test/CodeGen/X86/widen_conv-3.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t -; grep cvtsi2ss %t | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: cvtsi2ss + ; sign to float v2i16 to v2f32 define void @convert(<2 x float>* %dst.addr, <2 x i16> %src) nounwind { diff --git a/test/CodeGen/X86/widen_conv-4.ll b/test/CodeGen/X86/widen_conv-4.ll index 61a26a8b80b..e505b62a3db 100644 --- a/test/CodeGen/X86/widen_conv-4.ll +++ b/test/CodeGen/X86/widen_conv-4.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: cvtsi2ss ; unsigned to float v7i16 to v7f32 diff --git a/test/CodeGen/X86/widen_select-1.ll b/test/CodeGen/X86/widen_select-1.ll index aca0b67cb66..4154433fa70 100644 --- a/test/CodeGen/X86/widen_select-1.ll +++ b/test/CodeGen/X86/widen_select-1.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: jne ; widening select v6i32 and then a sub diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll index 15da87005c9..dd02241c1dd 100644 --- a/test/CodeGen/X86/widen_shuffle-1.ll +++ b/test/CodeGen/X86/widen_shuffle-1.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: insertps +; CHECK: extractps ; widening shuffle v3float and then a add diff --git a/test/CodeGen/X86/widen_shuffle-2.ll b/test/CodeGen/X86/widen_shuffle-2.ll index 617cc1de4ba..d097e4142bc 100644 --- a/test/CodeGen/X86/widen_shuffle-2.ll +++ b/test/CodeGen/X86/widen_shuffle-2.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; CHECK: insertps +; CHECK: extractps ; widening shuffle v3float and then a add -- 2.34.1