From 365c2280152515951c5c62c0f1edb8a5aa344186 Mon Sep 17 00:00:00 2001 From: Zhaoyifeng Date: Tue, 7 Aug 2012 15:27:26 +0800 Subject: [PATCH] nand driver: add 2928 nand driver. --- arch/arm/mach-rk2928/devices.c | 19 ++ drivers/mtd/rknand/Makefile | 1 - drivers/mtd/rknand/api_flash.h | 2 +- drivers/mtd/rknand/epphal.h | 500 ---------------------------- drivers/mtd/rknand/nand_config.h | 77 ----- drivers/mtd/rknand/rknand_base.h | 2 + drivers/mtd/rknand/rknand_base_ko.c | 28 +- drivers/mtd/rknand/typedef.h | 62 ---- 8 files changed, 45 insertions(+), 646 deletions(-) delete mode 100755 drivers/mtd/rknand/epphal.h delete mode 100755 drivers/mtd/rknand/nand_config.h delete mode 100755 drivers/mtd/rknand/typedef.h diff --git a/arch/arm/mach-rk2928/devices.c b/arch/arm/mach-rk2928/devices.c index 2fba48058870..1dc4df27e90b 100755 --- a/arch/arm/mach-rk2928/devices.c +++ b/arch/arm/mach-rk2928/devices.c @@ -544,6 +544,22 @@ static void __init rk2928_init_spim(void) #endif } +#ifdef CONFIG_MTD_NAND_RK29XX +static struct resource resources_nand[] = { + { + .start = RK2928_NANDC_PHYS, + .end = RK2928_NANDC_PHYS + RK2928_NANDC_SIZE - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device device_nand = { + .name = "rk29xxnand", + .id = -1, + .resource = resources_nand, + .num_resources = ARRAY_SIZE(resources_nand), +}; +#endif #ifdef CONFIG_HDMI_RK2928 static struct resource resource_hdmi[] = { [0] = { @@ -769,6 +785,9 @@ static int __init rk2928_init_devices(void) rk2928_init_uart(); rk2928_init_i2c(); rk2928_init_spim(); +#ifdef CONFIG_MTD_NAND_RK29XX + platform_device_register(&device_nand); +#endif #ifdef CONFIG_ADC_RK30 platform_device_register(&device_adc); #endif diff --git a/drivers/mtd/rknand/Makefile b/drivers/mtd/rknand/Makefile index bdda17ab8b26..964ea55489f3 100755 --- a/drivers/mtd/rknand/Makefile +++ b/drivers/mtd/rknand/Makefile @@ -4,6 +4,5 @@ # $Id: Makefile,v 1.3 2011/01/21 10:12:56 Administrator Exp $ # obj-$(CONFIG_MTD_NAND_RK29XX) += rknand_base_ko.o -#obj-$(CONFIG_MTD_RKNAND_BUFFER) += rk30xxnand_ko.o diff --git a/drivers/mtd/rknand/api_flash.h b/drivers/mtd/rknand/api_flash.h index fe004ded9be0..2340d4bb9c0d 100755 --- a/drivers/mtd/rknand/api_flash.h +++ b/drivers/mtd/rknand/api_flash.h @@ -184,7 +184,7 @@ int FtlPageRead(int Index, int nSec, void *buf); Èë¿Ú²ÎÊý:pbuf ³ö¿Ú²ÎÊý: µ÷Óú¯Êý: -×¢ÒâÐÅÏ¢£ºÐèÒªÔÚFTLInitºó²ÅÄܵ÷Óã¬pbuf´óСÐèÒª´óÓÚµÈÓÚ512 bytes£¬·µ»ØÐÅϢΪ512 +×¢ÒâÐÅÏ¢£ºÐèÒªÔÚflash Çý¶¯¼ÓÔغó²ÅÄܵ÷Óã¬pbuf´óСÐèÒª´óÓÚµÈÓÚ512 bytes£¬·µ»ØÐÅϢΪ512 bytes¡£ ***************************************************************************/ char GetSNSectorInfo(char * pbuf); diff --git a/drivers/mtd/rknand/epphal.h b/drivers/mtd/rknand/epphal.h deleted file mode 100755 index b966cea8a404..000000000000 --- a/drivers/mtd/rknand/epphal.h +++ /dev/null @@ -1,500 +0,0 @@ -/******************************************************************************** -********************************************************************************* - COPYRIGHT (c) 2004 BY ROCK-CHIP FUZHOU - -- ALL RIGHTS RESERVED -- - -File Name: epphal.h -Author: XUESHAN LIN -Created: 1st Dec 2008 -Modified: -Revision: 1.00 -******************************************************************************** -********************************************************************************/ -#ifndef _EPPHAL_H -#define _EPPHAL_H -#define read_XDATA32(address) (*((uint32 volatile*)(address))) -#define write_XDATA32(address, value) (*((uint32 volatile*)(address)) = value) - -typedef enum _CLK_GATE -{ - /* SCU CLK GATE 0 CON */ - CLK_GATE_CORE = 0, - CLK_GATE_CORE_APB, - CLK_GATE_CORE_ATB, - CLK_GATE_CPU_AXI, - CLK_GATE_CPU_AXI2, - CLK_GATE_CPU_AHB, - CLK_GATE_CPU_MATRIX1_AHB, - CLK_GATE_CPU_APB, - CLK_GATE_CPU_ATB, - CLK_GATE_DMA0, - CLK_GATE_DMA1, - CLK_GATE_GIC, - CLK_GATE_IMEM, - CLK_GATE_EBROM = 14, - CLK_GATE_I2S0, - CLK_GATE_I2S1, - CLK_GATE_SPDIF, - CLK_GATE_DDR_PHY, - CLK_GATE_DDR_REG, - CLK_GATE_DDR_CPU, - CLK_GATE_EFUSE, - CLK_GATE_TZPC, - CLK_GATE_TIMER0, - CLK_GATE_GPIO0, - CLK_GATE_UART0, - CLK_GATE_I2C0, - CLK_GATE_DEBUG, - CLK_GATE_TPIU, - CLK_GATE_RTC, - CLK_GATE_PMU, - CLK_GATE_GRF, - - /* SCU CLK GATE 1 CON */ - CLK_GATE_PEIRPH_AXI = 32, - CLK_GATE_PEIRPH_AHB, - CLK_GATE_PEIRPH_APB, - CLK_GATE_EMEM, - CLK_GATE_USB, - CLK_GATE_DMA2, - CLK_GATE_DDR_PERIPH, - CLK_GATE_PERIPH, - - /* FIXME */ - CLK_GATE_SMC_AXI, - CLK_GATE_SMC, - CLK_GATE_MAC_AHB = 43, - CLK_GATE_MAC_PHY, - CLK_GATE_MAC_TX, - CLK_GATE_MAC_RX, - CLK_GATE_HIF, - CLK_GATE_NANDC, - CLK_GATE_HSADC_AHB, - CLK_GATE_HSADC, - CLK_GATE_SDMMC0_AHB, - CLK_GATE_SDMMC0, - CLK_GATE_SDMMC1_AHB, - CLK_GATE_SDMMC1, - CLK_GATE_EMMC_AHB, - CLK_GATE_EMMC, - CLK_GATE_USBOTG0, - CLK_GATE_USBPHY0, - CLK_GATE_USBOTG1, - CLK_GATE_USBPHY1, - CLK_GATE_UHOST_AHB, - CLK_GATE_UHOST, - CLK_GATE_PID_FILTER, - - /* SCU CLK GATE 2 CON */ - CLK_GATE_UART1 = 64, - CLK_GATE_UART2, - CLK_GATE_UART3, - CLK_GATE_TIMER1, - CLK_GATE_TIMER2, - CLK_GATE_TIMER3, - CLK_GATE_GPIO1, - CLK_GATE_GPIO2, - CLK_GATE_GPIO3, - CLK_GATE_GPIO4, - CLK_GATE_GPIO5, - CLK_GATE_GPIO6, - CLK_GATE_I2C1, - CLK_GATE_I2C2, - CLK_GATE_I2C3, - CLK_GATE_SPI0, - CLK_GATE_SPI1, - CLK_GATE_VIP_SLAVE = 82, - CLK_GATE_WDT, - CLK_GATE_SARADC, - CLK_GATE_PWM, - CLK_GATE_VIP_BUS, - CLK_GATE_VIP_MATRIX, - CLK_GATE_VIP, - CLK_GATE_VIP_INPUT, - CLK_GATE_JTAG, - - /* CRU CLK GATE 3 CON */ - CLK_GATE_LCDC_AXI = 96, - CLK_GATE_DDR_LCDC_AXI, - CLK_GATE_LCDC_AHB, - CLK_GATE_LCDC, - CLK_GATE_IPP_AXI, - CLK_GATE_IPP_AHB, - CLK_GATE_EBOOK_AHB, - CLK_GATE_EBOOK, - CLK_GATE_DISPLAY_MATRIX_AXI, - CLK_GATE_DISPLAY_MATRIX_AHB, - CLK_GAET_VEPU_AXI, - CLK_GATE_DDR_VEDU_AXI, - CLK_GATE_VDPU_AXI, - CLK_GATE_DDR_VDPU_AXI, - CLK_GATE_GPU, - CLK_GATE_GPU_AXI, - CLK_GATE_DDR_GPU_AXI, - CLK_GATE_GPU_AHB, - CLK_GATE_VEPU_AHB, - CLK_GATE_VDPU_AHB, - CLK_GATE_CPU_VCODEC_AHB, - CLK_GATE_CPU_DISPLAY_AHB, - CLK_GATE_MAX -}eCLK_GATE; - - -//1¼Ä´æÆ÷½á¹¹¶¨Òå -//INTC Registers -typedef volatile struct tagGICD_REG -{ - uint32 ICDDCR ; //0x000 - uint32 ICDICTR ; //0x004 - uint32 ICDIIDR ; //0x008 - uint32 RESERVED0[29] ; - uint32 ICDISR[4] ; // 0x080 - uint32 RESERVED1[28] ; - uint32 ICDISER[4] ; // 0x100 - uint32 RESERVED2[28] ; - uint32 ICDICER[4] ; //0x180 - uint32 RESERVED3[28] ; - uint32 ICDISPR[4] ; //0x200 - uint32 RESERVED4[28] ; - uint32 ICDICPR[4] ; //0x280 - uint32 RESERVED5[28] ; - uint32 ICDIABR[4] ; //0x300 - uint32 RESERVED6[60] ; - uint32 ICDIPR_SGI[4] ; // 0x400 - uint32 ICDIPR_PPI[4] ; // 0x410 - uint32 ICDIPR_SPI[18] ; //0x420 - uint32 RESERVED57[486] ; - uint32 ICDICFR[7] ; //0xc00 - uint32 RESERVED8[185] ; - uint32 ICDSGIR ; //0xf00 -}GICD_REG, *pGICD_REG; -typedef volatile struct tagGICC_REG -{ - uint32 ICCICR ; //0x00 - uint32 ICCPMR ; //0x04 - uint32 ICCBPR ; //0x08 - uint32 ICCIAR ; //0x0c - uint32 ICCEOIR ; //0x10 - uint32 ICCRPR ; //0x14 - uint32 ICCHPIR ; //0x18 - uint32 ICCABPR ; //0x1c - uint32 RESERVED0[55]; - uint32 ICCIIDR ; //0xfc -}GICC_REG, *pGICC_REG; - - -//SCU Registers -typedef volatile struct tagCRU_REG -{ - uint32 CRU_APLL_CON;//[3];//0:arm 1:ddr 2:codec - uint32 CRU_DPLL_CON; - uint32 CRU_CPLL_CON; - uint32 CRU_PPLL_CON; - uint32 CRU_MODE_CON; - uint32 CRU_CLKSEL0_CON; - uint32 CRU_CLKSEL1_CON; - uint32 CRU_CLKSEL2_CON; - uint32 CRU_CLKSEL3_CON; - uint32 CRU_CLKSEL4_CON; - uint32 CRU_CLKSEL5_CON; - uint32 CRU_CLKSEL6_CON; - uint32 CRU_CLKSEL7_CON; - uint32 CRU_CLKSEL8_CON; - uint32 CRU_CLKSEL9_CON; - uint32 CRU_CLKSEL10_CON; - uint32 CRU_CLKSEL11_CON; - uint32 CRU_CLKSEL12_CON; - uint32 CRU_CLKSEL13_CON; - uint32 CRU_CLKSEL14_CON; - uint32 CRU_CLKSEL15_CON; - uint32 CRU_CLKSEL16_CON; - uint32 CRU_CLKSEL17_CON; - uint32 CRU_CLKGATE0_CON; - uint32 CRU_CLKGATE1_CON; - uint32 CRU_CLKGATE2_CON; - uint32 CRU_CLKGATE3_CON; - uint32 CRU_SOFTRST0_CON; - uint32 CRU_SOFTRST1_CON; - uint32 CRU_SOFTRST2_CON; -}CRU_REG,*pCRU_REG; - -//SDMMC0 -typedef enum -{ -IOMUX_SDMMC_1BIT = 0, -IOMUX_SDMMC_4BIT, //default -IOMUX_SDMMC_8BIT, -IOMUX_SDMMC_OTHER -}eIOMUX_SDMMC; -typedef enum _IRQ_NUM -{ - INT_SGI0 , - INT_SGI1 , - INT_SGI2 , - INT_SGI3 , - INT_SGI4 , - INT_SGI5 , - INT_SGI6 , - INT_SGI7 , - INT_SGI8 , - INT_SGI9 , - INT_SGI10 , - INT_SGI11 , - INT_SGI12 , - INT_SGI13 , - INT_SGI14 , - INT_SGI15 , - INT_PPI0 , - INT_PPI1 , - INT_PPI2 , - INT_PPI3 , - INT_PPI4 , - INT_PPI5 , - INT_PPI6 , - INT_PPI7 , - INT_PPI8 , - INT_PPI9 , - INT_PPI10 , - INT_PPI11 , - INT_PPI12 , - INT_PPI13 , - INT_PPI14 , - INT_PPI15 , - - INT_DMAC0_0 , - INT_DMAC0_1 , - INT_DMAC0_2 , - INT_DMAC0_3 , - INT_DMAC2_0 , - INT_DMAC2_1 , - INT_DMAC2_2 , - INT_DMAC2_3 , - INT_DMAC2_4 , - INT_GPU , - INT_VEPU , - INT_VDPU , - INT_VIP , - INT_LCDC , - INT_IPP , - INT_EBC , - INT_USB_OTG0 , - INT_USB_OTG1 , - INT_USB_Host , - INT_MAC , - INT_HIF0 , - INT_HIF1 , - INT_HSADC_TSI , - INT_SDMMC , - INT_SDIO , - INT_eMMC , - INT_SARADC , - INT_NandC , - INT_NandCRDY , - INT_SMC , - INT_PID_FILTER , - INT_I2S_PCM_8CH , - INT_I2S_PCM_2CH , - INT_SPDIF , - INT_UART0 , - INT_UART1 , - INT_UART2 , - INT_UART3 , - INT_SPI0 , - INT_SPI1 , - INT_I2C0 , - INT_I2C1 , - INT_I2C2 , - INT_I2C3 , - INT_TIMER0 , - INT_TIMER1 , - INT_TIMER2 , - INT_TIMER3 , - INT_PWM0 , - INT_PWM1 , - INT_PWM2 , - INT_PWM3 , - INT_WDT , - INT_RTC , - INT_PMU , - INT_GPIO0 , - INT_GPIO1 , - INT_GPIO2 , - INT_GPIO3 , - INT_GPIO4 , - INT_GPIO5 , - INT_GPIO6 , - INT_USB_AHB_ARB , - INT_PERI_AHB_ARB, - INT_A8IRQ0 , - INT_A8IRQ1 , - INT_A8IRQ2 , - INT_A8IRQ3 , - INT_MAXNUM -}eINT_NUM; - -typedef enum _CRU_RST -{ -//cru_rst_con0 - CRU_RST_ARMCORE = 0, - CRU_RST_CPUSUBSYS_INT1AXI, - CRU_RST_CPUSUBSYS_INT1AHB, - CRU_RST_CPUSUBSYS_INT1APB, - CRU_RST_CPUSUBSYS_INT1ATB, - CRU_RST_CPUSUBSYS_INT2, - CRU_RST_DMA0, - CRU_RST_DMA1, - CRU_RST_GIC, - CRU_RST_INMEM, - CRU_RST_TZPC=11, - CRU_RST_ROM, - CRU_RST_I2S0, - CRU_RST_I2S1, - CRU_RST_SPDIF, - CRU_RST_UART0, - CRU_RST_RTC, - CRU_RST_DDRPHY, - CRU_RST_DDRDLL_B0, - CRU_RST_DDRDLL_B1, - CRU_RST_DDRDLL_B2, - CRU_RST_DDRDLL_B3, - CRU_RST_DDRDLL_CMD, - CRU_RST_DDR_CON, - CRU_RST_ARMCORE_DEBUG, - CRU_RST_DAP_DBG, - CRU_RST_CPU_VODEC_A2A, - CRU_RST_CPU_DISPLAY_A2A, - CRU_RST_DAP_SYS, - -// cru_softrst1_con - CRU_RST_PERIPH_INT1_AXI=32, - CRU_RST_PERIPH_INT1_AHB, - CRU_RST_PERIPH_INT1_APB, - CRU_RST_PERIPH_EMEM=36, - CRU_RST_PERIPH_USB, - CRU_RST_DMA2, - CRU_RST_MAC, - CRU_RST_HIF, - CRU_RST_NANDC, - CRU_RST_SMC, - CRU_RST_RESERVED1, - CRU_RST_LSADC, - CRU_RST_SDMMC0, - CRU_RST_SDMMC1, - CRU_RST_EMMC, - CRU_RST_USBOTG0_AHB, - CRU_RST_USBPHY0, - CRU_RST_USBOTG0_CON, - CRU_RST_USBOTG1_AHB, - CRU_RST_USBPHY1, - CRU_RST_USBOTG1_CON, - CRU_RST_UHOST, - CRU_RST_VIP, - CRU_RST_VIP_AHB, - CRU_RST_SPI0, - CRU_RST_SPI1, - CRU_RST_SARADC, - CRU_RST_UART1, - CRU_RST_UART2, - CRU_RST_UART3, - CRU_RST_PWM, - -//CRU_SOFTRST2_CON - CRU_RST_DISPLAY_AXI=64, - CRU_RST_DISPLAY_AHB, - CRU_RST_LCDC, - CRU_RST_IPP, - CRU_RST_EBOOK, - CRU_RST_RESERVED2, - CRU_RST_RESERVED3, - CRU_RST_GPU, - CRU_RST_DDR_REG, - CRU_RST_DDR_CPU, - CRU_RST_PERIPH_CPU_AXI, - CRU_RST_DDR_PERIPH, - CRU_RST_DDR_LCDC, - CRU_RST_RESERVED4, - CRU_RST_RESERVED5, - CRU_RST_DDR_VCODEC, - CRU_RST_DDR_GPU, - CRU_RST_PID_FILTER, - CRU_RST_VCODEC_AXI, - CRU_RST_VCODEC_AHB, - CRU_RST_TIMER0, - CRU_RST_TIMER1, - CRU_RST_TIMER2, - CRU_RST_TIMER3, - - CRU_RST_MAX -}eCRU_RST; - -//GRF Registers - typedef struct tagGPIO_LH - { - uint32 GPIOL; - uint32 GPIOH; - }GPIO_LH_T; - - typedef struct tagGPIO_IOMUX - { - uint32 GPIOA_IOMUX; - uint32 GPIOB_IOMUX; - uint32 GPIOC_IOMUX; - uint32 GPIOD_IOMUX; - }GPIO_IOMUX_T; - //REG FILE registers - typedef volatile struct tagGRF_REG - { - GPIO_LH_T GRF_GPIO_DIR[7]; - GPIO_LH_T GRF_GPIO_DO[7]; - GPIO_LH_T GRF_GPIO_EN[7]; - GPIO_IOMUX_T GRF_GPIO_IOMUX[7]; - GPIO_LH_T GRF_GPIO_PULL[7]; - uint32 GRF_SOC_CON[3]; - uint32 GRF_SOC_STATUS0; - uint32 GRF_DMAC1_CON[3]; - uint32 GRF_DMAC2_CON[4]; - uint32 GRF_UOC0_CON[3]; - uint32 GRF_UOC1_CON[4]; - uint32 GRF_DDRC_CON0; - uint32 GRF_DDRC_STAT; - uint32 reserved[(0x1c8-0x1a0)/4]; - uint32 GRF_OS_REG[4]; - } GRF_REG, *pGRF_REG; - -//TIMER Registers -typedef volatile struct tagTIMER_STRUCT -{ - uint32 TIMER_LOAD_COUNT; - uint32 TIMER_CURR_VALUE; - uint32 TIMER_CTRL_REG; - uint32 TIMER_EOI; - uint32 TIMER_INT_STATUS; -}TIMER_REG,*pTIMER_REG; - -typedef volatile struct tagPMU_REG -{ - uint32 PMU_WAKEUP_EN0; - uint32 PMU_WAKEUP_EN1; - uint32 PMU_WAKEUP_EN2; - uint32 reserved1; - uint32 PMU_PG_CON; - uint32 PMU_MISC_CON; - uint32 PMU_PLL_CNT; - uint32 PMU_PD_ST; - uint32 PMU_INT_ST; -}PMU_REG,*pPMU_REG; - -typedef struct tagSCU_CLK_INFO -{ - uint32 armFreq; //ARM PLL FREQ - uint32 dspFreq; //DSP PLL FREQ - uint32 AuxFreq; //AUX PLL FREQ - uint32 ahbDiv; - uint32 apbDiv; - uint32 armFreqLast; -}SCU_CLK_INFO,*pSCU_CLK_INFO; - -#define g_cruReg ((pCRU_REG)RK29_CRU_REG_BASE) - -#endif - diff --git a/drivers/mtd/rknand/nand_config.h b/drivers/mtd/rknand/nand_config.h deleted file mode 100755 index 1cb460eb6864..000000000000 --- a/drivers/mtd/rknand/nand_config.h +++ /dev/null @@ -1,77 +0,0 @@ -/******************************************************************************** -********************************************************************************* - COPYRIGHT (c) 2004 BY ROCK-CHIP FUZHOU - -- ALL RIGHTS RESERVED -- - -File Name: nand_config.h -Author: RK28XX Driver Develop Group -Created: 25th OCT 2008 -Modified: -Revision: 1.00 -******************************************************************************** -********************************************************************************/ -#ifndef _NAND_CONFIG_H -#define _NAND_CONFIG_H -#define DRIVERS_NAND -#define LINUX - -#include -#include -#include -#include -#include -#include -#include -#include -#include "typedef.h" - -#ifdef CONFIG_ARCH_RK30 -#include -#include -#endif -#ifdef CONFIG_ARCH_RK29 -#include -#include -#endif - -#include -#include "epphal.h" - -//#include "epphal.h" -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef NULL -#define NULL (void*)0 -#endif - -#include "FTL_OSDepend.h" -#include "flash.h" -#include "ftl.h" - -#ifdef CONFIG_MTD_NAND_RK29XX_DEBUG -#undef RKNAND_DEBUG -#define DEBUG_MSG -#define RKNAND_DEBUG(format, arg...) \ - printk(KERN_NOTICE format, ## arg); -#else -#undef RKNAND_DEBUG -#define RKNAND_DEBUG(n, arg...) -#endif - -extern void rk29_power_reset(void); -extern void rkNand_cond_resched(void); - -#define COND_RESCHED() rkNand_cond_resched()//cond_resched() - -extern unsigned long rk_dma_mem_alloc(int size); -extern unsigned long rk_dma_mem_free(unsigned long buf); -#undef PRINTF -#define PRINTF RKNAND_DEBUG -#endif - diff --git a/drivers/mtd/rknand/rknand_base.h b/drivers/mtd/rknand/rknand_base.h index e74761a8a323..b7fa95ab0b84 100755 --- a/drivers/mtd/rknand/rknand_base.h +++ b/drivers/mtd/rknand/rknand_base.h @@ -70,6 +70,8 @@ struct rknand_info { int emmc_clk_power_save_en; char *pdmaBuf; void (*nand_timing_config)(unsigned long AHBnKHz); + void (*rknand_suspend)(void); + void (*rknand_resume)(void); int reserved[20]; }; diff --git a/drivers/mtd/rknand/rknand_base_ko.c b/drivers/mtd/rknand/rknand_base_ko.c index 7043d2d68734..ea49e277ea8a 100755 --- a/drivers/mtd/rknand/rknand_base_ko.c +++ b/drivers/mtd/rknand/rknand_base_ko.c @@ -23,10 +23,11 @@ //#include "api_flash.h" #include "rknand_base.h" #include +#include #define DRIVER_NAME "rk29xxnand" -const char rknand_base_version[] = "rknand_base.c version: 4.34 20120401"; +const char rknand_base_version[] = "rknand_base.c version: 4.38 20120717"; #define NAND_DEBUG_LEVEL0 0 #define NAND_DEBUG_LEVEL1 1 #define NAND_DEBUG_LEVEL2 2 @@ -67,10 +68,23 @@ static char grknand_trac_buf[MAX_TRAC_BUFFER_SIZE]; static char *ptrac_buf = grknand_trac_buf; void trac_log(long lba,int len, int mod) { + unsigned long long t; + unsigned long nanosec_rem; + t = cpu_clock(UINT_MAX); + nanosec_rem = do_div(t, 1000000000); if(mod) - ptrac_buf += sprintf(ptrac_buf,"W %d %d \n",lba,len); + ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] W %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len); else - ptrac_buf += sprintf(ptrac_buf,"R %d %d \n",lba,len); + ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] R %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len); +} + +void trac_logs(char *s) +{ + unsigned long long t; + unsigned long nanosec_rem; + t = cpu_clock(UINT_MAX); + nanosec_rem = do_div(t, 1000000000); + ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] %s\n",(unsigned long) t, nanosec_rem / 1000,s); } static int rkNand_trac_read(char *page, char **start, off_t off, int count, int *eof, @@ -80,7 +94,7 @@ static int rkNand_trac_read(char *page, char **start, off_t off, int count, int int len; len = ptrac_buf - grknand_trac_buf - off; - printk("rkNand_trac_read: page=%x,off=%x,count=%x ,len=%x \n",(int)page,(int)off,count,len); + //printk("rkNand_trac_read: page=%x,off=%x,count=%x ,len=%x \n",(int)page,(int)off,count,len); if (len < 0) len = 0; @@ -321,7 +335,7 @@ static int rknand_nand_timing_cfg(void) if(gpNandInfo->nand_timing_config) { nandc_clk_rate = newclk; - gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz + //gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz } } return 0; @@ -493,12 +507,16 @@ exit_free: static int rknand_suspend(struct platform_device *pdev, pm_message_t state) { gpNandInfo->rknand.rknand_schedule_enable = 0; + if(gpNandInfo->rknand_suspend) + gpNandInfo->rknand_suspend(); NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_suspend: \n"); return 0; } static int rknand_resume(struct platform_device *pdev) { + if(gpNandInfo->rknand_resume) + gpNandInfo->rknand_resume(); gpNandInfo->rknand.rknand_schedule_enable = 1; NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_resume: \n"); return 0; diff --git a/drivers/mtd/rknand/typedef.h b/drivers/mtd/rknand/typedef.h deleted file mode 100755 index 6b7ad87ec3a6..000000000000 --- a/drivers/mtd/rknand/typedef.h +++ /dev/null @@ -1,62 +0,0 @@ - -#ifndef __TYPEDEF_H -#define __TYPEDEF_H - -typedef volatile unsigned int REG32; -typedef volatile unsigned short REG16; -typedef volatile unsigned char REG8; - -typedef int BOOLEAN; -typedef BOOLEAN BOOL; -typedef void (*pFunc)(void); //¶¨Ò庯ÊýÖ¸Õë, ÓÃÓÚµ÷Óþø¶ÔµØÖ· -typedef void (*pFunc1)(unsigned int); //¶¨Ò庯ÊýÖ¸Õë, ÓÃÓÚµ÷Óþø¶ÔµØÖ· -typedef void (*pFunc2)(unsigned int,pFunc); //¶¨Ò庯ÊýÖ¸Õë, ÓÃÓÚµ÷Óþø¶ÔµØÖ· - - -#define FALSE 0 -#define TRUE (!FALSE) -#ifndef NULL - #define NULL 0 -#endif -#define OK 0 -#define ERROR !0 - -//typedef char * va_list; - - -typedef unsigned long uint32; -typedef unsigned long UINT32; -typedef unsigned short UINT16; -typedef unsigned char UINT8; -typedef int INT32; -typedef short INT16; -typedef char INT8; - -typedef unsigned char INT8U; -typedef signed char INT8S; -typedef unsigned short INT16U; -typedef signed short INT16S; -typedef int INT32S; -typedef unsigned int INT32U; - -typedef unsigned long L32U; -typedef signed long L32S; - -typedef unsigned char BYTE; - -//typedef volatile unsigned int data_t; -//typedef volatile unsigned int* addr_t; - -//typedef void (*pFunc)(void); //¶¨Ò庯ÊýÖ¸Õë, ÓÃÓÚµ÷Óþø¶ÔµØÖ· - -typedef unsigned char uint8; -typedef signed char int8; -typedef unsigned short uint16; -typedef signed short int16; -typedef signed long int32; -typedef unsigned long long uint64; -typedef signed long long int64; -//typedef unsigned char bool; -typedef unsigned short WCHAR; - -#endif /*__TYPEDEF_H */ -- 2.34.1