From 36fe783695e7b53432a0c1fd42e2d494ab510dee Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Fri, 9 Dec 2016 14:41:36 +0800 Subject: [PATCH] UPSTREAM: ARM: dts: rockchip: fix missing usbphy unit-names The usbphy subnodes do have a reg property but no unitname, add them. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring Change-Id: I5b48e289b332397ab7c383b839b875aeefa9f114 (cherry picked from commit a8f0fa2764626d2dd808cfbe1a160f2939a36c88) Signed-off-by: Jacob Chen --- arch/arm/boot/dts/rk3066a.dtsi | 4 ++-- arch/arm/boot/dts/rk3188.dtsi | 4 ++-- arch/arm/boot/dts/rk3288.dtsi | 11 +++++++---- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 946f18705e96..be1207d5d404 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -176,14 +176,14 @@ #size-cells = <0>; status = "disabled"; - usbphy0: usb-phy0 { + usbphy0: usb-phy@17c { #phy-cells = <0>; reg = <0x17c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; }; - usbphy1: usb-phy1 { + usbphy1: usb-phy@188 { #phy-cells = <0>; reg = <0x188>; clocks = <&cru SCLK_OTGPHY1>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 6399942f1840..7afcf1b42e88 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -151,14 +151,14 @@ #size-cells = <0>; status = "disabled"; - usbphy0: usb-phy0 { + usbphy0: usb-phy@10c { #phy-cells = <0>; reg = <0x10c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; }; - usbphy1: usb-phy1 { + usbphy1: usb-phy@11c { #phy-cells = <0>; reg = <0x11c>; clocks = <&cru SCLK_OTGPHY1>; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 4f48c5011982..dada333aa96d 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -862,33 +862,36 @@ status = "disabled"; }; - usbphy: phy { + usbphy: usbphy { compatible = "rockchip,rk3288-usb-phy"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; - usbphy0: usb-phy0 { + usbphy0: usb-phy@320 { #phy-cells = <0>; reg = <0x320>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; resets = <&cru SRST_USBOTG_PHY>; reset-names = "phy-reset"; }; - usbphy1: usb-phy1 { + usbphy1: usb-phy@334 { #phy-cells = <0>; reg = <0x334>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; - usbphy2: usb-phy2 { + usbphy2: usb-phy@348 { #phy-cells = <0>; reg = <0x348>; clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; + #clock-cells = <0>; resets = <&cru SRST_USBHOST1_PHY>; reset-names = "phy-reset"; }; -- 2.34.1