From 37cddff8e330a8771afcdab96d9d8ec385584daf Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 11 Jul 2014 16:46:54 +0100 Subject: [PATCH] MIPS: 16 byte align MSA vector context The MSA specification upon first read appears to suggest that it is safe to perform vector loads & stores with arbitrary alignment. However it leaves provision for "address-dependent exceptions"... Align the vector context to a 16 byte boundary to ensure that the kernel cannot cause any such exceptions. Note that the fpu field of struct thread_struct was already at a 16 byte boundary within the struct, the introduction of FPU_ALIGN simply makes the requirement explicit. The only part of this impacting the generated kernel binary is ARCH_MIN_TASKALIGN. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7308/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/processor.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index ad70cba8daff..5733faba4f7f 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -238,7 +238,13 @@ typedef struct { unsigned long seg; } mm_segment_t; -#define ARCH_MIN_TASKALIGN 8 +#ifdef CONFIG_CPU_HAS_MSA +# define ARCH_MIN_TASKALIGN 16 +# define FPU_ALIGN __aligned(16) +#else +# define ARCH_MIN_TASKALIGN 8 +# define FPU_ALIGN +#endif struct mips_abi; @@ -255,7 +261,7 @@ struct thread_struct { unsigned long cp0_status; /* Saved fpu/fpu emulator stuff. */ - struct mips_fpu_struct fpu; + struct mips_fpu_struct fpu FPU_ALIGN; #ifdef CONFIG_MIPS_MT_FPAFF /* Emulated instruction count */ unsigned long emulated_fp; -- 2.34.1