From 38b8979da186e4d97a09083e873e4dd7c9e80030 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 28 Jul 2003 04:25:36 +0000 Subject: [PATCH] Specify the value type for the register, not just the size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7357 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/SparcV9/SparcV9_Reg.td | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/Target/SparcV9/SparcV9_Reg.td b/lib/Target/SparcV9/SparcV9_Reg.td index 3997e031fe1..136620e7880 100644 --- a/lib/Target/SparcV9/SparcV9_Reg.td +++ b/lib/Target/SparcV9/SparcV9_Reg.td @@ -9,7 +9,10 @@ class V9Reg : Register { set Namespace = "SparcV9"; } // Ri - One of the 32 64 bit integer registers -class Ri num> : V9Reg { set Size = 64; field bits<5> Num = num; } +class Ri num> : V9Reg { + set RegType = i64; // All integer registers are 64 bits in size + field bits<5> Num = num; // Numbers are identified with a 5 bit ID +} def G0 : Ri< 0>; def G1 : Ri< 1>; def G2 : Ri< 2>; def G3 : Ri< 3>; def G4 : Ri< 4>; def G5 : Ri< 5>; def G6 : Ri< 6>; def G7 : Ri< 7>; -- 2.34.1