From 3a86e1396230748f17a521915bc802939a787eac Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Mon, 3 Sep 2012 02:06:46 +0000 Subject: [PATCH] [ms-inline asm] Expose the Kind and Opcode variables from the MatchInstructionImpl() function. These values are used by the ConvertToMCInst() function to index into the ConversionTable. The values are also needed to call the GetMCInstOperandNum() function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163101 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/MC/MCTargetAsmParser.h | 2 +- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 5 +++- .../MBlaze/AsmParser/MBlazeAsmParser.cpp | 4 ++- lib/Target/X86/AsmParser/X86AsmParser.cpp | 27 ++++++++++++------- utils/TableGen/AsmMatcherEmitter.cpp | 13 +++++---- 5 files changed, 34 insertions(+), 17 deletions(-) diff --git a/include/llvm/MC/MCTargetAsmParser.h b/include/llvm/MC/MCTargetAsmParser.h index 714d9ef5834..40daab888cb 100644 --- a/include/llvm/MC/MCTargetAsmParser.h +++ b/include/llvm/MC/MCTargetAsmParser.h @@ -85,7 +85,7 @@ public: /// On failure, the target parser is responsible for emitting a diagnostic /// explaining the match failure. virtual bool - MatchInstruction(SMLoc IDLoc, + MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode, SmallVectorImpl &Operands, SmallVectorImpl &MCInsts, unsigned &OrigErrorInfo, diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 646b64fb069..ebb0f8d8de5 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -7456,9 +7456,12 @@ MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl &Operands, MCStreamer &Out) { MCInst Inst; + unsigned Kind; + unsigned Opcode; unsigned ErrorInfo; unsigned MatchResult; - MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo); + + MatchResult = MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo); switch (MatchResult) { default: break; case Match_Success: diff --git a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp index 70d0282519a..9e6d397d45f 100644 --- a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp +++ b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp @@ -317,9 +317,11 @@ MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl &Operands, MCStreamer &Out) { MCInst Inst; + unsigned Kind; + unsigned Opcode; unsigned ErrorInfo; - switch (MatchInstructionImpl(Operands, Inst, ErrorInfo)) { + switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo)) { default: break; case Match_Success: Out.EmitInstruction(Inst); diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index d6791cea9ae..19177211945 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -67,7 +67,7 @@ private: SmallVectorImpl &Operands, MCStreamer &Out); - bool MatchInstruction(SMLoc IDLoc, + bool MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode, SmallVectorImpl &Operands, SmallVectorImpl &MCInsts, unsigned &OrigErrorInfo, @@ -1516,9 +1516,13 @@ bool X86AsmParser:: MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl &Operands, MCStreamer &Out) { - SmallVector Insts; + unsigned Kind; + unsigned Opcode; unsigned ErrorInfo; - bool Error = MatchInstruction(IDLoc, Operands, Insts, ErrorInfo); + SmallVector Insts; + + bool Error = MatchInstruction(IDLoc, Kind, Opcode, Operands, Insts, + ErrorInfo); if (!Error) for (unsigned i = 0, e = Insts.size(); i != e; ++i) Out.EmitInstruction(Insts[i]); @@ -1526,7 +1530,7 @@ MatchAndEmitInstruction(SMLoc IDLoc, } bool X86AsmParser:: -MatchInstruction(SMLoc IDLoc, +MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode, SmallVectorImpl &Operands, SmallVectorImpl &MCInsts, unsigned &OrigErrorInfo, bool matchingInlineAsm) { @@ -1568,7 +1572,7 @@ MatchInstruction(SMLoc IDLoc, MCInst Inst; // First, try a direct match. - switch (MatchInstructionImpl(Operands, Inst, OrigErrorInfo, + switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, OrigErrorInfo, isParsingIntelSyntax())) { default: break; case Match_Success: @@ -1616,14 +1620,19 @@ MatchInstruction(SMLoc IDLoc, Tmp[Base.size()] = Suffixes[0]; unsigned ErrorInfoIgnore; unsigned Match1, Match2, Match3, Match4; + unsigned tKind, tOpcode; - Match1 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore); + Match1 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore); + if (Match1 == Match_Success) { Kind = tKind; Opcode = tOpcode; } Tmp[Base.size()] = Suffixes[1]; - Match2 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore); + Match2 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore); + if (Match2 == Match_Success) { Kind = tKind; Opcode = tOpcode; } Tmp[Base.size()] = Suffixes[2]; - Match3 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore); + Match3 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore); + if (Match3 == Match_Success) { Kind = tKind; Opcode = tOpcode; } Tmp[Base.size()] = Suffixes[3]; - Match4 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore); + Match4 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore); + if (Match4 == Match_Success) { Kind = tKind; Opcode = tOpcode; } // Restore the old token. Op->setTokenValue(Base); diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 3fff1527d31..32c0f2e4d44 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -2585,9 +2585,10 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { << "&Operands,\n unsigned OperandNum, unsigned " << "&MCOperandNum);\n"; OS << " bool MnemonicIsValid(StringRef Mnemonic);\n"; - OS << " unsigned MatchInstructionImpl(\n"; - OS << " const SmallVectorImpl &Operands,\n"; - OS << " MCInst &Inst, unsigned &ErrorInfo, unsigned VariantID = 0);\n"; + OS << " unsigned MatchInstructionImpl(\n" + << " const SmallVectorImpl &Operands,\n" + << " unsigned &Kind, unsigned &Opcode, MCInst &Inst, " + << "unsigned &ErrorInfo,\n unsigned VariantID = 0);\n"; if (Info.OperandMatchInfo.size()) { OS << "\n enum OperandMatchResultTy {\n"; @@ -2767,8 +2768,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { << Target.getName() << ClassName << "::\n" << "MatchInstructionImpl(const SmallVectorImpl" << " &Operands,\n"; - OS << " MCInst &Inst, unsigned &ErrorInfo, "; - OS << "unsigned VariantID) {\n"; + OS << " unsigned &Kind, unsigned &Opcode, MCInst &Inst,"; + OS << "\n unsigned &ErrorInfo, unsigned VariantID) {\n"; OS << " // Eliminate obvious mismatches.\n"; OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n"; @@ -2885,6 +2886,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { if (!InsnCleanupFn.empty()) OS << " " << InsnCleanupFn << "(Inst);\n"; + OS << " Kind = it->ConvertFn;\n"; + OS << " Opcode = it->Opcode;\n"; OS << " return Match_Success;\n"; OS << " }\n\n"; -- 2.34.1