From 3d5f22734f013619f37219afc9c8d57de7c00871 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Thu, 7 Jan 2016 03:19:23 +0000 Subject: [PATCH] [WebAssembly] Add -m:e to the target triple. This enables ELF-style name mangling, which primarily means using ".L" for private symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257020 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 5 +++-- test/CodeGen/WebAssembly/call.ll | 2 +- test/CodeGen/WebAssembly/cfg-stackify.ll | 2 +- test/CodeGen/WebAssembly/comparisons_f32.ll | 2 +- test/CodeGen/WebAssembly/comparisons_f64.ll | 2 +- test/CodeGen/WebAssembly/comparisons_i32.ll | 2 +- test/CodeGen/WebAssembly/comparisons_i64.ll | 2 +- test/CodeGen/WebAssembly/conv.ll | 2 +- test/CodeGen/WebAssembly/copysign-casts.ll | 2 +- test/CodeGen/WebAssembly/dead-vreg.ll | 2 +- test/CodeGen/WebAssembly/f32.ll | 2 +- test/CodeGen/WebAssembly/f64.ll | 2 +- test/CodeGen/WebAssembly/fast-isel.ll | 2 +- test/CodeGen/WebAssembly/frem.ll | 2 +- test/CodeGen/WebAssembly/func.ll | 2 +- test/CodeGen/WebAssembly/global.ll | 8 ++++---- test/CodeGen/WebAssembly/globl.ll | 2 +- test/CodeGen/WebAssembly/i32.ll | 2 +- test/CodeGen/WebAssembly/i64.ll | 2 +- test/CodeGen/WebAssembly/ident.ll | 2 +- test/CodeGen/WebAssembly/immediates.ll | 2 +- test/CodeGen/WebAssembly/inline-asm.ll | 2 +- test/CodeGen/WebAssembly/legalize.ll | 2 +- test/CodeGen/WebAssembly/load-ext.ll | 2 +- test/CodeGen/WebAssembly/load-store-i1.ll | 2 +- test/CodeGen/WebAssembly/load.ll | 2 +- test/CodeGen/WebAssembly/loop-idiom.ll | 2 +- test/CodeGen/WebAssembly/memory-addr32.ll | 2 +- test/CodeGen/WebAssembly/memory-addr64.ll | 2 +- test/CodeGen/WebAssembly/offset-folding.ll | 2 +- test/CodeGen/WebAssembly/offset.ll | 2 +- test/CodeGen/WebAssembly/phi.ll | 2 +- test/CodeGen/WebAssembly/reg-stackify.ll | 2 +- test/CodeGen/WebAssembly/return-int32.ll | 2 +- test/CodeGen/WebAssembly/return-void.ll | 2 +- test/CodeGen/WebAssembly/returned.ll | 2 +- test/CodeGen/WebAssembly/select.ll | 2 +- test/CodeGen/WebAssembly/signext-zeroext.ll | 2 +- test/CodeGen/WebAssembly/store-results.ll | 2 +- test/CodeGen/WebAssembly/store-trunc.ll | 2 +- test/CodeGen/WebAssembly/store.ll | 2 +- test/CodeGen/WebAssembly/switch.ll | 2 +- test/CodeGen/WebAssembly/unreachable.ll | 2 +- test/CodeGen/WebAssembly/unused-argument.ll | 2 +- test/CodeGen/WebAssembly/userstack.ll | 2 +- test/CodeGen/WebAssembly/varargs.ll | 2 +- test/CodeGen/WebAssembly/vtable.ll | 2 +- 47 files changed, 52 insertions(+), 51 deletions(-) diff --git a/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index e31ea46de9f..b290b4bf744 100644 --- a/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -45,8 +45,9 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : LLVMTargetMachine(T, TT.isArch64Bit() ? "e-p:64:64-i64:64-n32:64-S128" - : "e-p:32:32-i64:64-n32:64-S128", + : LLVMTargetMachine(T, + TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128" + : "e-m:e-p:32:32-i64:64-n32:64-S128", TT, CPU, FS, Options, RM, CM, OL), TLOF(make_unique()) { // WebAssembly type-checks expressions, but a noreturn function with a return diff --git a/test/CodeGen/WebAssembly/call.ll b/test/CodeGen/WebAssembly/call.ll index 9158ccec097..6ef443e91d1 100644 --- a/test/CodeGen/WebAssembly/call.ll +++ b/test/CodeGen/WebAssembly/call.ll @@ -2,7 +2,7 @@ ; Test that basic call operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i32 @i32_nullary() diff --git a/test/CodeGen/WebAssembly/cfg-stackify.ll b/test/CodeGen/WebAssembly/cfg-stackify.ll index d0250dc29e0..f9d5c5f3de6 100644 --- a/test/CodeGen/WebAssembly/cfg-stackify.ll +++ b/test/CodeGen/WebAssembly/cfg-stackify.ll @@ -3,7 +3,7 @@ ; Test the CFG stackifier pass. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare void @something() diff --git a/test/CodeGen/WebAssembly/comparisons_f32.ll b/test/CodeGen/WebAssembly/comparisons_f32.ll index 6df37ea1c6d..2d324f7f208 100644 --- a/test/CodeGen/WebAssembly/comparisons_f32.ll +++ b/test/CodeGen/WebAssembly/comparisons_f32.ll @@ -3,7 +3,7 @@ ; Test that basic 32-bit floating-point comparison operations assemble as ; expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: ord_f32: diff --git a/test/CodeGen/WebAssembly/comparisons_f64.ll b/test/CodeGen/WebAssembly/comparisons_f64.ll index f5acc64b667..22fbc1ae4c1 100644 --- a/test/CodeGen/WebAssembly/comparisons_f64.ll +++ b/test/CodeGen/WebAssembly/comparisons_f64.ll @@ -3,7 +3,7 @@ ; Test that basic 64-bit floating-point comparison operations assemble as ; expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: ord_f64: diff --git a/test/CodeGen/WebAssembly/comparisons_i32.ll b/test/CodeGen/WebAssembly/comparisons_i32.ll index b724cec1cc6..db81ef36e27 100644 --- a/test/CodeGen/WebAssembly/comparisons_i32.ll +++ b/test/CodeGen/WebAssembly/comparisons_i32.ll @@ -2,7 +2,7 @@ ; Test that basic 32-bit integer comparison operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: eq_i32: diff --git a/test/CodeGen/WebAssembly/comparisons_i64.ll b/test/CodeGen/WebAssembly/comparisons_i64.ll index 898591999be..19e5cf8603b 100644 --- a/test/CodeGen/WebAssembly/comparisons_i64.ll +++ b/test/CodeGen/WebAssembly/comparisons_i64.ll @@ -2,7 +2,7 @@ ; Test that basic 64-bit integer comparison operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: eq_i64: diff --git a/test/CodeGen/WebAssembly/conv.ll b/test/CodeGen/WebAssembly/conv.ll index e1acaca2c9e..1a4bd72d72d 100644 --- a/test/CodeGen/WebAssembly/conv.ll +++ b/test/CodeGen/WebAssembly/conv.ll @@ -2,7 +2,7 @@ ; Test that basic conversion operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: i32_wrap_i64: diff --git a/test/CodeGen/WebAssembly/copysign-casts.ll b/test/CodeGen/WebAssembly/copysign-casts.ll index 760e4913301..f8e50d043ca 100644 --- a/test/CodeGen/WebAssembly/copysign-casts.ll +++ b/test/CodeGen/WebAssembly/copysign-casts.ll @@ -3,7 +3,7 @@ ; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get ; unfolded. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare double @copysign(double, double) nounwind readnone diff --git a/test/CodeGen/WebAssembly/dead-vreg.ll b/test/CodeGen/WebAssembly/dead-vreg.ll index b03e1569fde..29a41990961 100644 --- a/test/CodeGen/WebAssembly/dead-vreg.ll +++ b/test/CodeGen/WebAssembly/dead-vreg.ll @@ -2,7 +2,7 @@ ; Check that unused vregs aren't assigned registers. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" define void @foo(i32* nocapture %a, i32 %w, i32 %h) { diff --git a/test/CodeGen/WebAssembly/f32.ll b/test/CodeGen/WebAssembly/f32.ll index 777010064cd..25d057e8958 100644 --- a/test/CodeGen/WebAssembly/f32.ll +++ b/test/CodeGen/WebAssembly/f32.ll @@ -2,7 +2,7 @@ ; Test that basic 32-bit floating-point operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare float @llvm.fabs.f32(float) diff --git a/test/CodeGen/WebAssembly/f64.ll b/test/CodeGen/WebAssembly/f64.ll index 302ee79389b..d9c16eedf51 100644 --- a/test/CodeGen/WebAssembly/f64.ll +++ b/test/CodeGen/WebAssembly/f64.ll @@ -2,7 +2,7 @@ ; Test that basic 64-bit floating-point operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare double @llvm.fabs.f64(double) diff --git a/test/CodeGen/WebAssembly/fast-isel.ll b/test/CodeGen/WebAssembly/fast-isel.ll index 07d78c1415e..7f9f20fa708 100644 --- a/test/CodeGen/WebAssembly/fast-isel.ll +++ b/test/CodeGen/WebAssembly/fast-isel.ll @@ -2,7 +2,7 @@ ; RUN: -fast-isel -fast-isel-abort=1 -verify-machineinstrs \ ; RUN: | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; This tests very minimal fast-isel functionality. diff --git a/test/CodeGen/WebAssembly/frem.ll b/test/CodeGen/WebAssembly/frem.ll index 688370313b4..1d7ac959e5b 100644 --- a/test/CodeGen/WebAssembly/frem.ll +++ b/test/CodeGen/WebAssembly/frem.ll @@ -2,7 +2,7 @@ ; Test that the frem instruction works. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: frem32: diff --git a/test/CodeGen/WebAssembly/func.ll b/test/CodeGen/WebAssembly/func.ll index 6f42dc744ac..137d63197f6 100644 --- a/test/CodeGen/WebAssembly/func.ll +++ b/test/CodeGen/WebAssembly/func.ll @@ -2,7 +2,7 @@ ; Test that basic functions assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: f0: diff --git a/test/CodeGen/WebAssembly/global.ll b/test/CodeGen/WebAssembly/global.ll index 5f149ed067c..29c47e1e8e9 100644 --- a/test/CodeGen/WebAssembly/global.ll +++ b/test/CodeGen/WebAssembly/global.ll @@ -2,7 +2,7 @@ ; Test that globals assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-NOT: llvm.used @@ -29,11 +29,11 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ret i8* %p } -; CHECK: .type g,@object +; CHECK: .type .Lg,@object ; CHECK: .align 2{{$}} -; CHECK-NEXT: g: +; CHECK-NEXT: .Lg: ; CHECK-NEXT: .int32 1337{{$}} -; CHECK-NEXT: .size g, 4{{$}} +; CHECK-NEXT: .size .Lg, 4{{$}} @g = private global i32 1337 ; CHECK-LABEL: ud: diff --git a/test/CodeGen/WebAssembly/globl.ll b/test/CodeGen/WebAssembly/globl.ll index a5dc028c1db..91d3ade4666 100644 --- a/test/CodeGen/WebAssembly/globl.ll +++ b/test/CodeGen/WebAssembly/globl.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK: .globl foo diff --git a/test/CodeGen/WebAssembly/i32.ll b/test/CodeGen/WebAssembly/i32.ll index ab29b0472bf..10d97ad9e6d 100644 --- a/test/CodeGen/WebAssembly/i32.ll +++ b/test/CodeGen/WebAssembly/i32.ll @@ -2,7 +2,7 @@ ; Test that basic 32-bit integer operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i32 @llvm.ctlz.i32(i32, i1) diff --git a/test/CodeGen/WebAssembly/i64.ll b/test/CodeGen/WebAssembly/i64.ll index 769f7426675..6dd46a91fad 100644 --- a/test/CodeGen/WebAssembly/i64.ll +++ b/test/CodeGen/WebAssembly/i64.ll @@ -2,7 +2,7 @@ ; Test that basic 64-bit integer operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i64 @llvm.ctlz.i64(i64, i1) diff --git a/test/CodeGen/WebAssembly/ident.ll b/test/CodeGen/WebAssembly/ident.ll index 1e0dc2aa672..49c188ec257 100644 --- a/test/CodeGen/WebAssembly/ident.ll +++ b/test/CodeGen/WebAssembly/ident.ll @@ -2,7 +2,7 @@ ; Test llvm.ident. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK: .ident "hello world" diff --git a/test/CodeGen/WebAssembly/immediates.ll b/test/CodeGen/WebAssembly/immediates.ll index abab11f2254..735b386b4fc 100644 --- a/test/CodeGen/WebAssembly/immediates.ll +++ b/test/CodeGen/WebAssembly/immediates.ll @@ -2,7 +2,7 @@ ; Test that basic immediates assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: zero_i32: diff --git a/test/CodeGen/WebAssembly/inline-asm.ll b/test/CodeGen/WebAssembly/inline-asm.ll index fc066c4b812..5704abd5674 100644 --- a/test/CodeGen/WebAssembly/inline-asm.ll +++ b/test/CodeGen/WebAssembly/inline-asm.ll @@ -2,7 +2,7 @@ ; Test basic inline assembly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: foo: diff --git a/test/CodeGen/WebAssembly/legalize.ll b/test/CodeGen/WebAssembly/legalize.ll index e780b2ee36c..5feb2e8c8c7 100644 --- a/test/CodeGen/WebAssembly/legalize.ll +++ b/test/CodeGen/WebAssembly/legalize.ll @@ -2,7 +2,7 @@ ; Test various types and operators that need to be legalized. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: shl_i3: diff --git a/test/CodeGen/WebAssembly/load-ext.ll b/test/CodeGen/WebAssembly/load-ext.ll index 0ffcd38a866..d52df3361a3 100644 --- a/test/CodeGen/WebAssembly/load-ext.ll +++ b/test/CodeGen/WebAssembly/load-ext.ll @@ -2,7 +2,7 @@ ; Test that extending loads are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: sext_i8_i32: diff --git a/test/CodeGen/WebAssembly/load-store-i1.ll b/test/CodeGen/WebAssembly/load-store-i1.ll index 37b51472947..47e2e8cb254 100644 --- a/test/CodeGen/WebAssembly/load-store-i1.ll +++ b/test/CodeGen/WebAssembly/load-store-i1.ll @@ -2,7 +2,7 @@ ; Test that i1 extending loads and truncating stores are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: load_u_i1_i32: diff --git a/test/CodeGen/WebAssembly/load.ll b/test/CodeGen/WebAssembly/load.ll index aa8ae689e0d..243fa9d50ad 100644 --- a/test/CodeGen/WebAssembly/load.ll +++ b/test/CodeGen/WebAssembly/load.ll @@ -2,7 +2,7 @@ ; Test that basic loads are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: ldi32: diff --git a/test/CodeGen/WebAssembly/loop-idiom.ll b/test/CodeGen/WebAssembly/loop-idiom.ll index 2906df20a22..2a233c40690 100644 --- a/test/CodeGen/WebAssembly/loop-idiom.ll +++ b/test/CodeGen/WebAssembly/loop-idiom.ll @@ -1,6 +1,6 @@ ; RUN: opt -loop-idiom -S < %s -march=wasm32 | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" diff --git a/test/CodeGen/WebAssembly/memory-addr32.ll b/test/CodeGen/WebAssembly/memory-addr32.ll index e2dd556bddc..e6c15633fd6 100644 --- a/test/CodeGen/WebAssembly/memory-addr32.ll +++ b/test/CodeGen/WebAssembly/memory-addr32.ll @@ -2,7 +2,7 @@ ; Test that basic memory operations assemble as expected with 32-bit addresses. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i32 @llvm.wasm.memory.size.i32() nounwind readonly diff --git a/test/CodeGen/WebAssembly/memory-addr64.ll b/test/CodeGen/WebAssembly/memory-addr64.ll index 5de1f2b11cf..d504c277f30 100644 --- a/test/CodeGen/WebAssembly/memory-addr64.ll +++ b/test/CodeGen/WebAssembly/memory-addr64.ll @@ -2,7 +2,7 @@ ; Test that basic memory operations assemble as expected with 64-bit addresses. -target datalayout = "e-p:64:64-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128" target triple = "wasm64-unknown-unknown" declare i64 @llvm.wasm.memory.size.i64() nounwind readonly diff --git a/test/CodeGen/WebAssembly/offset-folding.ll b/test/CodeGen/WebAssembly/offset-folding.ll index 2b4e8a90b0f..159a25eba35 100644 --- a/test/CodeGen/WebAssembly/offset-folding.ll +++ b/test/CodeGen/WebAssembly/offset-folding.ll @@ -2,7 +2,7 @@ ; Test that constant offsets can be folded into global addresses. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; FIXME: make this 'external' and make sure it still works. WebAssembly diff --git a/test/CodeGen/WebAssembly/offset.ll b/test/CodeGen/WebAssembly/offset.ll index 901801d7dbb..828f40206a9 100644 --- a/test/CodeGen/WebAssembly/offset.ll +++ b/test/CodeGen/WebAssembly/offset.ll @@ -2,7 +2,7 @@ ; Test constant load and store address offsets. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; With an nuw add, we can fold an offset. diff --git a/test/CodeGen/WebAssembly/phi.ll b/test/CodeGen/WebAssembly/phi.ll index bae8a7c9e3b..7bce1ba8bd1 100644 --- a/test/CodeGen/WebAssembly/phi.ll +++ b/test/CodeGen/WebAssembly/phi.ll @@ -2,7 +2,7 @@ ; Test that phis are lowered. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; Basic phi triangle. diff --git a/test/CodeGen/WebAssembly/reg-stackify.ll b/test/CodeGen/WebAssembly/reg-stackify.ll index 1c1b1e193f7..4dc21e34be4 100644 --- a/test/CodeGen/WebAssembly/reg-stackify.ll +++ b/test/CodeGen/WebAssembly/reg-stackify.ll @@ -2,7 +2,7 @@ ; Test the register stackifier pass. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; No because of pointer aliasing. diff --git a/test/CodeGen/WebAssembly/return-int32.ll b/test/CodeGen/WebAssembly/return-int32.ll index 663cef4e459..a93a0f6c438 100644 --- a/test/CodeGen/WebAssembly/return-int32.ll +++ b/test/CodeGen/WebAssembly/return-int32.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: return_i32: diff --git a/test/CodeGen/WebAssembly/return-void.ll b/test/CodeGen/WebAssembly/return-void.ll index 4933bfcb87e..65ff5f32571 100644 --- a/test/CodeGen/WebAssembly/return-void.ll +++ b/test/CodeGen/WebAssembly/return-void.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: return_void: diff --git a/test/CodeGen/WebAssembly/returned.ll b/test/CodeGen/WebAssembly/returned.ll index e208e198c73..cfb96285c54 100644 --- a/test/CodeGen/WebAssembly/returned.ll +++ b/test/CodeGen/WebAssembly/returned.ll @@ -2,7 +2,7 @@ ; Test that the "returned" attribute is optimized effectively. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: _Z3foov: diff --git a/test/CodeGen/WebAssembly/select.ll b/test/CodeGen/WebAssembly/select.ll index 1b1d7aed715..416f58cac0d 100644 --- a/test/CodeGen/WebAssembly/select.ll +++ b/test/CodeGen/WebAssembly/select.ll @@ -3,7 +3,7 @@ ; Test that wasm select instruction is selected from LLVM select instruction. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: select_i32_bool: diff --git a/test/CodeGen/WebAssembly/signext-zeroext.ll b/test/CodeGen/WebAssembly/signext-zeroext.ll index 40d49af0ccc..48490c30dc3 100644 --- a/test/CodeGen/WebAssembly/signext-zeroext.ll +++ b/test/CodeGen/WebAssembly/signext-zeroext.ll @@ -2,7 +2,7 @@ ; Test zeroext and signext ABI keywords -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: z2s_func: diff --git a/test/CodeGen/WebAssembly/store-results.ll b/test/CodeGen/WebAssembly/store-results.ll index 73479e544db..ae74133fe38 100644 --- a/test/CodeGen/WebAssembly/store-results.ll +++ b/test/CodeGen/WebAssembly/store-results.ll @@ -3,7 +3,7 @@ ; Test that the wasm-store-results pass makes users of stored values use the ; result of store expressions to reduce get_local/set_local traffic. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: single_block: diff --git a/test/CodeGen/WebAssembly/store-trunc.ll b/test/CodeGen/WebAssembly/store-trunc.ll index c12b716dfd5..d069af1da7b 100644 --- a/test/CodeGen/WebAssembly/store-trunc.ll +++ b/test/CodeGen/WebAssembly/store-trunc.ll @@ -2,7 +2,7 @@ ; Test that truncating stores are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: trunc_i8_i32: diff --git a/test/CodeGen/WebAssembly/store.ll b/test/CodeGen/WebAssembly/store.ll index 442caedef3a..dc93ebbbadb 100644 --- a/test/CodeGen/WebAssembly/store.ll +++ b/test/CodeGen/WebAssembly/store.ll @@ -2,7 +2,7 @@ ; Test that basic stores are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: sti32: diff --git a/test/CodeGen/WebAssembly/switch.ll b/test/CodeGen/WebAssembly/switch.ll index 7f6f6efff7d..398cb0b96dc 100644 --- a/test/CodeGen/WebAssembly/switch.ll +++ b/test/CodeGen/WebAssembly/switch.ll @@ -3,7 +3,7 @@ ; Test switch instructions. Block placement is disabled because it reorders ; the blocks in a way that isn't interesting here. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare void @foo0() diff --git a/test/CodeGen/WebAssembly/unreachable.ll b/test/CodeGen/WebAssembly/unreachable.ll index 414767e5c35..2b031128350 100644 --- a/test/CodeGen/WebAssembly/unreachable.ll +++ b/test/CodeGen/WebAssembly/unreachable.ll @@ -4,7 +4,7 @@ ; Test that LLVM unreachable instruction and trap intrinsic are lowered to ; wasm unreachable -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare void @llvm.trap() diff --git a/test/CodeGen/WebAssembly/unused-argument.ll b/test/CodeGen/WebAssembly/unused-argument.ll index e7851b216cb..285168cfe6d 100644 --- a/test/CodeGen/WebAssembly/unused-argument.ll +++ b/test/CodeGen/WebAssembly/unused-argument.ll @@ -2,7 +2,7 @@ ; Make sure that argument offsets are correct even if some arguments are unused. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: unused_first: diff --git a/test/CodeGen/WebAssembly/userstack.ll b/test/CodeGen/WebAssembly/userstack.ll index 6e01e36cf9f..d102e025128 100644 --- a/test/CodeGen/WebAssembly/userstack.ll +++ b/test/CodeGen/WebAssembly/userstack.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -asm-verbose=false -fast-isel | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: alloca32: diff --git a/test/CodeGen/WebAssembly/varargs.ll b/test/CodeGen/WebAssembly/varargs.ll index c564d942074..95919225c79 100644 --- a/test/CodeGen/WebAssembly/varargs.ll +++ b/test/CodeGen/WebAssembly/varargs.ll @@ -2,7 +2,7 @@ ; Test varargs constructs. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; Test va_start. diff --git a/test/CodeGen/WebAssembly/vtable.ll b/test/CodeGen/WebAssembly/vtable.ll index 38298bc474b..739ba2aaf5a 100644 --- a/test/CodeGen/WebAssembly/vtable.ll +++ b/test/CodeGen/WebAssembly/vtable.ll @@ -11,7 +11,7 @@ ; struct D : public B; ; Each with a virtual dtor and method foo. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" %struct.A = type { i32 (...)** } -- 2.34.1