From 3d9013f5db4d5680be5b1abcd7372b44342af04c Mon Sep 17 00:00:00 2001 From: Feng Xiao Date: Wed, 16 Mar 2016 20:31:14 +0800 Subject: [PATCH] ARM64: dts: rockchip: rk3368: fix cpu get regulator and clock error we only add the property of regulator and clock to cpu0 and cpu4 node, but if cpu4~cpu7 is down and then we up cpu5~cpu7, they will can not get their regulator and clock. So we should add the properties to all cpu node. Change-Id: Id601fa3d3d05875f7c68f2a5472dc0eefefb6096 Signed-off-by: Feng Xiao --- .../boot/dts/rockchip/rk3368-tb-sheep.dts | 24 +++++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 +++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts b/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts index d21a6eac9e55..e1a17f0a4a8d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts @@ -111,10 +111,34 @@ cpu-supply = <&syr827>; }; +&cpu_l1 { + cpu-supply = <&syr827>; +}; + +&cpu_l2 { + cpu-supply = <&syr827>; +}; + +&cpu_l3 { + cpu-supply = <&syr827>; +}; + &cpu_b0 { cpu-supply = <&syr827>; }; +&cpu_b1 { + cpu-supply = <&syr827>; +}; + +&cpu_b2 { + cpu-supply = <&syr827>; +}; + +&cpu_b3 { + cpu-supply = <&syr827>; +}; + &gpu { logic-supply = <&vdd_logic>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 55af19b5d5c5..1546d5221f82 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -137,6 +137,7 @@ reg = <0x0 0x1>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + clocks = <&cru ARMCLKL>; operating-points-v2 = <&cluster1_opp>; }; @@ -146,6 +147,7 @@ reg = <0x0 0x2>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + clocks = <&cru ARMCLKL>; operating-points-v2 = <&cluster1_opp>; }; @@ -155,6 +157,7 @@ reg = <0x0 0x3>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + clocks = <&cru ARMCLKL>; operating-points-v2 = <&cluster1_opp>; }; @@ -174,6 +177,7 @@ reg = <0x0 0x101>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + clocks = <&cru ARMCLKB>; operating-points-v2 = <&cluster0_opp>; }; @@ -183,6 +187,7 @@ reg = <0x0 0x102>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + clocks = <&cru ARMCLKB>; operating-points-v2 = <&cluster0_opp>; }; @@ -192,6 +197,7 @@ reg = <0x0 0x103>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + clocks = <&cru ARMCLKB>; operating-points-v2 = <&cluster0_opp>; }; }; -- 2.34.1