From 3f4be4fb86172e6b87a457b338483efc0c1efd05 Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Sat, 5 Feb 2011 15:11:32 +0000 Subject: [PATCH] Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be enough for caller to allocate one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124949 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FrameLowering.cpp | 5 ----- lib/Target/X86/X86FrameLowering.h | 3 +-- lib/Target/X86/X86ISelLowering.cpp | 21 +++++++++++++++++-- .../X86/2009-06-03-Win64DisableRedZone.ll | 9 ++++---- test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll | 14 ++++++------- test/CodeGen/X86/win64_params.ll | 4 ++-- test/CodeGen/X86/win64_vararg.ll | 10 ++++----- 7 files changed, 37 insertions(+), 29 deletions(-) diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index 9722701ee20..0a3f931acf9 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -397,11 +397,6 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { if (HasFP) MinSize += SlotSize; StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0); MFI->setStackSize(StackSize); - } else if (IsWin64) { - // We need to always allocate 32 bytes as register spill area. - // FIXME: We might reuse these 32 bytes for leaf functions. - StackSize += 32; - MFI->setStackSize(StackSize); } // Insert stack pointer adjustment for later moving of return addr. Only diff --git a/lib/Target/X86/X86FrameLowering.h b/lib/Target/X86/X86FrameLowering.h index c067e64fc01..d71108cd058 100644 --- a/lib/Target/X86/X86FrameLowering.h +++ b/lib/Target/X86/X86FrameLowering.h @@ -28,8 +28,7 @@ public: explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti) : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), - (sti.isTargetWin64() ? -40 : - (sti.is64Bit() ? -8 : -4))), + (sti.is64Bit() ? -8 : -4)), TM(tm), STI(sti) { } diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 69295f847ce..aa1301fd459 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1544,6 +1544,12 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain, SmallVector ArgLocs; CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + + // Allocate shadow area for Win64 + if (IsWin64) { + CCInfo.AllocateStack(32, 8); + } + CCInfo.AnalyzeFormalArguments(Ins, CC_X86); unsigned LastVal = ~0U; @@ -1778,8 +1784,7 @@ X86TargetLowering::LowerMemOpCallTo(SDValue Chain, DebugLoc dl, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const { - const unsigned FirstStackArgOffset = (Subtarget->isTargetWin64() ? 32 : 0); - unsigned LocMemOffset = FirstStackArgOffset + VA.getLocMemOffset(); + unsigned LocMemOffset = VA.getLocMemOffset(); SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); if (Flags.isByVal()) @@ -1864,6 +1869,12 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, SmallVector ArgLocs; CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + + // Allocate shadow area for Win64 + if (IsWin64) { + CCInfo.AllocateStack(32, 8); + } + CCInfo.AnalyzeCallOperands(Outs, CC_X86); // Get a count of how many bytes are to be pushed on the stack. @@ -2447,6 +2458,12 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee, SmallVector ArgLocs; CCState CCInfo(CalleeCC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + + // Allocate shadow area for Win64 + if (Subtarget->isTargetWin64()) { + CCInfo.AllocateStack(32, 8); + } + CCInfo.AnalyzeCallOperands(Outs, CC_X86); if (CCInfo.getNextStackOffset()) { MachineFunction &MF = DAG.getMachineFunction(); diff --git a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll index c5982285afe..9d06a9e84d0 100644 --- a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll +++ b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp" -target triple = "x86_64-pc-mingw64" +; RUN: llc -mtriple=x86_64-pc-mingw64 < %s | FileCheck %s +; CHECK-NOT: -{{[1-9][0-9]*}}(%rsp) define x86_fp80 @a(i64 %x) nounwind readnone { entry: - %conv = sitofp i64 %x to x86_fp80 ; [#uses=1] - ret x86_fp80 %conv + %conv = sitofp i64 %x to x86_fp80 ; [#uses=1] + ret x86_fp80 %conv } - diff --git a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll index 810a6f4d6c6..6e8d9a996ef 100644 --- a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll +++ b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll @@ -1,12 +1,10 @@ -; RUN: llc < %s -o %t1 -; RUN: grep "subq.*\\\$72, \\\%rsp" %t1 -; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1 -; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1 -target triple = "x86_64-pc-mingw64" +; RUN: llc -mtriple=x86_64-pc-mingw64 < %s | FileCheck %s +; CHECK: subq $40, %rsp +; CHECK: movaps %xmm8, (%rsp) +; CHECK: movaps %xmm7, 16(%rsp) define i32 @a() nounwind { entry: - tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind - ret i32 undef + tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind + ret i32 undef } - diff --git a/test/CodeGen/X86/win64_params.ll b/test/CodeGen/X86/win64_params.ll index 0b67368e04f..f9d4bf9c309 100644 --- a/test/CodeGen/X86/win64_params.ll +++ b/test/CodeGen/X86/win64_params.ll @@ -4,8 +4,8 @@ ; on the stack. define i32 @f6(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize { entry: -; CHECK: movl 80(%rsp), %eax -; CHECK: addl 72(%rsp), %eax +; CHECK: movl 48(%rsp), %eax +; CHECK: addl 40(%rsp), %eax %add = add nsw i32 %p6, %p5 ret i32 %add } diff --git a/test/CodeGen/X86/win64_vararg.ll b/test/CodeGen/X86/win64_vararg.ll index 072f36afb7b..a451318f6e8 100644 --- a/test/CodeGen/X86/win64_vararg.ll +++ b/test/CodeGen/X86/win64_vararg.ll @@ -5,11 +5,11 @@ ; calculated. define void @average_va(i32 %count, ...) nounwind { entry: -; CHECK: subq $40, %rsp -; CHECK: movq %r9, 72(%rsp) -; CHECK: movq %r8, 64(%rsp) -; CHECK: movq %rdx, 56(%rsp) -; CHECK: leaq 56(%rsp), %rax +; CHECK: pushq +; CHECK: movq %r9, 40(%rsp) +; CHECK: movq %r8, 32(%rsp) +; CHECK: movq %rdx, 24(%rsp) +; CHECK: leaq 24(%rsp), %rax %ap = alloca i8*, align 8 ; [#uses=1] %ap1 = bitcast i8** %ap to i8* ; [#uses=1] -- 2.34.1