From 4070b4498d5a650381ce00befcf6afd686283a8d Mon Sep 17 00:00:00 2001 From: Wu Liang feng Date: Fri, 14 Oct 2016 17:41:26 +0800 Subject: [PATCH] usb: dwc3: rockchip: add pm runtime control for dwc3 parent In usb3 tcphy init, it will access usb3 module to set usb3 working on USB3.0 mode or USB2.0 only mode, and usb3 pd must be enabled before do this operation. So we add pm runtime control for dwc3 parent in extcon evt work. If plug in usb device, resume dwc3 parent first to enable usb3 pd and then do phy init. Change-Id: I90dd762d7f76e5f1722c95611e440eacd3afcdc9 Signed-off-by: Wu Liang feng --- drivers/usb/dwc3/dwc3-rockchip.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-rockchip.c b/drivers/usb/dwc3/dwc3-rockchip.c index d4a4335d2274..036f8742cad8 100644 --- a/drivers/usb/dwc3/dwc3-rockchip.c +++ b/drivers/usb/dwc3/dwc3-rockchip.c @@ -116,6 +116,7 @@ static void dwc3_rockchip_otg_extcon_evt_work(struct work_struct *work) usleep_range(1000, 1200); reset_control_deassert(rockchip->otg_rst); + pm_runtime_get_sync(rockchip->dev); pm_runtime_get_sync(dwc->dev); spin_lock_irqsave(&dwc->lock, flags); @@ -152,6 +153,13 @@ static void dwc3_rockchip_otg_extcon_evt_work(struct work_struct *work) usleep_range(1000, 1200); reset_control_deassert(rockchip->otg_rst); + /* + * In usb3 phy init, it will access usb3 module, so we need + * to resume rockchip dev before phy init to make sure usb3 + * pd is enabled. + */ + pm_runtime_get_sync(rockchip->dev); + /* * Don't abort on errors. If powering on a phy fails, * we still need to init dwc controller and add the @@ -221,6 +229,7 @@ static void dwc3_rockchip_otg_extcon_evt_work(struct work_struct *work) phy_power_off(dwc->usb3_generic_phy); } + pm_runtime_put_sync(rockchip->dev); pm_runtime_put_sync_suspend(dwc->dev); rockchip->connected = false; -- 2.34.1