From 43182ac0d6c2fa99b71cac66fa3da1fa063b2413 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Tue, 8 May 2007 17:03:51 +0000
Subject: [PATCH] R0 is a sub-register of X0, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36939 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/PPCRegisterInfo.td | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index 3891755247e..0b3b4cabde7 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -22,9 +22,9 @@ class GPR<bits<5> num, string n> : PPCReg<n> {
 }
 
 // GP8 - One of the 32 64-bit general-purpose registers
-class GP8<GPR Alias> : PPCReg<Alias.Name> {
-  field bits<5> Num = Alias.Num;
-  let Aliases = [Alias];
+class GP8<GPR SubReg> : PPCReg<SubReg.Name> {
+  field bits<5> Num = SubReg.Num;
+  let SubRegs = [SubReg];
 }
 
 // SPR - One of the 32-bit special-purpose registers
-- 
2.34.1