From 43c6b6be8f9a32490a146687e49b036576b0a3fa Mon Sep 17 00:00:00 2001 From: Oliver Stannard Date: Wed, 24 Sep 2014 14:20:01 +0000 Subject: [PATCH] [Thumb] 32-bit encodings of 'cps' are not valid for v7M v7M only allows the 16-bit encoding of the 'cps' (Change Processor State) instruction, and does not have the 32-bit encoding which is valid from v6T2 onwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218382 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb2.td | 3 ++- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 ++ test/MC/ARM/cps.s | 17 +++++++++++++++++ 3 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 test/MC/ARM/cps.s diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 01e6e1891fc..6d45f0549d9 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3674,7 +3674,8 @@ let isBranch = 1, isTerminator = 1 in { // operands, create 3 versions of the same instruction. Once there's a clean // framework to represent optional operands, change this behavior. class t2CPS : T2XI<(outs), iops, NoItinerary, - !strconcat("cps", asm_op), []> { + !strconcat("cps", asm_op), []>, + Requires<[IsThumb2, IsNotMClass]> { bits<2> imod; bits<3> iflags; bits<5> mode; diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 7e33ec5617d..211157c7203 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5514,6 +5514,8 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, Operands.push_back(ARMOperand::CreateImm( MCConstantExpr::Create(ProcessorIMod, getContext()), NameLoc, NameLoc)); + } else if (Mnemonic == "cps" && isMClass()) { + return Error(NameLoc, "instruction 'cps' requires effect for M-class"); } // Add the remaining tokens in the mnemonic. diff --git a/test/MC/ARM/cps.s b/test/MC/ARM/cps.s new file mode 100644 index 00000000000..a848b22d987 --- /dev/null +++ b/test/MC/ARM/cps.s @@ -0,0 +1,17 @@ +@ RUN: llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF + + cpsie f + cpsie i, #3 + cps #0 + +@ CHECK: cpsie f @ encoding: [0x61,0xb6] +@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85] +@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81] + +@ UNDEF-DAG: cpsie f @ encoding: [0x61,0xb6] +@ UNDEF-DAG: error: instruction requires: +@ UNDEF-DAG: error: instruction 'cps' requires effect for M-class -- 2.34.1