From 44347bbd8b32072c6947c11d563d1e4ad79ec33c Mon Sep 17 00:00:00 2001 From: Erik Gilling Date: Wed, 8 Sep 2010 17:38:18 -0700 Subject: [PATCH] video: tegra: correct typeo in HDMI parent clock setup Change-Id: I7d1d1e8f0e627bc0b2d225af7dde29becc53f991 Signed-off-by: Erik Gilling --- drivers/video/tegra/dc/dc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 6331b30be38d..666e14cc9c22 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -494,13 +494,13 @@ void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk) struct clk *pll_d_clk = clk_get_sys(NULL, "pll_d"); - if (dc->mode.pclk > 70000) + if (dc->mode.pclk > 70000000) rate = 594000000; else rate = 216000000; if (rate != clk_get_rate(pll_d_clk)) - clk_set_rate(pll_d_clk, rate); + clk_set_rate(pll_d_clk, rate); if (clk_get_parent(clk) != pll_d_out0_clk) clk_set_parent(clk, pll_d_out0_clk); -- 2.34.1