From 44ceb8a3411620b4191ef9ada1556be45a325719 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 13 Mar 2009 16:36:42 +0000 Subject: [PATCH] generalize this code so that fast isel handles integer truncates to i1, which codegen to the same thing as integer truncates to i8 (the top bits are just undefined). This implements rdar://6667338 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66902 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FastISel.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 61ca24e2b23..d6cdc3fb64a 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -1002,7 +1002,9 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) { return false; MVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); MVT DstVT = TLI.getValueType(I->getType()); - if (DstVT != MVT::i8) + + // This code only handles truncation to byte right now. + if (DstVT != MVT::i8 && DstVT != MVT::i1) // All other cases should be handled by the tblgen generated code. return false; if (SrcVT != MVT::i16 && SrcVT != MVT::i32) @@ -1022,7 +1024,7 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) { BuildMI(MBB, DL, TII.get(CopyOpc), CopyReg).addReg(InputReg); // Then issue an extract_subreg. - unsigned ResultReg = FastEmitInst_extractsubreg(DstVT.getSimpleVT(), + unsigned ResultReg = FastEmitInst_extractsubreg(MVT::i8, CopyReg, X86::SUBREG_8BIT); if (!ResultReg) return false; -- 2.34.1