From 454c4ce47963861a6bf159c2700e5a3059fbc298 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Thu, 8 Apr 2010 15:25:57 +0000 Subject: [PATCH] Various MSVC warning fixes about truncated 64 bit shifts and const pointers passed to free. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100767 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/MC/MachObjectWriter.cpp | 4 ++-- lib/Support/regengine.inc | 2 +- utils/TableGen/ARMDecoderEmitter.cpp | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/MC/MachObjectWriter.cpp b/lib/MC/MachObjectWriter.cpp index fc35c365541..a533ccfdc64 100644 --- a/lib/MC/MachObjectWriter.cpp +++ b/lib/MC/MachObjectWriter.cpp @@ -477,7 +477,7 @@ public: // actual expression addend without the PCrel bias. However, instructions // with data following the relocation are not accomodated for (see comment // below regarding SIGNED{1,2,4}), so it isn't exactly that either. - Value += 1 << Log2Size; + Value += 1LL << Log2Size; } if (Target.isAbsolute()) { // constant @@ -605,7 +605,7 @@ public: // well based on the actual encoded instruction (the additional bias), // but instead appear to just look at the final offset. if (IsRIPRel) { - switch (-(Target.getConstant() + (1 << Log2Size))) { + switch (-(Target.getConstant() + (1LL << Log2Size))) { case 1: Type = RIT_X86_64_Signed1; break; case 2: Type = RIT_X86_64_Signed2; break; case 4: Type = RIT_X86_64_Signed4; break; diff --git a/lib/Support/regengine.inc b/lib/Support/regengine.inc index bf55543dab8..7e41f96f359 100644 --- a/lib/Support/regengine.inc +++ b/lib/Support/regengine.inc @@ -185,7 +185,7 @@ matcher(struct re_guts *g, const char *string, size_t nmatch, endp = fast(m, start, stop, gf, gl); if (endp == NULL) { /* a miss */ free(m->pmatch); - free(m->lastpos); + free((void*)m->lastpos); STATETEARDOWN(m); return(REG_NOMATCH); } diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp index b9dcd43cd2a..29e9b8ad8c2 100644 --- a/utils/TableGen/ARMDecoderEmitter.cpp +++ b/utils/TableGen/ARMDecoderEmitter.cpp @@ -635,7 +635,7 @@ void Filter::recurse() { // Marks all the segment positions with either BIT_TRUE or BIT_FALSE. for (bitIndex = 0; bitIndex < NumBits; bitIndex++) { - if (mapIterator->first & (1 << bitIndex)) + if (mapIterator->first & (1ULL << bitIndex)) BitValueArray[StartBit + bitIndex] = BIT_TRUE; else BitValueArray[StartBit + bitIndex] = BIT_FALSE; @@ -857,7 +857,7 @@ bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn, return false; if (Insn[StartBit + i] == BIT_TRUE) - Field = Field | (1 << i); + Field = Field | (1ULL << i); } return true; -- 2.34.1