From 45c75e6014c5f9a4ca56c3b340ea63992c15fe20 Mon Sep 17 00:00:00 2001
From: CMY <cmy@rock-chips.com>
Date: Wed, 24 Sep 2014 15:42:56 +0800
Subject: [PATCH] rk: iommu: RK3288 disable iommu by default
---
arch/arm/boot/dts/rk3288.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index f4e71ae53257..29c20c0accfe 100755
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1003,7 +1003,7 @@
vpu: vpu_service@ff9a0000 {
compatible = "vpu_service";
- iommu_enabled = <1>;
+ iommu_enabled = <0>;
reg = <0xff9a0000 0x800>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
@@ -1015,7 +1015,7 @@
hevc: hevc_service@ff9c0000 {
compatible = "rockchip,hevc_service";
- iommu_enabled = <1>;
+ iommu_enabled = <0>;
reg = <0xff9c0000 0x800>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
@@ -1027,7 +1027,7 @@
iep: iep@ff900000 {
compatible = "rockchip,iep";
- iommu_enabled = <1>;
+ iommu_enabled = <0>;
reg = <0xff900000 0x800>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates15 2>, <&clk_gates15 3>;
--
2.34.1