From 47df9cd61b687a30593f820e06c796fb13c52d8b Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Wed, 25 Feb 2015 18:03:50 +0000 Subject: [PATCH] AArch64: Add debug message for large shift constants. As requested in code review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230517 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index a6bac6446f2..ac11c4d642b 100644 --- a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -1399,8 +1399,11 @@ static bool isBitfieldExtractOpFromAnd(SelectionDAG *CurDAG, SDNode *N, // Bail out on large immediates. This happens when no proper // combining/constant folding was performed. - if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) + if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) { + DEBUG((dbgs() << N + << ": Found large shift immediate, this should not happen\n")); return false; + } LSB = Srl_imm; MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes(And_imm) @@ -1506,8 +1509,11 @@ static bool isBitfieldExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0, // Missing combines/constant folding may have left us with strange // constants. - if (Shl_imm >= VT.getSizeInBits()) + if (Shl_imm >= VT.getSizeInBits()) { + DEBUG((dbgs() << N + << ": Found large shift immediate, this should not happen\n")); return false; + } uint64_t Srl_imm = 0; if (!isIntImmediate(N->getOperand(1), Srl_imm)) -- 2.34.1