From 491221451b9998cf182770f2b5f8b3a8b141dd81 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Wed, 9 Jan 2013 20:56:07 +0100 Subject: [PATCH] arm: mvebu: add DTS file for Marvell RD-A370-A1 board This patch adds the DTS file to support the Marvell RD-A370-A1 (Reference Design board) also known as RD-88F6710 board. It is almost entirely similar to the DB-A370 board except that the first Ethernet PHY is SGMII-wired and the second is a switch which is RGMII-wired. Signed-off-by: Florian Fainelli Signed-off-by: Jason Cooper --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-370-rd.dts | 61 +++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+) create mode 100644 arch/arm/boot/dts/armada-370-rd.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5ebb44fe826a..ed256e29cc2a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ msm8960-cdp.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ armada-370-mirabox.dtb \ + armada-370-rd.dtb \ armada-xp-db.dtb \ armada-xp-openblocks-ax3-4.dtb dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts new file mode 100644 index 000000000000..d62dfac61924 --- /dev/null +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -0,0 +1,61 @@ +/* + * Device Tree file for Marvell Armada 370 Reference Design board + * (RD-88F6710-A1) + * + * Copied from arch/arm/boot/dts/armada-370-db.dts + * + * Copyright (C) 2013 Florian Fainelli + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +/include/ "armada-370.dtsi" + +/ { + model = "Marvell Armada 370 Reference Design"; + compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp"; + + chosen { + bootargs = "console=ttyS0,115200 earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; /* 512 MB */ + }; + + soc { + serial@d0012000 { + clock-frequency = <200000000>; + status = "okay"; + }; + sata@d00a0000 { + nr-ports = <2>; + status = "okay"; + }; + + mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + ethernet@d0070000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "sgmii"; + }; + ethernet@d0074000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + }; +}; -- 2.34.1