From 4abb90b2e87b86a45a709263817615931fdb19fd Mon Sep 17 00:00:00 2001
From: "dalon.zhang" <dalon.zhang@rock-chips.com>
Date: Sat, 28 Feb 2015 15:25:41 +0800
Subject: [PATCH] dtsi: add rk3368 camera support

Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>
---
 arch/arm64/boot/dts/rk3368-cif-sensor.dtsi | 30 ++++++++++++++++++++++
 arch/arm64/boot/dts/rk3368-tb_8846.dts     | 10 +++++---
 arch/arm64/boot/dts/rk3368.dtsi            | 19 +++++++++++++-
 arch/arm64/mach-rockchip/Makefile          |  1 +
 4 files changed, 55 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rk3368-cif-sensor.dtsi

diff --git a/arch/arm64/boot/dts/rk3368-cif-sensor.dtsi b/arch/arm64/boot/dts/rk3368-cif-sensor.dtsi
new file mode 100644
index 000000000000..bede6345cb7d
--- /dev/null
+++ b/arch/arm64/boot/dts/rk3368-cif-sensor.dtsi
@@ -0,0 +1,30 @@
+#include "rk3368.dtsi"
+#include "../../../arm/mach-rockchip/rk_camera_sensor_info.h"
+
+/{
+	rk3368_cif_sensor: rk3368_cif_sensor{
+			compatible = "rockchip,sensor";
+			status = "disabled";
+
+	ov2659{
+		is_front = <0>;
+		rockchip,power = <&gpio0 GPIO_D0 GPIO_ACTIVE_HIGH>;
+		rockchip,powerdown = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>;
+		pwdn_active = <ov2659_PWRDN_ACTIVE>;
+		pwr_active = <PWR_ACTIVE_HIGH>;
+		mir = <0>;
+		flash_attach = <1>;
+		//rockchip,flash = <>;
+		flash_active = <1>;
+		resolution = <ov2659_FULL_RESOLUTION>;
+		powerup_sequence = <ov2659_PWRSEQ>;
+		orientation = <0>;
+		i2c_add = <ov2659_I2C_ADDR>;
+		i2c_rata = <100000>;
+		i2c_chl = <3>;
+		cif_chl = <0>;
+		mclk_rate = <24>;
+		};
+	};
+};
+
diff --git a/arch/arm64/boot/dts/rk3368-tb_8846.dts b/arch/arm64/boot/dts/rk3368-tb_8846.dts
index d0cf47dae3ca..577c92ae7f73 100644
--- a/arch/arm64/boot/dts/rk3368-tb_8846.dts
+++ b/arch/arm64/boot/dts/rk3368-tb_8846.dts
@@ -6,6 +6,7 @@
 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
 #include "../../../arm/boot/dts/lcd-F402.dtsi"
+#include "rk3368-cif-sensor.dtsi"
 
 / {
 	chosen {
@@ -813,14 +814,15 @@
 &ion_cma {
        reg = <0x00000000 0x28000000>; /* 640MB */
 };
+
+&rk3368_cif_sensor{
+	status = "okay";
+};
+
 /*
 &dwc_control_usb {
 	usb_uart {
 		status = "disabled";
 	};
 };
-
-&rk3288_cif_sensor{
-	status = "okay";
-};
 */
diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index 7d7de7e1518e..97e1d69b7322 100755
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -1166,8 +1166,25 @@
 		rockchip,isp,mipiphy = <2>;
 		rockchip,isp,cifphy = <1>;
 		rockchip,isp,mipiphy1,reg = <0xff964000 0x4000>;
+		rockchip,isp,csiphy,reg = <0xff96C000 0x4000>;
+		rockchip,grf = <&grf>;
+		rockchip,cru = <&cru>;
 		rockchip,gpios = <&gpio3 GPIO_C4 GPIO_ACTIVE_HIGH>;
-		rockchip,isp,iommu_enable = <1>;
+		rockchip,isp,iommu_enable = <0>;
+		status = "okay";
+	};
+
+	cif: cif@ff950000 {
+		compatible = "rockchip,cif";
+		reg = <0x0 0xff950000 0x0 0x10000>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		//clocks = <&pd_isp>,<&clk_gates15 14>,<&clk_gates15 15>,<&pclkin_vip>,<&clk_gates16 0>,<&clk_cif_out>;
+		clocks = <&clk_gates16 11>,<&clk_gates16 12>,<&pclkin_vip>,<&clk_vip>;
+		clock-names = "aclk_cif0","hclk_cif0","cif0_in","cif0_out";
+		pinctrl-names = "cif_pin_all";
+		pinctrl-0 = <&cif_clkout &isp_dvp_d2d9 &isp_dvp_d10d11>;
+		rockchip,grf = <&grf>;
+		rockchip,cru = <&cru>;
 		status = "okay";
 	};
 
diff --git a/arch/arm64/mach-rockchip/Makefile b/arch/arm64/mach-rockchip/Makefile
index 5a165eb929b1..40f10e984282 100644
--- a/arch/arm64/mach-rockchip/Makefile
+++ b/arch/arm64/mach-rockchip/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_BLOCK_RKNAND) += ../../arm/mach-rockchip/rknandbase.o
 obj-$(CONFIG_RK_PL330_DMA_TEST) += ../../arm/mach-rockchip/dma_memcpy_test.o
 obj-$(CONFIG_RK_VCODEC) += ../../arm/mach-rockchip/vcodec_service.o
 obj-$(CONFIG_RK_PM_TESTS) += ../../arm/mach-rockchip/rk_pm_tests/
+obj-$(CONFIG_ROCK_CHIP_SOC_CAMERA) += ../../arm/mach-rockchip/rk_camera.o
-- 
2.34.1