From 4ae0cc94acc9955e726962c4294009cf9faebe03 Mon Sep 17 00:00:00 2001 From: lintao Date: Wed, 25 Jun 2014 21:31:07 +0800 Subject: [PATCH] mmc: core: rk_sdmmc: prepare for next Soc(s) Add node to dts(rk3036); Fixme: pinctrl missing --- arch/arm/boot/dts/rk3036-fpga.dts | 14 +++++++++ arch/arm/boot/dts/rk3036.dtsi | 49 ++++++++++++++++++++++++++++++ drivers/mmc/host/dw_mmc-rockchip.c | 3 +- 3 files changed, 65 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3036-fpga.dts b/arch/arm/boot/dts/rk3036-fpga.dts index 828f9de65689..ff6af44f2dec 100644 --- a/arch/arm/boot/dts/rk3036-fpga.dts +++ b/arch/arm/boot/dts/rk3036-fpga.dts @@ -17,4 +17,18 @@ fiq-debugger { status = "okay"; }; + + &sdmmc { + clock-frequency = <50000000>; + clock-freq-min-max = <400000 50000000>; + supports-highspeed; + supports-sd; + broken-cd; + card-detect-delay = <200>; + ignore-pm-notify; + keep-power-in-suspend; + //vmmc-supply = <&rk808_ldo5_reg>; + status = "okay"; + }; + }; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index b659a44039b7..3a6f915e142d 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -255,4 +255,53 @@ clock-names = "pclk_pwm"; status = "disabled"; }; + + emmc: rksdmmc@1021c000 { + compatible = "rockchip,rk_mmc", "rockchip,rk3036-sdmmc"; + reg = <0x1021c000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + //pinctrl-names = "default",,"suspend"; + //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>; + clocks = <&clk_emmc>, <&clk_gates7 0>; + clock-names = "clk_mmc", "hclk_mmc"; + num-slots = <1>; + fifo-depth = <0x100>; + bus-width = <8>; + }; + + + sdmmc: rksdmmc@10214000 { + compatible = "rockchip,rk_mmc", "rockchip,rk3036-sdmmc"; + reg = <0x10214000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + //pinctrl-names = "default", "idle"; + //pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; + //pinctrl-1 = <&sdmmc0_gpio>; + cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ + clocks = <&clk_sdmmc>, <&clk_gates2 11>; + clock-names = "clk_mmc", "hclk_mmc"; + num-slots = <1>; + fifo-depth = <0x100>; + bus-width = <4>; + }; + + sdio: rksdmmc@10218000 { + compatible = "rockchip,rk_mmc", "rockchip,rk3036-sdmmc"; + reg = <0x10218000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + //pinctrl-names = "default","idle"; + //pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_wrprt &sdio_pwr &sdio_bkpwr &sdio_intn &sdio_bus4>; + //pinctrl-1 = <&sdio_gpio>; + clocks = <&clk_sdio>, <&clk_gates5 11>; + clock-names = "clk_mmc", "hclk_mmc"; + num-slots = <1>; + fifo-depth = <0x100>; + bus-width = <4>; + }; }; diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index d1745fbb8965..69b1cf3d9e9e 100755 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -124,7 +124,8 @@ static int dw_mci_rockchip_setup_clock(struct dw_mci *host) { struct dw_mci_rockchip_priv_data *priv = host->priv; - if (priv->ctrl_type == DW_MCI_TYPE_RK3288) + if ((priv->ctrl_type == DW_MCI_TYPE_RK3288) || + (priv->ctrl_type == DW_MCI_TYPE_RK3036)) host->bus_hz /= (priv->ciu_div + 1); return 0; -- 2.34.1