From 4c12e719c9ba9f15e1b1c9f680d823938557dcc9 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 24 Feb 2006 02:12:52 +0000 Subject: [PATCH] Add some hooks for selecting memory addresses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26347 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/SelectionDAGISel.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index 5a58297cb25..805699390db 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -49,11 +49,28 @@ public: virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {} virtual void InstructionSelectBasicBlock(SelectionDAG &SD) = 0; + /// SelectInlineAsmMemoryOperand - Select the specified address as a target + /// addressing mode, according to the specified constraint code. If this does + /// not match or is not implemented, return true. The resultant operands + /// (which will appear in the machine instruction) should be added to the + /// OutOps vector. + virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op, + char ConstraintCode, + std::vector &OutOps, + SelectionDAG &DAG) { + return true; + } + protected: /// Pick a safe ordering and emit instructions for each target node in the /// graph. void ScheduleAndEmitDAG(SelectionDAG &DAG); + /// SelectInlineAsmMemoryOperands - Calls to this are automatically generated + /// by tblgen. Others should not call it. + void SelectInlineAsmMemoryOperands(std::vector &Ops, + SelectionDAG &DAG); + private: SDOperand CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg); -- 2.34.1