From 4d8c0ebd01dde66b238f9d119a6652489ee66f3e Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Fri, 23 Apr 2010 20:15:13 -0700 Subject: [PATCH] [ARM] tegra: olympus: Initialize pll_p_out* on boot Change-Id: I380e2a5bb0cfe2ed9123fbc451398597c65e0b03 Signed-off-by: Colin Cross --- arch/arm/mach-tegra/board-olympus.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/mach-tegra/board-olympus.c b/arch/arm/mach-tegra/board-olympus.c index f5ef0e7fab2a..4a52e6996b98 100644 --- a/arch/arm/mach-tegra/board-olympus.c +++ b/arch/arm/mach-tegra/board-olympus.c @@ -244,6 +244,7 @@ static void __init tegra_olympus_fixup(struct machine_desc *desc, struct tag *ta static void __init tegra_olympus_init(void) { struct clk *clk; + struct clk *sys_clk; tegra_common_init(); @@ -258,10 +259,36 @@ static void __init tegra_olympus_init(void) clk = clk_get_sys(NULL, "pll_p"); clk_set_rate(clk, 216000000); clk_enable(clk); + clk_put(clk); + + clk = clk_get_sys(NULL, "pll_p_out1"); + clk_set_rate(clk, 28800000); + clk_enable(clk); + clk_put(clk); + + clk = clk_get_sys(NULL, "pll_p_out2"); + clk_set_rate(clk, 48000000); + clk_enable(clk); + clk_put(clk); clk = clk_get_sys(NULL, "pll_p_out3"); clk_set_rate(clk, 72000000); clk_enable(clk); + clk_put(clk); + + sys_clk = clk_get_sys(NULL, "sys"); + + clk = clk_get_sys(NULL, "clk_m"); + clk_set_parent(sys_clk, clk); + clk_put(clk); + + clk = clk_get_sys(NULL, "pll_p_out4"); + clk_set_rate(clk, 108000000); + clk_enable(clk); + clk_set_parent(sys_clk, clk); + + clk_put(clk); + clk_put(sys_clk); olympus_pinmux_init(); -- 2.34.1