From 508bd630466f9625ba07a3f601435e1ff824b768 Mon Sep 17 00:00:00 2001 From: Lang Hames Date: Tue, 15 Apr 2014 04:40:56 +0000 Subject: [PATCH] [MC] Require an MCContext when constructing an MCDisassembler. This patch re-introduces the MCContext member that was removed from MCDisassembler in r206063, and requires that an MCContext be passed in at MCDisassembler construction time. (Previously the MCContext member had been initialized in an ad-hoc fashion after construction). The MCCContext member can be used by MCDisassembler sub-classes to construct constant or target-specific MCExprs. This patch updates disassemblers for in-tree targets, and provides the MCRegisterInfo instance that some disassemblers were using through the MCContext (previously those backends were constructing their own MCRegisterInfo instances). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206241 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/MC/MCDisassembler.h | 8 +++- include/llvm/Support/TargetRegistry.h | 8 ++-- lib/MC/MCDisassembler/Disassembler.cpp | 2 +- .../Disassembler/AArch64Disassembler.cpp | 15 ++++--- .../ARM/Disassembler/ARMDisassembler.cpp | 20 ++++++---- .../ARM64/Disassembler/ARM64Disassembler.cpp | 5 ++- .../ARM64/Disassembler/ARM64Disassembler.h | 3 +- .../Mips/Disassembler/MipsDisassembler.cpp | 39 ++++++++++--------- .../PowerPC/Disassembler/PPCDisassembler.cpp | 9 +++-- .../Sparc/Disassembler/SparcDisassembler.cpp | 13 +++---- .../Disassembler/SystemZDisassembler.cpp | 9 +++-- .../X86/Disassembler/X86Disassembler.cpp | 8 ++-- lib/Target/X86/Disassembler/X86Disassembler.h | 2 +- .../XCore/Disassembler/XCoreDisassembler.cpp | 15 +++---- tools/llvm-mc/Disassembler.cpp | 22 ++++++++++- tools/llvm-objdump/MachODump.cpp | 4 +- tools/llvm-objdump/llvm-objdump.cpp | 17 ++++---- 17 files changed, 119 insertions(+), 80 deletions(-) diff --git a/include/llvm/MC/MCDisassembler.h b/include/llvm/MC/MCDisassembler.h index 7c5d160cafe..169304ebd6a 100644 --- a/include/llvm/MC/MCDisassembler.h +++ b/include/llvm/MC/MCDisassembler.h @@ -56,8 +56,8 @@ public: }; /// Constructor - Performs initial setup for the disassembler. - MCDisassembler(const MCSubtargetInfo &STI) - : STI(STI), Symbolizer(), CommentStream(nullptr) {} + MCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) + : Ctx(Ctx), STI(STI), Symbolizer(), CommentStream(nullptr) {} virtual ~MCDisassembler(); @@ -83,6 +83,8 @@ public: uint64_t address, raw_ostream &vStream, raw_ostream &cStream) const = 0; +private: + MCContext &Ctx; protected: // Subtarget information, for instruction decoding predicates if required. @@ -102,6 +104,8 @@ public: /// This takes ownership of \p Symzer, and deletes the previously set one. void setSymbolizer(std::unique_ptr Symzer); + MCContext& getContext() const { return Ctx; } + const MCSubtargetInfo& getSubtargetInfo() const { return STI; } // Marked mutable because we cache it inside the disassembler, rather than diff --git a/include/llvm/Support/TargetRegistry.h b/include/llvm/Support/TargetRegistry.h index 162749a9e35..96e86e09bf2 100644 --- a/include/llvm/Support/TargetRegistry.h +++ b/include/llvm/Support/TargetRegistry.h @@ -108,7 +108,8 @@ namespace llvm { MCAsmParser &P, const MCInstrInfo &MII); typedef MCDisassembler *(*MCDisassemblerCtorTy)(const Target &T, - const MCSubtargetInfo &STI); + const MCSubtargetInfo &STI, + MCContext &Ctx); typedef MCInstPrinter *(*MCInstPrinterCtorTy)(const Target &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, @@ -377,10 +378,11 @@ namespace llvm { return AsmPrinterCtorFn(TM, Streamer); } - MCDisassembler *createMCDisassembler(const MCSubtargetInfo &STI) const { + MCDisassembler *createMCDisassembler(const MCSubtargetInfo &STI, + MCContext &Ctx) const { if (!MCDisassemblerCtorFn) return nullptr; - return MCDisassemblerCtorFn(*this, STI); + return MCDisassemblerCtorFn(*this, STI, Ctx); } MCInstPrinter *createMCInstPrinter(unsigned SyntaxVariant, diff --git a/lib/MC/MCDisassembler/Disassembler.cpp b/lib/MC/MCDisassembler/Disassembler.cpp index b57b8aaa113..b1f9c6b1721 100644 --- a/lib/MC/MCDisassembler/Disassembler.cpp +++ b/lib/MC/MCDisassembler/Disassembler.cpp @@ -70,7 +70,7 @@ LLVMDisasmContextRef LLVMCreateDisasmCPU(const char *Triple, const char *CPU, return 0; // Set up disassembler. - MCDisassembler *DisAsm = TheTarget->createMCDisassembler(*STI); + MCDisassembler *DisAsm = TheTarget->createMCDisassembler(*STI, *Ctx); if (!DisAsm) return 0; diff --git a/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp index 9bd363a4a24..a5e923f4ce4 100644 --- a/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp +++ b/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp @@ -38,12 +38,11 @@ typedef MCDisassembler::DecodeStatus DecodeStatus; namespace { /// AArch64 disassembler for all AArch64 platforms. class AArch64Disassembler : public MCDisassembler { - OwningPtr RegInfo; public: /// Initializes the disassembler. /// - AArch64Disassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info) - : MCDisassembler(STI), RegInfo(Info) { + AArch64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx) + : MCDisassembler(STI, Ctx) { } ~AArch64Disassembler() {} @@ -55,8 +54,6 @@ public: uint64_t address, raw_ostream &vStream, raw_ostream &cStream) const; - - const MCRegisterInfo *getRegInfo() const { return RegInfo.get(); } }; } @@ -297,7 +294,8 @@ DecodeStatus AArch64Disassembler::getInstruction(MCInst &MI, uint64_t &Size, static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { const AArch64Disassembler *Dis = static_cast(D); - return Dis->getRegInfo()->getRegClass(RC).getRegister(RegNo); + const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo(); + return RegInfo->getRegClass(RC).getRegister(RegNo); } static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, @@ -991,8 +989,9 @@ static DecodeStatus DecodeSingleIndexedInstruction(llvm::MCInst &Inst, } static MCDisassembler *createAArch64Disassembler(const Target &T, - const MCSubtargetInfo &STI) { - return new AArch64Disassembler(STI, T.createMCRegInfo("")); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new AArch64Disassembler(STI, Ctx); } extern "C" void LLVMInitializeAArch64Disassembler() { diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 9e4038139d9..f4f7a0aacdf 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -90,8 +90,8 @@ class ARMDisassembler : public MCDisassembler { public: /// Constructor - Initializes the disassembler. /// - ARMDisassembler(const MCSubtargetInfo &STI) : - MCDisassembler(STI) { + ARMDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : + MCDisassembler(STI, Ctx) { } ~ARMDisassembler() { @@ -109,8 +109,8 @@ class ThumbDisassembler : public MCDisassembler { public: /// Constructor - Initializes the disassembler. /// - ThumbDisassembler(const MCSubtargetInfo &STI) : - MCDisassembler(STI) { + ThumbDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : + MCDisassembler(STI, Ctx) { } ~ThumbDisassembler() { @@ -400,12 +400,16 @@ static DecodeStatus DecodeMRRC2(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); #include "ARMGenDisassemblerTables.inc" -static MCDisassembler *createARMDisassembler(const Target &T, const MCSubtargetInfo &STI) { - return new ARMDisassembler(STI); +static MCDisassembler *createARMDisassembler(const Target &T, + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new ARMDisassembler(STI, Ctx); } -static MCDisassembler *createThumbDisassembler(const Target &T, const MCSubtargetInfo &STI) { - return new ThumbDisassembler(STI); +static MCDisassembler *createThumbDisassembler(const Target &T, + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new ThumbDisassembler(STI, Ctx); } DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size, diff --git a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp index 2f06adc798d..ba696b48854 100644 --- a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp +++ b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp @@ -184,8 +184,9 @@ using namespace llvm; #define Fail llvm::MCDisassembler::Fail static MCDisassembler *createARM64Disassembler(const Target &T, - const MCSubtargetInfo &STI) { - return new ARM64Disassembler(STI); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new ARM64Disassembler(STI, Ctx); } DecodeStatus ARM64Disassembler::getInstruction(MCInst &MI, uint64_t &Size, diff --git a/lib/Target/ARM64/Disassembler/ARM64Disassembler.h b/lib/Target/ARM64/Disassembler/ARM64Disassembler.h index 95848d55fa4..f60a9f07f20 100644 --- a/lib/Target/ARM64/Disassembler/ARM64Disassembler.h +++ b/lib/Target/ARM64/Disassembler/ARM64Disassembler.h @@ -23,7 +23,8 @@ class raw_ostream; class ARM64Disassembler : public MCDisassembler { public: - ARM64Disassembler(const MCSubtargetInfo &STI) : MCDisassembler(STI) {} + ARM64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx) + : MCDisassembler(STI, Ctx) {} ~ARM64Disassembler() {} diff --git a/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index fc3b922602c..4df12ef8af8 100644 --- a/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -14,6 +14,7 @@ #include "Mips.h" #include "MipsRegisterInfo.h" #include "MipsSubtarget.h" +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCDisassembler.h" #include "llvm/MC/MCFixedLenDisassembler.h" #include "llvm/MC/MCInst.h" @@ -33,19 +34,16 @@ class MipsDisassemblerBase : public MCDisassembler { public: /// Constructor - Initializes the disassembler. /// - MipsDisassemblerBase(const MCSubtargetInfo &STI, const MCRegisterInfo *Info, + MipsDisassemblerBase(const MCSubtargetInfo &STI, MCContext &Ctx, bool bigEndian) : - MCDisassembler(STI), RegInfo(Info), + MCDisassembler(STI, Ctx), IsN64(STI.getFeatureBits() & Mips::FeatureN64), isBigEndian(bigEndian) {} virtual ~MipsDisassemblerBase() {} - const MCRegisterInfo *getRegInfo() const { return RegInfo.get(); } - bool isN64() const { return IsN64; } private: - OwningPtr RegInfo; bool IsN64; protected: bool isBigEndian; @@ -57,9 +55,9 @@ class MipsDisassembler : public MipsDisassemblerBase { public: /// Constructor - Initializes the disassembler. /// - MipsDisassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info, + MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool bigEndian) : - MipsDisassemblerBase(STI, Info, bigEndian) { + MipsDisassemblerBase(STI, Ctx, bigEndian) { IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips; } @@ -78,9 +76,9 @@ class Mips64Disassembler : public MipsDisassemblerBase { public: /// Constructor - Initializes the disassembler. /// - Mips64Disassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info, + Mips64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool bigEndian) : - MipsDisassemblerBase(STI, Info, bigEndian) {} + MipsDisassemblerBase(STI, Ctx, bigEndian) {} /// getInstruction - See MCDisassembler. virtual DecodeStatus getInstruction(MCInst &instr, @@ -275,26 +273,30 @@ extern Target TheMipselTarget, TheMipsTarget, TheMips64Target, static MCDisassembler *createMipsDisassembler( const Target &T, - const MCSubtargetInfo &STI) { - return new MipsDisassembler(STI, T.createMCRegInfo(""), true); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new MipsDisassembler(STI, Ctx, true); } static MCDisassembler *createMipselDisassembler( const Target &T, - const MCSubtargetInfo &STI) { - return new MipsDisassembler(STI, T.createMCRegInfo(""), false); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new MipsDisassembler(STI, Ctx, false); } static MCDisassembler *createMips64Disassembler( const Target &T, - const MCSubtargetInfo &STI) { - return new Mips64Disassembler(STI, T.createMCRegInfo(""), true); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new Mips64Disassembler(STI, Ctx, true); } static MCDisassembler *createMips64elDisassembler( const Target &T, - const MCSubtargetInfo &STI) { - return new Mips64Disassembler(STI, T.createMCRegInfo(""), false); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new Mips64Disassembler(STI, Ctx, false); } extern "C" void LLVMInitializeMipsDisassembler() { @@ -471,7 +473,8 @@ Mips64Disassembler::getInstruction(MCInst &instr, static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { const MipsDisassemblerBase *Dis = static_cast(D); - return *(Dis->getRegInfo()->getRegClass(RC).begin() + RegNo); + const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo(); + return *(RegInfo->getRegClass(RC).begin() + RegNo); } static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, diff --git a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index c4a7544d494..d0cd49ec9b0 100644 --- a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -22,8 +22,8 @@ typedef MCDisassembler::DecodeStatus DecodeStatus; namespace { class PPCDisassembler : public MCDisassembler { public: - PPCDisassembler(const MCSubtargetInfo &STI) - : MCDisassembler(STI) {} + PPCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) + : MCDisassembler(STI, Ctx) {} virtual ~PPCDisassembler() {} // Override MCDisassembler. @@ -37,8 +37,9 @@ public: } // end anonymous namespace static MCDisassembler *createPPCDisassembler(const Target &T, - const MCSubtargetInfo &STI) { - return new PPCDisassembler(STI); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new PPCDisassembler(STI, Ctx); } extern "C" void LLVMInitializePowerPCDisassembler() { diff --git a/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp index 5cd99d6bfe0..6cd1b30491c 100644 --- a/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp +++ b/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp @@ -32,13 +32,11 @@ class SparcDisassembler : public MCDisassembler { public: /// Constructor - Initializes the disassembler. /// - SparcDisassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info) : - MCDisassembler(STI), RegInfo(Info) + SparcDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : + MCDisassembler(STI, Ctx) {} virtual ~SparcDisassembler() {} - const MCRegisterInfo *getRegInfo() const { return RegInfo.get(); } - /// getInstruction - See MCDisassembler. virtual DecodeStatus getInstruction(MCInst &instr, uint64_t &size, @@ -46,8 +44,6 @@ public: uint64_t address, raw_ostream &vStream, raw_ostream &cStream) const; -private: - OwningPtr RegInfo; }; } @@ -58,8 +54,9 @@ namespace llvm { static MCDisassembler *createSparcDisassembler( const Target &T, - const MCSubtargetInfo &STI) { - return new SparcDisassembler(STI, T.createMCRegInfo("")); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new SparcDisassembler(STI, Ctx); } diff --git a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp index 59a1fe9d597..4d06e74eeb7 100644 --- a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp +++ b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp @@ -22,8 +22,8 @@ typedef MCDisassembler::DecodeStatus DecodeStatus; namespace { class SystemZDisassembler : public MCDisassembler { public: - SystemZDisassembler(const MCSubtargetInfo &STI) - : MCDisassembler(STI) {} + SystemZDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) + : MCDisassembler(STI, Ctx) {} virtual ~SystemZDisassembler() {} // Override MCDisassembler. @@ -35,8 +35,9 @@ public: } // end anonymous namespace static MCDisassembler *createSystemZDisassembler(const Target &T, - const MCSubtargetInfo &STI) { - return new SystemZDisassembler(STI); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new SystemZDisassembler(STI, Ctx); } extern "C" void LLVMInitializeSystemZDisassembler() { diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp index 6681e77eb79..f03ed13d13c 100644 --- a/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -76,8 +76,9 @@ static bool translateInstruction(MCInst &target, X86GenericDisassembler::X86GenericDisassembler( const MCSubtargetInfo &STI, + MCContext &Ctx, std::unique_ptr MII) - : MCDisassembler(STI), MII(std::move(MII)) { + : MCDisassembler(STI, Ctx), MII(std::move(MII)) { switch (STI.getFeatureBits() & (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) { case X86::Mode16Bit: @@ -800,9 +801,10 @@ static bool translateInstruction(MCInst &mcInst, } static MCDisassembler *createX86Disassembler(const Target &T, - const MCSubtargetInfo &STI) { + const MCSubtargetInfo &STI, + MCContext &Ctx) { std::unique_ptr MII(T.createMCInstrInfo()); - return new X86Disassembler::X86GenericDisassembler(STI, std::move(MII)); + return new X86Disassembler::X86GenericDisassembler(STI, Ctx, std::move(MII)); } extern "C" void LLVMInitializeX86Disassembler() { diff --git a/lib/Target/X86/Disassembler/X86Disassembler.h b/lib/Target/X86/Disassembler/X86Disassembler.h index 001dcc50e95..2cafd3800a1 100644 --- a/lib/Target/X86/Disassembler/X86Disassembler.h +++ b/lib/Target/X86/Disassembler/X86Disassembler.h @@ -105,7 +105,7 @@ class X86GenericDisassembler : public MCDisassembler { public: /// Constructor - Initializes the disassembler. /// - X86GenericDisassembler(const MCSubtargetInfo &STI, + X86GenericDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, std::unique_ptr MII); public: diff --git a/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp b/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp index 9c20abd4c6c..1fe91f59d99 100644 --- a/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp +++ b/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp @@ -14,6 +14,7 @@ #include "XCore.h" #include "XCoreRegisterInfo.h" +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCDisassembler.h" #include "llvm/MC/MCFixedLenDisassembler.h" #include "llvm/MC/MCInst.h" @@ -29,10 +30,9 @@ namespace { /// \brief A disassembler class for XCore. class XCoreDisassembler : public MCDisassembler { - OwningPtr RegInfo; public: - XCoreDisassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info) : - MCDisassembler(STI), RegInfo(Info) {} + XCoreDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : + MCDisassembler(STI, Ctx) {} /// \brief See MCDisassembler. virtual DecodeStatus getInstruction(MCInst &instr, @@ -42,7 +42,6 @@ public: raw_ostream &vStream, raw_ostream &cStream) const; - const MCRegisterInfo *getRegInfo() const { return RegInfo.get(); } }; } @@ -81,7 +80,8 @@ static bool readInstruction32(const MemoryObject ®ion, static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { const XCoreDisassembler *Dis = static_cast(D); - return *(Dis->getRegInfo()->getRegClass(RC).begin() + RegNo); + const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo(); + return *(RegInfo->getRegClass(RC).begin() + RegNo); } static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, @@ -788,8 +788,9 @@ namespace llvm { } static MCDisassembler *createXCoreDisassembler(const Target &T, - const MCSubtargetInfo &STI) { - return new XCoreDisassembler(STI, T.createMCRegInfo("")); + const MCSubtargetInfo &STI, + MCContext &Ctx) { + return new XCoreDisassembler(STI, Ctx); } extern "C" void LLVMInitializeXCoreDisassembler() { diff --git a/tools/llvm-mc/Disassembler.cpp b/tools/llvm-mc/Disassembler.cpp index 9c402f2305d..28629c10c19 100644 --- a/tools/llvm-mc/Disassembler.cpp +++ b/tools/llvm-mc/Disassembler.cpp @@ -14,8 +14,11 @@ #include "Disassembler.h" #include "llvm/ADT/Triple.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCDisassembler.h" #include "llvm/MC/MCInst.h" +#include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/Support/MemoryBuffer.h" @@ -158,7 +161,24 @@ int Disassembler::disassemble(const Target &T, MemoryBuffer &Buffer, SourceMgr &SM, raw_ostream &Out) { - std::unique_ptr DisAsm(T.createMCDisassembler(STI)); + + std::unique_ptr MRI(T.createMCRegInfo(Triple)); + if (!MRI) { + errs() << "error: no register info for target " << Triple << "\n"; + return -1; + } + + std::unique_ptr MAI(T.createMCAsmInfo(*MRI, Triple)); + if (!MAI) { + errs() << "error: no assembly info for target " << Triple << "\n"; + return -1; + } + + // Set up the MCContext for creating symbols and MCExpr's. + MCContext Ctx(MAI.get(), MRI.get(), 0); + + std::unique_ptr DisAsm( + T.createMCDisassembler(STI, Ctx)); if (!DisAsm) { errs() << "error: no disassembler for target " << Triple << "\n"; return -1; diff --git a/tools/llvm-objdump/MachODump.cpp b/tools/llvm-objdump/MachODump.cpp index 89b038fc068..b6b851f6d4b 100644 --- a/tools/llvm-objdump/MachODump.cpp +++ b/tools/llvm-objdump/MachODump.cpp @@ -17,6 +17,7 @@ #include "llvm/ADT/Triple.h" #include "llvm/DebugInfo/DIContext.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCDisassembler.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCInstPrinter.h" @@ -225,8 +226,9 @@ static void DisassembleInputMachO2(StringRef Filename, TheTarget->createMCAsmInfo(*MRI, TripleName)); std::unique_ptr STI( TheTarget->createMCSubtargetInfo(TripleName, "", "")); + MCContext Ctx(AsmInfo.get(), MRI.get(), 0); std::unique_ptr DisAsm( - TheTarget->createMCDisassembler(*STI)); + TheTarget->createMCDisassembler(*STI, Ctx)); int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); std::unique_ptr IP(TheTarget->createMCInstPrinter( AsmPrinterVariant, *AsmInfo, *InstrInfo, *MRI, *STI)); diff --git a/tools/llvm-objdump/llvm-objdump.cpp b/tools/llvm-objdump/llvm-objdump.cpp index 42c61c6386d..9d043f18c2e 100644 --- a/tools/llvm-objdump/llvm-objdump.cpp +++ b/tools/llvm-objdump/llvm-objdump.cpp @@ -309,24 +309,25 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) { return; } - std::unique_ptr DisAsm(TheTarget->createMCDisassembler(*STI)); + std::unique_ptr MOFI(new MCObjectFileInfo); + MCContext Ctx(AsmInfo.get(), MRI.get(), MOFI.get()); + + std::unique_ptr DisAsm( + TheTarget->createMCDisassembler(*STI, Ctx)); + if (!DisAsm) { errs() << "error: no disassembler for target " << TripleName << "\n"; return; } - std::unique_ptr MOFI; - std::unique_ptr Ctx; if (Symbolize) { - MOFI.reset(new MCObjectFileInfo); - Ctx.reset(new MCContext(AsmInfo.get(), MRI.get(), MOFI.get())); std::unique_ptr RelInfo( - TheTarget->createMCRelocationInfo(TripleName, *Ctx.get())); + TheTarget->createMCRelocationInfo(TripleName, Ctx)); if (RelInfo) { std::unique_ptr Symzer( - MCObjectSymbolizer::createObjectSymbolizer(*Ctx.get(), - std::move(RelInfo), Obj)); + MCObjectSymbolizer::createObjectSymbolizer(Ctx, std::move(RelInfo), + Obj)); if (Symzer) DisAsm->setSymbolizer(std::move(Symzer)); } -- 2.34.1