From 508fc4708bb859391af8969614e67c84ab56c38c Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 5 Oct 2010 21:09:45 +0000 Subject: [PATCH] Replace a gross hack (the MOV64ri_alt instruction) with a slightly less gross hack (having the asmmatcher handle the alias). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115685 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86AsmParser.cpp | 10 +++++++++- lib/Target/X86/X86InstrArithmetic.td | 2 +- lib/Target/X86/X86InstrInfo.td | 9 --------- test/MC/X86/x86-64.s | 2 +- test/MC/X86/x86_64-imm-widths.s | 4 ++-- 5 files changed, 13 insertions(+), 14 deletions(-) diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index d9409201b41..4b0807e5130 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -834,6 +834,15 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, if (getLexer().is(AsmToken::EndOfStatement)) Parser.Lex(); // Consume the EndOfStatement + // Hack to allow 'movq , ' as an alias for movabsq. + if ((Name == "movq" || Name == "mov") && Operands.size() == 3 && + static_cast(Operands[2])->isReg() && + static_cast(Operands[1])->isImm() && + !static_cast(Operands[1])->isImmSExti64i32()) { + delete Operands[0]; + Operands[0] = X86Operand::CreateToken("movabsq", NameLoc); + } + // FIXME: Hack to handle recognize s{hr,ar,hl} $1, . Canonicalize to // "shift ". if ((Name.startswith("shr") || Name.startswith("sar") || @@ -1139,7 +1148,6 @@ MatchAndEmitInstruction(SMLoc IDLoc, Operands[0] = X86Operand::CreateToken(Repl, IDLoc); } - bool WasOriginallyInvalidOperand = false; unsigned OrigErrorInfo; MCInst Inst; diff --git a/lib/Target/X86/X86InstrArithmetic.td b/lib/Target/X86/X86InstrArithmetic.td index 64163fdd078..6aa05642637 100644 --- a/lib/Target/X86/X86InstrArithmetic.td +++ b/lib/Target/X86/X86InstrArithmetic.td @@ -343,7 +343,7 @@ def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q}\t$dst", } // Defs = [EFLAGS] -// FIXME: NOT sets EFLAGS! +// Note: NOT does not set EFLAGS! let Constraints = "$src1 = $dst" in { // Match xor -1 to not. Favors these over a move imm + xor to save code size. diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 1ec7eed4dca..e5ba20615dc 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -762,15 +762,6 @@ def CMPS64 : RI<0xA7, RawFrm, (outs), (ins), "cmpsq", []>; // Move Instructions. // -// The assembler accepts movq of a 64-bit immediate as an alternate spelling of -// movabsq. -let isAsmParserOnly = 1 in { -// FIXME: Alias?? -def MOV64ri_alt : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src), - "mov{q}\t{$src, $dst|$dst, $src}", []>; -} - - let neverHasSideEffects = 1 in { def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src), "mov{b}\t{$src, $dst|$dst, $src}", []>; diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index d902aaae63a..82998952cf8 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -596,7 +596,7 @@ movl 0, %eax // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,0x00,0x00,0x00 // CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff] movabsq $0xFFFF000000000002, %rax -// CHECK: movq $-281474976710654, %rax +// CHECK: movabsq $-281474976710654, %rax // CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff] movq $0xFFFF000000000002, %rax diff --git a/test/MC/X86/x86_64-imm-widths.s b/test/MC/X86/x86_64-imm-widths.s index 6243717ba82..97b60ff3aff 100644 --- a/test/MC/X86/x86_64-imm-widths.s +++ b/test/MC/X86/x86_64-imm-widths.s @@ -84,11 +84,11 @@ // CHECK: encoding: [0x48,0x05,0xff,0xff,0x00,0x00] addq $0xFFFF, %rax -// CHECK: movq $4294967168, %rax +// CHECK: movabsq $4294967168, %rax // CHECK: encoding: [0x48,0xb8,0x80,0xff,0xff,0xff,0x00,0x00,0x00,0x00] movq $0xFFFFFF80, %rax -// CHECK: movq $4294967295, %rax +// CHECK: movabsq $4294967295, %rax // CHECK: encoding: [0x48,0xb8,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00] movq $0xFFFFFFFF, %rax -- 2.34.1