From 51dcc8be0e5a7eeb19cd8ce18e40851bad1e1d5a Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Thu, 8 Dec 2016 12:34:16 +0800 Subject: [PATCH] ARM: dts: rk3288: add isp node Change-Id: Iadb1bb9afae66a935b0498986c3ee83a0fb487c9 Signed-off-by: Jacob Chen --- arch/arm/boot/dts/rk3288.dtsi | 36 +++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index ac932a2f57db..0a1059f70985 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1281,6 +1281,26 @@ }; }; + cif_isp0: cif_isp@ff910000 { + compatible = "rockchip,rk3288-cif-isp"; + rockchip,grf = <&grf>; + reg = <0xff910000 0x10000>, <0xff968000 0x4000>; + reg-names = "register", "csihost-register"; + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, + <&cru SCLK_ISP>, <&cru SCLK_ISP_JPE>, + <&cru PCLK_MIPI_CSI>, <&cru PCLK_ISP_IN>, + <&cru SCLK_MIPIDSI_24M>; + clock-names = "aclk_isp", "hclk_isp", + "sclk_isp", "sclk_isp_jpe", + "pclk_mipi_csi", "pclk_isp_in", + "sclk_mipidsi_24m"; + resets = <&cru SRST_ISP>; + reset-names = "rst_isp"; + interrupts = ; + interrupt-names = "cif_isp10_irq"; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3288-pinctrl"; rockchip,grf = <&grf>; @@ -1849,5 +1869,21 @@ rockchip,pins = ; }; }; + + cif { + cif_dvp_d2d9: cif-dvp-d2d9 { + rockchip,pins = <2 0 RK_FUNC_1 &pcfg_pull_none>, + <2 1 RK_FUNC_1 &pcfg_pull_none>, + <2 2 RK_FUNC_1 &pcfg_pull_none>, + <2 3 RK_FUNC_1 &pcfg_pull_none>, + <2 4 RK_FUNC_1 &pcfg_pull_none>, + <2 5 RK_FUNC_1 &pcfg_pull_none>, + <2 6 RK_FUNC_1 &pcfg_pull_none>, + <2 7 RK_FUNC_1 &pcfg_pull_none>, + <2 8 RK_FUNC_1 &pcfg_pull_none>, + <2 9 RK_FUNC_1 &pcfg_pull_none>, + <2 11 RK_FUNC_1 &pcfg_pull_none>; + }; + }; }; }; -- 2.34.1