From 52c61ec1640a9fa1cf8c2fde97a14dfbf5e702b7 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 18 Jun 2010 20:59:25 +0000 Subject: [PATCH] When using ADDri to get the address of a stack object, 255 is a conservative limit on the offset that can be materialized without using the register scavenger. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106312 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 9 +++++++++ test/CodeGen/ARM/crash-O0.ll | 16 ++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index c5848d4df87..3cd28b486b4 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -674,6 +674,15 @@ ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const { I != E; ++I) { for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { if (!I->getOperand(i).isFI()) continue; + + // When using ADDri to get the address of a stack object, 255 is the + // largest offset guaranteed to fit in the immediate offset. + if (I->getOpcode() == ARM::ADDri) { + Limit = std::min(Limit, (1U << 8) - 1); + break; + } + + // Otherwise check the addressing mode. switch (I->getDesc().TSFlags & ARMII::AddrModeMask) { case ARMII::AddrMode3: case ARMII::AddrModeT2_i8: diff --git a/test/CodeGen/ARM/crash-O0.ll b/test/CodeGen/ARM/crash-O0.ll index 4f0f39fe38a..8bce4e0097f 100644 --- a/test/CodeGen/ARM/crash-O0.ll +++ b/test/CodeGen/ARM/crash-O0.ll @@ -10,3 +10,19 @@ entry: %asmtmp = call %struct0 asm sideeffect "...", "=&r,=&r,r,Ir,r,~{cc},~{memory}"(i32* undef, i32 undef, i32 1) nounwind ; <%0> [#uses=0] unreachable } + +@.str523 = private constant [256 x i8] c"\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 4 ; <[256 x i8]*> [#uses=1] +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + +; This function uses the scavenger for an ADDri instruction. +; ARMBaseRegisterInfo::estimateRSStackSizeLimit must return a 255 limit. +define arm_apcscc void @scavence_ADDri() nounwind { +entry: + %letter = alloca i8 ; [#uses=0] + %prodvers = alloca [256 x i8] ; <[256 x i8]*> [#uses=1] + %buildver = alloca [256 x i8] ; <[256 x i8]*> [#uses=0] + call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* getelementptr inbounds ([256 x i8]* @.str523, i32 0, i32 0), i32 256, i32 1, i1 false) + %prodvers2 = bitcast [256 x i8]* %prodvers to i8* ; [#uses=1] + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %prodvers2, i8* getelementptr inbounds ([256 x i8]* @.str523, i32 0, i32 0), i32 256, i32 1, i1 false) + unreachable +} -- 2.34.1