From 52d3d06e706bdde3d6c5c386deb065c3b4c51618 Mon Sep 17 00:00:00 2001 From: Borislav Petkov Date: Tue, 19 Feb 2013 19:33:12 +0100 Subject: [PATCH] x86, cpu, amd: Fix WC+ workaround for older virtual hosts The WC+ workaround for F10h introduces a new MSR and kvm host #GPs on accesses to unknown MSRs if paravirt is not compiled in. Use the exception-handling MSR accessors so as not to break 3.8 and later guests booting on older hosts. Remove a redundant family check while at it. Cc: Gleb Natapov Cc: Boris Ostrovsky Signed-off-by: Borislav Petkov Link: http://lkml.kernel.org/r/1361298793-31834-1-git-send-email-bp@alien8.de Signed-off-by: H. Peter Anvin --- arch/x86/kernel/cpu/amd.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 721ef3208eb5..163af4a91d09 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -723,12 +723,14 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) * performance degradation for certain nested-paging guests. * Prevent this conversion by clearing bit 24 in * MSR_AMD64_BU_CFG2. + * + * NOTE: we want to use the _safe accessors so as not to #GP kvm + * guests on older kvm hosts. */ - if (c->x86 == 0x10) { - rdmsrl(MSR_AMD64_BU_CFG2, value); - value &= ~(1ULL << 24); - wrmsrl(MSR_AMD64_BU_CFG2, value); - } + + rdmsrl_safe(MSR_AMD64_BU_CFG2, &value); + value &= ~(1ULL << 24); + wrmsrl_safe(MSR_AMD64_BU_CFG2, value); } rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); -- 2.34.1