From 54453c11b429a4f90f64bd83e113c69008cbd9ed Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 12 Jul 2013 18:15:02 +0000
Subject: [PATCH] R600/SI: SI support for 64bit ConstantFP

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186178 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/R600/SIInstrInfo.td    | 12 ++++++++++++
 lib/Target/R600/SIInstructions.td |  7 +++++++
 test/CodeGen/R600/fconst64.ll     | 12 ++++++++++++
 3 files changed, 31 insertions(+)
 create mode 100644 test/CodeGen/R600/fconst64.ll

diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index 655a8b1641a..067a34bf479 100644
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -21,11 +21,23 @@ def LO32 : SDNodeXForm<imm, [{
   return CurDAG->getTargetConstant(N->getZExtValue() & 0xffffffff, MVT::i32);
 }]>;
 
+def LO32f : SDNodeXForm<fpimm, [{
+  uint64_t val = N->getValueAPF().bitcastToAPInt().getZExtValue() & 0xffffffff;
+  float *fval = reinterpret_cast<float *>(&val);
+  return CurDAG->getTargetConstantFP(*fval, MVT::f32);
+}]>;
+
 // Transformation function, extract the upper 32bit of a 64bit immediate
 def HI32 : SDNodeXForm<imm, [{
   return CurDAG->getTargetConstant(N->getZExtValue() >> 32, MVT::i32);
 }]>;
 
+def HI32f : SDNodeXForm<fpimm, [{
+  uint64_t val = N->getValueAPF().bitcastToAPInt().getZExtValue() >> 32;
+  float *fval = reinterpret_cast<float *>(&val);
+  return CurDAG->getTargetConstantFP(*fval, MVT::f32);
+}]>;
+
 def IMM8bitDWORD : ImmLeaf <
   i32, [{
     return (Imm & ~0x3FC) == 0;
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
index 8436b67a20d..3deaa2e96bd 100644
--- a/lib/Target/R600/SIInstructions.td
+++ b/lib/Target/R600/SIInstructions.td
@@ -1509,6 +1509,13 @@ def : Pat <
     (S_MOV_B32 (i32 (HI32 imm:$imm))), sub1)
 >;
 
+def : Pat <
+  (f64 fpimm:$imm),
+  (INSERT_SUBREG (INSERT_SUBREG (f64 (IMPLICIT_DEF)),
+    (V_MOV_B32_e32 (f32 (LO32f fpimm:$imm))), sub0),
+    (V_MOV_B32_e32 (f32 (HI32f fpimm:$imm))), sub1)
+>;
+
 /********** ===================== **********/
 /********** Interpolation Paterns **********/
 /********** ===================== **********/
diff --git a/test/CodeGen/R600/fconst64.ll b/test/CodeGen/R600/fconst64.ll
new file mode 100644
index 00000000000..2402a9c786e
--- /dev/null
+++ b/test/CodeGen/R600/fconst64.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=r600 -mcpu=tahiti | FileCheck %s
+
+; CHECK: @fconst_f64
+; CHECK: V_MOV_B32_e32 {{VGPR[0-9]+}}, 0.000000e+00
+; CHECK-NEXT: V_MOV_B32_e32 {{VGPR[0-9]+}}, 2.312500e+00
+
+define void @fconst_f64(double addrspace(1)* %out, double addrspace(1)* %in) {
+   %r1 = load double addrspace(1)* %in
+   %r2 = fadd double %r1, 5.000000e+00
+   store double %r2, double addrspace(1)* %out
+   ret void
+}
-- 
2.34.1