From 56291663d1917313a49461a436b860b1f8e92204 Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Tue, 19 Apr 2016 09:13:29 +0800 Subject: [PATCH] clk: rockchip: rk3399: Add and export SCLK_RGA_CORE clock id Change-Id: Ia64289f565e7b4570c6b55810bda5d4711a7381a Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3399.c | 2 +- include/dt-bindings/clock/rk3399-cru.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index 7fbf48b15e5b..2fb52744bcb2 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -771,7 +771,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { RK3399_CLKGATE_CON(16), 1, GFLAGS), /* rga */ - COMPOSITE(0, "clk_rga_core", mux_pll_src_cpll_gpll_npll_ppll_p, 0, + COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_pll_src_cpll_gpll_npll_ppll_p, 0, RK3399_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 5, DFLAGS, RK3399_CLKGATE_CON(4), 10, GFLAGS), diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h index 10ce0a497cf2..2290123f61e6 100644 --- a/include/dt-bindings/clock/rk3399-cru.h +++ b/include/dt-bindings/clock/rk3399-cru.h @@ -72,7 +72,7 @@ #define SCLK_MACREF_OUT 106 #define SCLK_VOP0_PWM 107 #define SCLK_VOP1_PWM 108 -#define SCLK_RGA 109 +#define SCLK_RGA_CORE 109 #define SCLK_ISP0 110 #define SCLK_ISP1 111 #define SCLK_HDMI_CEC 112 -- 2.34.1