From 56aa531f93d7674c534c145180e3902e40602b57 Mon Sep 17 00:00:00 2001 From: Brian Gaeke Date: Thu, 12 Feb 2004 04:15:00 +0000 Subject: [PATCH] Express one of MachineOperand's many constructors in terms of another, by means of default arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11343 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineInstr.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 572b982a8b6..8d36c885379 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -129,13 +129,7 @@ private: int regNum; // register number for an explicit register // will be set for a value after reg allocation private: - MachineOperand() - : immedVal(0), - flags(0), - opType(MO_VirtualRegister), - regNum(-1) {} - - MachineOperand(int64_t ImmVal, MachineOperandType OpTy) + MachineOperand(int64_t ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister) : immedVal(ImmVal), flags(0), opType(OpTy), -- 2.34.1