From 5773fd52efca7150b0f8a76e372ee64b6cc167b9 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Fri, 30 Sep 2011 19:18:24 +0000 Subject: [PATCH] Remove unnecessary checking of register operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140872 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/Mips/madd-msub.ll | 12 ++++++------ test/CodeGen/Mips/rotate.ll | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/test/CodeGen/Mips/madd-msub.ll b/test/CodeGen/Mips/madd-msub.ll index 9dde98d51b1..0aeabb30e28 100644 --- a/test/CodeGen/Mips/madd-msub.ll +++ b/test/CodeGen/Mips/madd-msub.ll @@ -1,6 +1,6 @@ ; RUN: llc -march=mips < %s | FileCheck %s -; CHECK: madd $5, $4 +; CHECK: madd define i64 @madd1(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = sext i32 %a to i64 @@ -11,7 +11,7 @@ entry: ret i64 %add } -; CHECK: maddu $5, $4 +; CHECK: maddu define i64 @madd2(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = zext i32 %a to i64 @@ -22,7 +22,7 @@ entry: ret i64 %add } -; CHECK: madd $5, $4 +; CHECK: madd define i64 @madd3(i32 %a, i32 %b, i64 %c) nounwind readnone { entry: %conv = sext i32 %a to i64 @@ -32,7 +32,7 @@ entry: ret i64 %add } -; CHECK: msub $5, $4 +; CHECK: msub define i64 @msub1(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = sext i32 %c to i64 @@ -43,7 +43,7 @@ entry: ret i64 %sub } -; CHECK: msubu $5, $4 +; CHECK: msubu define i64 @msub2(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = zext i32 %c to i64 @@ -54,7 +54,7 @@ entry: ret i64 %sub } -; CHECK: msub $5, $4 +; CHECK: msub define i64 @msub3(i32 %a, i32 %b, i64 %c) nounwind readnone { entry: %conv = sext i32 %a to i64 diff --git a/test/CodeGen/Mips/rotate.ll b/test/CodeGen/Mips/rotate.ll index e7dc3093214..8e27f4aad6e 100644 --- a/test/CodeGen/Mips/rotate.ll +++ b/test/CodeGen/Mips/rotate.ll @@ -1,6 +1,6 @@ ; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s -; CHECK: rotrv $2, $4, $2 +; CHECK: rotrv $2, $4 define i32 @rot0(i32 %a, i32 %b) nounwind readnone { entry: %shl = shl i32 %a, %b -- 2.34.1