From 589800e7449f541d7817567c57d90a3211278f73 Mon Sep 17 00:00:00 2001
From: yxj <yxj@rock-chips.com>
Date: Fri, 14 Mar 2014 15:43:42 +0800
Subject: [PATCH] modify rk3288.dtsi rk3288-tb.dts for display subsystem

---
 arch/arm/boot/dts/rk3288-tb.dts | 29 +++++++++-------------
 arch/arm/boot/dts/rk3288.dtsi   | 43 +++++++++++++++++----------------
 2 files changed, 34 insertions(+), 38 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288-tb.dts b/arch/arm/boot/dts/rk3288-tb.dts
index 1cab102c1481..c449365a153f 100755
--- a/arch/arm/boot/dts/rk3288-tb.dts
+++ b/arch/arm/boot/dts/rk3288-tb.dts
@@ -142,28 +142,23 @@ codec_hdmi_i2s: codec-hdmi-i2s {
 	status = "okay";
 	power_ctr: power_ctr {
 		rockchip,debug = <0>;
-		lcd_en:lcd_en {
+		/*lcd_en:lcd_en {
 			rockchip,power_type = <GPIO>;
 			gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>;
 			rockchip,delay = <10>;
 		};
 
-     	bl_en:bl_en {
-                rockchip,power_type = <GPIO>;
-                gpios = <&gpio7 GPIO_A2 GPIO_ACTIVE_HIGH>;
-                rockchip,delay = <10>;
-        };
-			/*   
-                        bl_ctr:bl_ctr {
-                                rockchip,power_type = <GPIO>;
-                                gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
-                                rockchip,delay = <10>;
-                        };
-
-                        lcd_rst:lcd_rst {
-                                rockchip,power_type = <REGULATOR>;
-                                rockchip,delay = <5>;
-                        };*/
+			   
+		lcd_cs:lcd_cs {
+			rockchip,power_type = <REGULATOR>;
+			rockchip,delay = <10>;
+		};
+
+		lcd_rst:lcd_rst {
+			rockchip,power_type = <GPIO>;
+			gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
+			rockchip,delay = <5>;
+		};*/
 
 	};
 };
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 491cff446fd1..5d5ebd5d9551 100755
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -197,27 +197,6 @@
 		status = "disabled";
 	};
 
-	lvds: lvds@ff96c000 {
-		compatible = "rockchip, rk32-lvds";
-		reg = <0xff960000 0x20000>;
-	};
-
-	edp: edp@ff970000 {
-		compatible = "rockchip,rk32-edp";
-		reg = <0xff970000 0x4000>;
-		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
-	hdmi: hdmi@ff980000 {
-		compatible = "rockchip,rk3288-hdmi";
-		reg = <0xff980000 0x20000>;
-		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-		rockchip,hdmi_lcdc_source = <1>;
-		pinctrl-names = "default", "gpio";
-		pinctrl-0 = <&i2c5_sda &i2c5_scl>;
-		pinctrl-1 = <&i2c5_gpio>;
-		status = "disabled";
-	};
 
 	fb: fb{
 		compatible = "rockchip,rk-fb";
@@ -227,6 +206,28 @@
 	rk_screen: rk_screen{
 			compatible = "rockchip,screen";
 	};
+	
+	lvds: lvds@ff96c000 {
+                compatible = "rockchip, rk32-lvds";
+                reg = <0xff960000 0x20000>;
+        };
+	
+	edp: edp@ff970000 {
+                compatible = "rockchip,rk32-edp";
+                reg = <0xff970000 0x4000>;
+                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+        };
+	
+	hdmi: hdmi@ff980000 {
+                compatible = "rockchip,rk3288-hdmi";
+                reg = <0xff980000 0x20000>;
+                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+                rockchip,hdmi_lcdc_source = <1>;
+                pinctrl-names = "default", "gpio";
+                pinctrl-0 = <&i2c5_sda &i2c5_scl>;
+                pinctrl-1 = <&i2c5_gpio>;
+                status = "disabled";
+        };
 
 	lcdc0: lcdc@ff940000 {
 		compatible = "rockchip,rk3288-lcdc";
-- 
2.34.1