From 58dbf3784d3daff5f1e5e08363aee8290d1a5dc1 Mon Sep 17 00:00:00 2001 From: Bruno Cardoso Lopes Date: Fri, 9 Jul 2010 21:46:19 +0000 Subject: [PATCH] Declare YMM subregisters in the right way! Thanks Jakob git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86RegisterInfo.td | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index 7c79efb4978..9f0382e3fae 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -181,8 +181,7 @@ let Namespace = "X86" in { } // YMM Registers, used by AVX instructions - // The sub_ss and sub_sd subregs are the same registers with another regclass. - let CompositeIndices = [(sub_ss), (sub_sd)], SubRegIndices = [sub_xmm] in { + let SubRegIndices = [sub_xmm] in { def YMM0: RegisterWithSubRegs<"ymm0", [XMM0]>, DwarfRegNum<[17, 21, 21]>; def YMM1: RegisterWithSubRegs<"ymm1", [XMM1]>, DwarfRegNum<[18, 22, 22]>; def YMM2: RegisterWithSubRegs<"ymm2", [XMM2]>, DwarfRegNum<[19, 23, 23]>; -- 2.34.1