From 59196bcef5c1034f020fe5bf3579f89767537246 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko <digetx@gmail.com> Date: Mon, 30 Mar 2015 22:17:11 +0200 Subject: [PATCH] clocksource/drivers/tegra: Fix IO endianness Support big-endian kernel by using endian-aware register access functions. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Cc: ben.dooks@codethink.co.uk Cc: hdegoede@redhat.com Cc: laurent.pinchart+renesas@ideasonboard.com Cc: linux-arm-kernel@lists.infradead.org Cc: maxime.ripard@free-electrons.com Cc: viresh.kumar@linaro.org Link: http://lkml.kernel.org/r/1427746633-9137-9-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org> --- drivers/clocksource/tegra20_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index d2616ef16770..d8a3a4eb9f97 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -57,9 +57,9 @@ static u64 persistent_ms, last_persistent_ms; static struct delay_timer tegra_delay_timer; #define timer_writel(value, reg) \ - __raw_writel(value, timer_reg_base + (reg)) + writel_relaxed(value, timer_reg_base + (reg)) #define timer_readl(reg) \ - __raw_readl(timer_reg_base + (reg)) + readl_relaxed(timer_reg_base + (reg)) static int tegra_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) -- 2.34.1