From 59dfeede450bf18503eedb49e698a8b89a3df56d Mon Sep 17 00:00:00 2001 From: Michael Zuckerman Date: Mon, 24 Aug 2015 10:26:54 +0000 Subject: [PATCH] [X86] Add support for mmword memory operand size for Intel-syntax x86 assembly Differential Revision: http://reviews.llvm.org/D12151 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245835 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86AsmParser.cpp | 2 +- test/MC/X86/intel-syntax.s | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index c9fa5c137bb..85881307f88 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1049,8 +1049,8 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) { .Cases("WORD", "word", 16) .Cases("DWORD", "dword", 32) .Cases("QWORD", "qword", 64) + .Cases("MMWORD","mmword", 64) .Cases("XWORD", "xword", 80) - // .Cases("TBYTE", "tbyte", 80) .Cases("XMMWORD", "xmmword", 128) .Cases("YMMWORD", "ymmword", 256) diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 95527b0eff2..002a6f81dcf 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -705,6 +705,9 @@ repnz cmpsb sal eax, 123 // CHECK: shll $123, %eax +psignw mm0, MMWORD PTR t2 +// CHECK: psignw t2, %mm0 + comisd xmm0, QWORD PTR [eax] comiss xmm0, DWORD PTR [eax] vcomisd xmm0, QWORD PTR [eax] -- 2.34.1