From 5b23b7fe3150b2050d6fcd6981d64f30930fd3ef Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Fri, 27 May 2011 22:05:41 +0000 Subject: [PATCH] Make size computation less brittle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/AsmPrinter.h | 4 --- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 20 ----------- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 16 ++++----- lib/Target/ARM/ARMAsmPrinter.cpp | 39 ---------------------- lib/Target/ARM/ARMAsmPrinter.h | 4 --- test/CodeGen/ARM/debug-info-sreg2.ll | 4 ++- test/CodeGen/X86/2010-05-25-DotDebugLoc.ll | 2 ++ test/CodeGen/X86/2010-05-26-DotDebugLoc.ll | 10 ++++-- test/CodeGen/X86/dbg-merge-loc-entry.ll | 5 ++- test/CodeGen/X86/dbg-value-range.ll | 5 ++- 10 files changed, 27 insertions(+), 82 deletions(-) diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index 33224121bf1..d509c22b829 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -386,10 +386,6 @@ namespace llvm { /// operands. virtual MachineLocation getDebugValueLocation(const MachineInstr *MI) const; - /// getDwarfRegOpSize - get size required to emit given machine location - /// using dwarf encoding. - virtual unsigned getDwarfRegOpSize(const MachineLocation &MLoc) const; - /// getISAEncoding - Get the value for DW_AT_APPLE_isa. Zero if no isa /// encoding specified. virtual unsigned getISAEncoding() { return 0; } diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index b1aa8d244c3..4cd7cc969b1 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -760,26 +760,6 @@ getDebugValueLocation(const MachineInstr *MI) const { return MachineLocation(); } -/// getDwarfRegOpSize - get size required to emit given machine location using -/// dwarf encoding. -unsigned AsmPrinter::getDwarfRegOpSize(const MachineLocation &MLoc) const { - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - unsigned DWReg = RI->getDwarfRegNum(MLoc.getReg(), false); - if (int Offset = MLoc.getOffset()) { - // If the value is at a certain offset from frame register then - // use DW_OP_breg. - if (DWReg < 32) - return 1 + MCAsmInfo::getSLEB128Size(Offset); - else - return 1 + MCAsmInfo::getULEB128Size(MLoc.getReg()) - + MCAsmInfo::getSLEB128Size(Offset); - } - if (DWReg < 32) - return 1; - - return 1 + MCAsmInfo::getULEB128Size(DWReg); -} - /// EmitDwarfRegOp - Emit dwarf register operation. void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { const TargetRegisterInfo *TRI = TM.getRegisterInfo(); diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 53580d76aa0..f29b1996cca 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -2586,17 +2586,16 @@ void DwarfDebug::emitDebugLoc() { Asm->OutStreamer.EmitSymbolValue(Entry.Begin, Size, 0); Asm->OutStreamer.EmitSymbolValue(Entry.End, Size, 0); DIVariable DV(Entry.Variable); + Asm->OutStreamer.AddComment("Loc expr size"); + MCSymbol *begin = Asm->OutStreamer.getContext().CreateTempSymbol(); + MCSymbol *end = Asm->OutStreamer.getContext().CreateTempSymbol(); + Asm->EmitLabelDifference(end, begin, 2); + Asm->OutStreamer.EmitLabel(begin); if (DV.hasComplexAddress()) { unsigned N = DV.getNumAddrElements(); unsigned i = 0; - Asm->OutStreamer.AddComment("Loc expr size"); if (N >= 2 && DV.getAddrElement(0) == DIBuilder::OpPlus) { if (Entry.Loc.getOffset()) { - unsigned Size = Asm->getDwarfRegOpSize(Entry.Loc); - unsigned OffsetSize = - MCAsmInfo::getSLEB128Size(DV.getAddrElement(1)); - // breg + deref + plus + offset - Asm->EmitInt16(Size + 1 + 1 + OffsetSize + N - 2); i = 2; Asm->EmitDwarfRegOp(Entry.Loc); Asm->OutStreamer.AddComment("DW_OP_deref"); @@ -2608,12 +2607,10 @@ void DwarfDebug::emitDebugLoc() { // If first address element is OpPlus then emit // DW_OP_breg + Offset instead of DW_OP_reg + Offset. MachineLocation Loc(Entry.Loc.getReg(), DV.getAddrElement(1)); - Asm->EmitInt16(Asm->getDwarfRegOpSize(Loc) + N - 2); Asm->EmitDwarfRegOp(Loc); i = 2; } } else { - Asm->EmitInt16(Asm->getDwarfRegOpSize(Entry.Loc) + N); Asm->EmitDwarfRegOp(Entry.Loc); } @@ -2628,10 +2625,9 @@ void DwarfDebug::emitDebugLoc() { else llvm_unreachable("unknown Opcode found in complex address"); } } else { - Asm->OutStreamer.AddComment("Loc expr size"); - Asm->EmitInt16(Asm->getDwarfRegOpSize(Entry.Loc)); Asm->EmitDwarfRegOp(Entry.Loc); } + Asm->OutStreamer.EmitLabel(end); } } } diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 9b09ed663da..709d8c6e620 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -172,45 +172,6 @@ getDebugValueLocation(const MachineInstr *MI) const { return Location; } -/// getDwarfRegOpSize - get size required to emit given machine location using -/// dwarf encoding. -unsigned ARMAsmPrinter::getDwarfRegOpSize(const MachineLocation &MLoc) const { - const TargetRegisterInfo *RI = TM.getRegisterInfo(); - if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) - return AsmPrinter::getDwarfRegOpSize(MLoc); - else { - unsigned Reg = MLoc.getReg(); - if (Reg >= ARM::S0 && Reg <= ARM::S31) { - assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); - // S registers are described as bit-pieces of a register - // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0) - // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32) - - unsigned SReg = Reg - ARM::S0; - unsigned Rx = 256 + (SReg >> 1); - // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB - // 1 + ULEB(Rx) + 1 + 1 + 1 - return 4 + MCAsmInfo::getULEB128Size(Rx); - } - - if (Reg >= ARM::Q0 && Reg <= ARM::Q15) { - assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering"); - // Q registers Q0-Q15 are described by composing two D registers together. - // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8) - - unsigned QReg = Reg - ARM::Q0; - unsigned D1 = 256 + 2 * QReg; - unsigned D2 = D1 + 1; - - // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) + - // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8); - // 6 + ULEB(D1) + ULEB(D2) - return 6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2); - } - } - return 0; -} - /// EmitDwarfRegOp - Emit dwarf register operation. void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { const TargetRegisterInfo *RI = TM.getRegisterInfo(); diff --git a/lib/Target/ARM/ARMAsmPrinter.h b/lib/Target/ARM/ARMAsmPrinter.h index 1ee1b7024d1..5f9169ef7f7 100644 --- a/lib/Target/ARM/ARMAsmPrinter.h +++ b/lib/Target/ARM/ARMAsmPrinter.h @@ -89,10 +89,6 @@ public: MachineLocation getDebugValueLocation(const MachineInstr *MI) const; - /// getDwarfRegOpSize - get size required to emit given machine location - /// using dwarf encoding. - virtual unsigned getDwarfRegOpSize(const MachineLocation &MLoc) const; - /// EmitDwarfRegOp - Emit dwarf register operation. virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const; diff --git a/test/CodeGen/ARM/debug-info-sreg2.ll b/test/CodeGen/ARM/debug-info-sreg2.ll index fe39977f25a..16aeab3423a 100644 --- a/test/CodeGen/ARM/debug-info-sreg2.ll +++ b/test/CodeGen/ARM/debug-info-sreg2.ll @@ -6,7 +6,9 @@ target triple = "thumbv7-apple-macosx10.6.7" ;CHECK: Ldebug_loc0: ;CHECK-NEXT: .long Ltmp1 ;CHECK-NEXT: .long Ltmp3 -;CHECK-NEXT: .short 6 @ Loc expr size +;CHECK-NEXT: Lset9 = Ltmp10-Ltmp9 @ Loc expr size +;CHECK-NEXT: .short Lset9 +;CHECK-NEXT: Ltmp9: ;CHECK-NEXT: .byte 144 @ DW_OP_regx for S register define void @_Z3foov() optsize ssp { diff --git a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll index 848af82da82..51a3c6c8e16 100644 --- a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll @@ -3,6 +3,8 @@ ; Test to check .debug_loc support. This test case emits many debug_loc entries. ; CHECK: Loc expr size +; CHECK-NEXT: .short +; CHECK-NEXT: .Ltmp ; CHECK-NEXT: DW_OP_reg %0 = type { double } diff --git a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index 6600cc3cae4..7909d2736b9 100644 --- a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -68,9 +68,15 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone ; CHECK: Ldebug_loc0: ; CHECK-NEXT: .quad Lfunc_begin0 ; CHECK-NEXT: .quad [[LABEL]] -; CHECK-NEXT: .short 1 +; CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} ## Loc expr size +; CHECK-NEXT: .short Lset{{.*}} +; CHECK-NEXT: Ltmp{{.*}}: ; CHECK-NEXT: .byte 85 +; CHECK-NEXT: Ltmp{{.*}}: ; CHECK-NEXT: .quad [[LABEL]] ; CHECK-NEXT: .quad [[CLOBBER]] -; CHECK-NEXT: .short 1 +; CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} ## Loc expr size +; CHECK-NEXT: .short Lset{{.*}} +; CHECK-NEXT: Ltmp{{.*}}: ; CHECK-NEXT: .byte 83 +; CHECK-NEXT: Ltmp{{.*}}: \ No newline at end of file diff --git a/test/CodeGen/X86/dbg-merge-loc-entry.ll b/test/CodeGen/X86/dbg-merge-loc-entry.ll index 76b93dd4277..afe1729d506 100644 --- a/test/CodeGen/X86/dbg-merge-loc-entry.ll +++ b/test/CodeGen/X86/dbg-merge-loc-entry.ll @@ -6,8 +6,11 @@ target triple = "x86_64-apple-darwin8" ;CHECK: Ldebug_loc0: ;CHECK-NEXT: .quad Lfunc_begin0 ;CHECK-NEXT: .quad L -;CHECK-NEXT: .short 1 ## Loc expr size +;CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} ## Loc expr size +;CHECK-NEXT: .short Lset +;CHECK-NEXT: Ltmp ;CHECK-NEXT: .byte 85 ## DW_OP_reg5 +;CHECK-NEXT: Ltmp7 ;CHECK-NEXT: .quad 0 ;CHECK-NEXT: .quad 0 diff --git a/test/CodeGen/X86/dbg-value-range.ll b/test/CodeGen/X86/dbg-value-range.ll index d45678855f4..28d873bfba6 100644 --- a/test/CodeGen/X86/dbg-value-range.ll +++ b/test/CodeGen/X86/dbg-value-range.ll @@ -53,7 +53,10 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone ;CHECK:Ldebug_loc0: ;CHECK-NEXT: .quad ;CHECK-NEXT: .quad [[CLOBBER]] -;CHECK-NEXT: .short 1 +;CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}} +;CHECK-NEXT: .short Lset +;CHECK-NEXT: Ltmp ;CHECK-NEXT: .byte 85 +;CHECK-NEXT: Ltmp ;CHECK-NEXT: .quad 0 ;CHECK-NEXT: .quad 0 -- 2.34.1