From 5cdede43e92a370130fddde2ff071c74ea463448 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Tue, 29 Jun 2010 00:26:13 +0000 Subject: [PATCH] Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is the same as ARM except that the condition code field is always set to ARMCC::AL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107107 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMCodeEmitter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 048529b18c4..f26074d358a 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -1600,7 +1600,7 @@ void ARMCodeEmitter::emitNEONGetLaneInstruction(const MachineInstr &MI) { unsigned Binary = getBinaryCodeForInstr(MI); // Set the conditional execution predicate - Binary |= II->getPredicate(&MI) << ARMII::CondShift; + Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift; unsigned RegT = MI.getOperand(0).getReg(); RegT = ARMRegisterInfo::getRegisterNumbering(RegT); -- 2.34.1